116 lines
3.7 KiB
INI
116 lines
3.7 KiB
INI
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#
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# Droidifi OpenOCD config for TI CC3200-LP V3.2
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#
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# http://www.droidifi.com
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#
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# Copyright Droidifi LLC 2013, 2014 All rights reserved
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#
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#*****************************************************************************
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#
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#
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#
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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#
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# Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the
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# distribution.
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#
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# Neither the name of Texas Instruments Incorporated nor the names of
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# its contributors may be used to endorse or promote products derived
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# from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#*****************************************************************************
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interface ftdi
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ftdi_vid_pid 0x0451 0xc32a
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adapter_khz 1000
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set _ENDIAN little
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ftdi_layout_init 0x00a8 0x00eb
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ftdi_layout_signal nSRST -noe 0x0020
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ftdi_layout_signal SWD_EN -ndata 0x0080
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ftdi_layout_signal SWDIO_OE -data 0x0008
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME cc3200
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}
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source [find target/icepick.cfg]
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if { [info exists DAP_TAPID] } {
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set _DAP_TAPID $DAP_TAPID
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} else {
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set _DAP_TAPID 0x0b97c02f
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}
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jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
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# APP m4
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jtag configure $_CHIPNAME.dap -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
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# ICEpick-C (JTAG route controller)
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if { [info exists JRC_TAPID] } {
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set _JRC_TAPID $JRC_TAPID
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} else {
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set _JRC_TAPID $_DAP_TAPID
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}
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jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
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# jtag configure auto0.jrc -event post-reset "runtest 100"
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jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
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jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_CHIPNAME.cpu cortex_m -endian little -chain-position $_CHIPNAME.dap
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$_CHIPNAME.cpu configure -work-area-phys 0x20000000 -work-area-size 0x30000 -work-area-backup 0 -coreid 0
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source [find mem_helper.tcl]
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$_TARGETNAME configure -event gdb-attach {
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# cc3200_dbginit $_TARGETNAME
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# cortex_m dbginit
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halt
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}
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$_TARGETNAME configure -event "reset-start" { adapter_khz 1000 }
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$_TARGETNAME configure -event "reset-assert" {
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global _CHIPNAME
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# assert warm system reset through ICEPick
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icepick_c_wreset $_CHIPNAME.jrc
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}
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# Run this to enable invasive debugging. This is run automatically in the
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# reset sequence.
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proc cc3200_dbginit {target} {
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cortex_m dbginit
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}
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