#
# Droidifi OpenOCD config for TI CC3200-LP V3.2
#
# http://www.droidifi.com
#
# Copyright Droidifi LLC 2013, 2014 All rights reserved
#

#*****************************************************************************
#
#  
# 
# 
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#  are met:
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#*****************************************************************************

interface ftdi
ftdi_vid_pid 0x0451 0xc32a
adapter_khz 1000
set _ENDIAN little
ftdi_layout_init 0x00a8 0x00eb
ftdi_layout_signal nSRST -noe 0x0020
ftdi_layout_signal SWD_EN -ndata 0x0080
ftdi_layout_signal SWDIO_OE -data 0x0008

if { [info exists CHIPNAME] } {
	set _CHIPNAME $CHIPNAME
} else {
	set _CHIPNAME cc3200
}

source [find target/icepick.cfg]

if { [info exists DAP_TAPID] } {
	set _DAP_TAPID $DAP_TAPID
} else {
	set _DAP_TAPID 0x0b97c02f
}

jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable

# APP m4
jtag configure $_CHIPNAME.dap -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"

# ICEpick-C (JTAG route controller)
if { [info exists JRC_TAPID] } {
	set _JRC_TAPID $JRC_TAPID
} else {
	set _JRC_TAPID $_DAP_TAPID
}

jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version

# jtag configure auto0.jrc -event post-reset "runtest 100"
jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"

set _TARGETNAME $_CHIPNAME.cpu

target create $_CHIPNAME.cpu cortex_m -endian little -chain-position $_CHIPNAME.dap 
$_CHIPNAME.cpu configure -work-area-phys 0x20000000 -work-area-size 0x30000 -work-area-backup 0 -coreid 0

source [find mem_helper.tcl]

$_TARGETNAME configure -event gdb-attach {
# 	cc3200_dbginit $_TARGETNAME
#	cortex_m dbginit
	halt
}

$_TARGETNAME configure -event "reset-start" { adapter_khz 1000 }
$_TARGETNAME configure -event "reset-assert" {

   global _CHIPNAME

   # assert warm system reset through ICEPick
   icepick_c_wreset $_CHIPNAME.jrc
}

 
# Run this to enable invasive debugging.  This is run automatically in the
# reset sequence.
proc cc3200_dbginit {target} {

   cortex_m dbginit
 
}