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# arm_negate_q15.c

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    00001 /* ----------------------------------------------------------------------
    00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
    00003 *
    00004 * $Date:        15. July 2011
    00005 * $Revision:    V1.0.10
    00006 *
    00007 * Project:      CMSIS DSP Library
    00008 * Title:        arm_negate_q15.c
    00009 *
    00010 * Description:  Negates Q15 vectors.
    00011 *
    00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
    00013 *
    00014 * Version 1.0.10 2011/7/15
    00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
    00016 *
    00017 * Version 1.0.3 2010/11/29
    00018 *    Re-organized the CMSIS folders and updated documentation.
    00019 *
    00020 * Version 1.0.2 2010/11/11
    00021 *    Documentation updated.
    00022 *
    00023 * Version 1.0.1 2010/10/05
    00024 *    Production release and review comments incorporated.
    00025 *
    00026 * Version 1.0.0 2010/09/20
    00027 *    Production release and review comments incorporated.
    00028 *
    00029 * Version 0.0.7  2010/06/10
    00030 *    Misra-C changes done
    00031 * -------------------------------------------------------------------- */
    00032
    00033 #include "arm_math.h"
    00034
    00057 void arm_negate_q15(
    00058   q15_t * pSrc,
    00059   q15_t * pDst,
    00060   uint32_t blockSize)
    00061 {
    00062   uint32_t blkCnt;                               /* loop counter */
    00063
    00064
    00065 #ifndef ARM_MATH_CM0
    00066
    00067 /* Run the below code for Cortex-M4 and Cortex-M3 */
    00068
    00069   q15_t in1, in2;                                /* Temporary variables */
    00070
    00071
    00072   /*loop Unrolling */
    00073   blkCnt = blockSize >> 2u;
    00074
    00075   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
    00076    ** a second loop below computes the remaining 1 to 3 samples. */
    00077   while(blkCnt > 0u)
    00078   {
    00079     /* C = -A */
    00080     /* Read two inputs */
    00081     in1 = *pSrc++;
    00082     in2 = *pSrc++;
    00083     /* Negate and then store the results in the destination buffer by packing. */
    00084
    00085 #ifndef  ARM_MATH_BIG_ENDIAN
    00086
    00087     *__SIMD32(pDst)++ = __PKHBT(__SSAT(-in1, 16), __SSAT(-in2, 16), 16);
    00088
    00089 #else
    00090
    00091     *__SIMD32(pDst)++ = __PKHBT(__SSAT(-in2, 16), __SSAT(-in1, 16), 16);
    00092
    00093 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
    00094
    00095     in1 = *pSrc++;
    00096     in2 = *pSrc++;
    00097
    00098 #ifndef  ARM_MATH_BIG_ENDIAN
    00099
    00100     *__SIMD32(pDst)++ = __PKHBT(__SSAT(-in1, 16), __SSAT(-in2, 16), 16);
    00101
    00102 #else
    00103
    00104
    00105     *__SIMD32(pDst)++ = __PKHBT(__SSAT(-in2, 16), __SSAT(-in1, 16), 16);
    00106
    00107 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
    00108
    00109     /* Decrement the loop counter */
    00110     blkCnt--;
    00111   }
    00112
    00113   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    00114    ** No loop unrolling is used. */
    00115   blkCnt = blockSize % 0x4u;
    00116
    00117 #else
    00118
    00119   /* Run the below code for Cortex-M0 */
    00120
    00121   /* Initialize blkCnt with number of samples */
    00122   blkCnt = blockSize;
    00123
    00124 #endif /* #ifndef ARM_MATH_CM0 */
    00125
    00126   while(blkCnt > 0u)
    00127   {
    00128     /* C = -A */
    00129     /* Negate and then store the result in the destination buffer. */
    00130     *pDst++ = __SSAT(-*pSrc++, 16);
    00131
    00132     /* Decrement the loop counter */
    00133     blkCnt--;
    00134   }
    00135
    00136 }
    00137

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