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# arm_add_q7.c

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    00001 /* ----------------------------------------------------------------------
    00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
    00003 *
    00004 * $Date:        15. July 2011
    00005 * $Revision:    V1.0.10
    00006 *
    00007 * Project:      CMSIS DSP Library
    00008 * Title:        arm_add_q7.c
    00009 *
    00010 * Description:  Q7 vector addition.
    00011 *
    00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
    00013 *
    00014 * Version 1.0.10 2011/7/15
    00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
    00016 *
    00017 * Version 1.0.3 2010/11/29
    00018 *    Re-organized the CMSIS folders and updated documentation.
    00019 *
    00020 * Version 1.0.2 2010/11/11
    00021 *    Documentation updated.
    00022 *
    00023 * Version 1.0.1 2010/10/05
    00024 *    Production release and review comments incorporated.
    00025 *
    00026 * Version 1.0.0 2010/09/20
    00027 *    Production release and review comments incorporated.
    00028 *
    00029 * Version 0.0.7  2010/06/10
    00030 *    Misra-C changes done
    00031 * -------------------------------------------------------------------- */
    00032
    00033 #include "arm_math.h"
    00034
    00058 void arm_add_q7(
    00059   q7_t * pSrcA,
    00060   q7_t * pSrcB,
    00061   q7_t * pDst,
    00062   uint32_t blockSize)
    00063 {
    00064   uint32_t blkCnt;                               /* loop counter */
    00065
    00066 #ifndef ARM_MATH_CM0
    00067
    00068 /* Run the below code for Cortex-M4 and Cortex-M3 */
    00069
    00070
    00071   /*loop Unrolling */
    00072   blkCnt = blockSize >> 2u;
    00073
    00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
    00075    ** a second loop below computes the remaining 1 to 3 samples. */
    00076   while(blkCnt > 0u)
    00077   {
    00078     /* C = A + B */
    00079     /* Add and then store the results in the destination buffer. */
    00080     *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
    00081
    00082     /* Decrement the loop counter */
    00083     blkCnt--;
    00084   }
    00085
    00086   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    00087    ** No loop unrolling is used. */
    00088   blkCnt = blockSize % 0x4u;
    00089
    00090   while(blkCnt > 0u)
    00091   {
    00092     /* C = A + B */
    00093     /* Add and then store the results in the destination buffer. */
    00094     *pDst++ = (q7_t) __SSAT(*pSrcA++ + *pSrcB++, 8);
    00095
    00096     /* Decrement the loop counter */
    00097     blkCnt--;
    00098   }
    00099
    00100 #else
    00101
    00102   /* Run the below code for Cortex-M0 */
    00103
    00104
    00105
    00106   /* Initialize blkCnt with number of samples */
    00107   blkCnt = blockSize;
    00108
    00109   while(blkCnt > 0u)
    00110   {
    00111     /* C = A + B */
    00112     /* Add and then store the results in the destination buffer. */
    00113     *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ + *pSrcB++, 8);
    00114
    00115     /* Decrement the loop counter */
    00116     blkCnt--;
    00117   }
    00118
    00119 #endif /* #ifndef ARM_MATH_CM0 */
    00120
    00121
    00122 }
    00123

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