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# arm_fir_init_q15.c

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    00001 /* ----------------------------------------------------------------------
    00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
    00003 *
    00004 * $Date:        15. July 2011
    00005 * $Revision:    V1.0.10
    00006 *
    00007 * Project:      CMSIS DSP Library
    00008 * Title:        arm_fir_init_q15.c
    00009 *
    00010 * Description:  Q15 FIR filter initialization function.
    00011 *
    00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
    00013 *
    00014 * Version 1.0.10 2011/7/15
    00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
    00016 *
    00017 * Version 1.0.3 2010/11/29
    00018 *    Re-organized the CMSIS folders and updated documentation.
    00019 *
    00020 * Version 1.0.2 2010/11/11
    00021 *    Documentation updated.
    00022 *
    00023 * Version 1.0.1 2010/10/05
    00024 *    Production release and review comments incorporated.
    00025 *
    00026 * Version 1.0.0 2010/09/20
    00027 *    Production release and review comments incorporated.
    00028 *
    00029 * Version 0.0.5  2010/04/26
    00030 *    incorporated review comments and updated with latest CMSIS layer
    00031 *
    00032 * Version 0.0.3  2010/03/10
    00033 *    Initial version
    00034 * ------------------------------------------------------------------- */
    00035
    00036 #include "arm_math.h"
    00037
    00085 arm_status arm_fir_init_q15(
    00086   arm_fir_instance_q15 * S,
    00087   uint16_t numTaps,
    00088   q15_t * pCoeffs,
    00089   q15_t * pState,
    00090   uint32_t blockSize)
    00091 {
    00092   arm_status status;
    00093
    00094
    00095 #ifndef ARM_MATH_CM0
    00096
    00097   /* Run the below code for Cortex-M4 and Cortex-M3 */
    00098
    00099   /* The Number of filter coefficients in the filter must be even and at least 4 */
    00100   if((numTaps < 4u) || (numTaps & 0x1u))
    00101   {
    00102     status = ARM_MATH_ARGUMENT_ERROR;
    00103   }
    00104   else
    00105   {
    00106     /* Assign filter taps */
    00107     S->numTaps = numTaps;
    00108
    00109     /* Assign coefficient pointer */
    00110     S->pCoeffs = pCoeffs;
    00111
    00112     /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
    00113     memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
    00114
    00115     /* Assign state pointer */
    00116     S->pState = pState;
    00117
    00118     status = ARM_MATH_SUCCESS;
    00119   }
    00120
    00121   return (status);
    00122
    00123 #else
    00124
    00125   /* Run the below code for Cortex-M0 */
    00126
    00127   /* Assign filter taps */
    00128   S->numTaps = numTaps;
    00129
    00130   /* Assign coefficient pointer */
    00131   S->pCoeffs = pCoeffs;
    00132
    00133   /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
    00134   memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
    00135
    00136   /* Assign state pointer */
    00137   S->pState = pState;
    00138
    00139   status = ARM_MATH_SUCCESS;
    00140
    00141   return (status);
    00142
    00143 #endif /*  #ifndef ARM_MATH_CM0 */
    00144
    00145 }
    00146

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