2016-08-09 09:57:54 +00:00
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/*
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* stm32f4_pwm.h
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*
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* Created on: Aug 9, 2016
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* Author: tkl
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*/
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#ifndef SOURCE_FIRMWARE_ARCH_STM32F4XX_DRIVER_INCLUDE_STM32F4_PWM_H_
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#define SOURCE_FIRMWARE_ARCH_STM32F4XX_DRIVER_INCLUDE_STM32F4_PWM_H_
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enum stm32f4_pwm_channel {
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channel_1 = 1,
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channel_2,
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channel_3,
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channel_4
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};
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struct stm32f4_pwm {
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TIM_TypeDef *timer;
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const TIM_TimeBaseInitTypeDef *timer_cfg;
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const TIM_OCInitTypeDef *output_compare_cfg;
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const TIM_BDTRInitTypeDef *bdtr_cfg;
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GPIO_TypeDef *port;
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uint8_t pin_src;
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const GPIO_InitTypeDef *port_cfg;
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enum stm32f4_pwm_channel channel;
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};
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2016-08-09 10:28:01 +00:00
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int stm32f4_pwm_open(const void *pwm);
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int stm32f4_pwm_close(const void *pwm);
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int stm32f4_pwm_set_duty_cycle(const void *pwm, unsigned int duty_cycle_percent);
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static const struct pwm_fp stm32f4_pwm_fp = {
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.open = stm32f4_pwm_open,
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.close = stm32f4_pwm_close,
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.set_duty_cycle = stm32f4_pwm_set_duty_cycle,
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};
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2016-08-09 09:57:54 +00:00
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#endif /* SOURCE_FIRMWARE_ARCH_STM32F4XX_DRIVER_INCLUDE_STM32F4_PWM_H_ */
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