pwm master config moved

This commit is contained in:
Thomas Klaehn 2016-08-29 12:10:44 +02:00
parent 48f60f0f73
commit 1407b35ce8
3 changed files with 17 additions and 4 deletions

View File

@ -172,6 +172,11 @@ static TIM_OC_InitTypeDef t4_output_compare_cfg = {
.OCNIdleState = TIM_OCNIDLESTATE_SET .OCNIdleState = TIM_OCNIDLESTATE_SET
}; };
static TIM_MasterConfigTypeDef t4_master_cfg = {
.MasterOutputTrigger = TIM_TRGO_RESET,
.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE,
};
static const GPIO_InitTypeDef port_cfg_D15 = { static const GPIO_InitTypeDef port_cfg_D15 = {
.Pin = GPIO_PIN_15, .Pin = GPIO_PIN_15,
.Mode = GPIO_MODE_AF_PP, .Mode = GPIO_MODE_AF_PP,
@ -189,6 +194,7 @@ static struct stm32f4_pwm str32f4_pwm_4 = {
.pwm_gpio = &t4c4_gpio, .pwm_gpio = &t4c4_gpio,
.timer_handle = &tim4_handle, .timer_handle = &tim4_handle,
.output_compare_cfg = &t4_output_compare_cfg, .output_compare_cfg = &t4_output_compare_cfg,
.master_cfg = &t4_master_cfg,
.channel = TIM_CHANNEL_4, .channel = TIM_CHANNEL_4,
}; };
@ -223,6 +229,7 @@ static struct stm32f4_pwm str32f4_pwm_3 = {
.pwm_gpio = &stm32f4_pwm_t4c3_gpio, .pwm_gpio = &stm32f4_pwm_t4c3_gpio,
.timer_handle = &tim4_handle, .timer_handle = &tim4_handle,
.output_compare_cfg = &t4_output_compare_cfg, .output_compare_cfg = &t4_output_compare_cfg,
.master_cfg = &t4_master_cfg,
.channel = TIM_CHANNEL_3, .channel = TIM_CHANNEL_3,
}; };
@ -257,6 +264,7 @@ static struct stm32f4_pwm str32f4_pwm_2 = {
.pwm_gpio = &stm32f4_pwm_t4c2_gpio, .pwm_gpio = &stm32f4_pwm_t4c2_gpio,
.timer_handle = &tim4_handle, .timer_handle = &tim4_handle,
.output_compare_cfg = &t4_output_compare_cfg, .output_compare_cfg = &t4_output_compare_cfg,
.master_cfg = &t4_master_cfg,
.channel = TIM_CHANNEL_2, .channel = TIM_CHANNEL_2,
}; };
@ -291,6 +299,7 @@ static struct stm32f4_pwm str32f4_pwm_1 = {
.pwm_gpio = &stm32f4_pwm_t4c1_gpio, .pwm_gpio = &stm32f4_pwm_t4c1_gpio,
.timer_handle = &tim4_handle, .timer_handle = &tim4_handle,
.output_compare_cfg = &t4_output_compare_cfg, .output_compare_cfg = &t4_output_compare_cfg,
.master_cfg = &t4_master_cfg,
.channel = TIM_CHANNEL_1, .channel = TIM_CHANNEL_1,
}; };
@ -331,6 +340,11 @@ static TIM_OC_InitTypeDef t5_output_compare_cfg = {
.OCNIdleState = TIM_OCNIDLESTATE_SET .OCNIdleState = TIM_OCNIDLESTATE_SET
}; };
static TIM_MasterConfigTypeDef t5_master_cfg = {
.MasterOutputTrigger = TIM_TRGO_RESET,
.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE,
};
static const GPIO_InitTypeDef port_cfg_A1 = { static const GPIO_InitTypeDef port_cfg_A1 = {
.Pin = GPIO_PIN_1, .Pin = GPIO_PIN_1,
.Mode = GPIO_MODE_AF_PP, .Mode = GPIO_MODE_AF_PP,
@ -348,6 +362,7 @@ static struct stm32f4_pwm str32f4_pwm5_c2 = {
.pwm_gpio = &t5c2_gpio, .pwm_gpio = &t5c2_gpio,
.timer_handle = &tim5_handle, .timer_handle = &tim5_handle,
.output_compare_cfg = &t5_output_compare_cfg, .output_compare_cfg = &t5_output_compare_cfg,
.master_cfg = &t5_master_cfg,
.channel = TIM_CHANNEL_2, .channel = TIM_CHANNEL_2,
}; };

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@ -14,6 +14,7 @@ struct stm32f4_pwm {
const struct stm32f4_gpio *pwm_gpio; const struct stm32f4_gpio *pwm_gpio;
TIM_HandleTypeDef *timer_handle; TIM_HandleTypeDef *timer_handle;
TIM_OC_InitTypeDef *output_compare_cfg; TIM_OC_InitTypeDef *output_compare_cfg;
TIM_MasterConfigTypeDef *master_cfg;
uint32_t channel; uint32_t channel;
}; };
#pragma pack(pop) #pragma pack(pop)

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@ -30,10 +30,7 @@ int stm32f4_pwm_open(const void *pwm)
HAL_TIM_PWM_Init(this->timer_handle); HAL_TIM_PWM_Init(this->timer_handle);
HAL_TIM_PWM_ConfigChannel(this->timer_handle, this->output_compare_cfg, this->channel); HAL_TIM_PWM_ConfigChannel(this->timer_handle, this->output_compare_cfg, this->channel);
TIM_MasterConfigTypeDef sMasterConfig; HAL_TIMEx_MasterConfigSynchronization(this->timer_handle, this->master_cfg);
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
HAL_TIMEx_MasterConfigSynchronization(this->timer_handle, &sMasterConfig);
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig; TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig;
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE; sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;