pwm master config moved
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48f60f0f73
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1407b35ce8
@ -172,6 +172,11 @@ static TIM_OC_InitTypeDef t4_output_compare_cfg = {
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.OCNIdleState = TIM_OCNIDLESTATE_SET
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};
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static TIM_MasterConfigTypeDef t4_master_cfg = {
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.MasterOutputTrigger = TIM_TRGO_RESET,
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.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE,
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};
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static const GPIO_InitTypeDef port_cfg_D15 = {
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.Pin = GPIO_PIN_15,
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.Mode = GPIO_MODE_AF_PP,
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@ -189,6 +194,7 @@ static struct stm32f4_pwm str32f4_pwm_4 = {
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.pwm_gpio = &t4c4_gpio,
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.timer_handle = &tim4_handle,
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.output_compare_cfg = &t4_output_compare_cfg,
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.master_cfg = &t4_master_cfg,
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.channel = TIM_CHANNEL_4,
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};
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@ -223,6 +229,7 @@ static struct stm32f4_pwm str32f4_pwm_3 = {
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.pwm_gpio = &stm32f4_pwm_t4c3_gpio,
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.timer_handle = &tim4_handle,
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.output_compare_cfg = &t4_output_compare_cfg,
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.master_cfg = &t4_master_cfg,
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.channel = TIM_CHANNEL_3,
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};
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@ -257,6 +264,7 @@ static struct stm32f4_pwm str32f4_pwm_2 = {
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.pwm_gpio = &stm32f4_pwm_t4c2_gpio,
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.timer_handle = &tim4_handle,
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.output_compare_cfg = &t4_output_compare_cfg,
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.master_cfg = &t4_master_cfg,
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.channel = TIM_CHANNEL_2,
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};
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@ -291,6 +299,7 @@ static struct stm32f4_pwm str32f4_pwm_1 = {
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.pwm_gpio = &stm32f4_pwm_t4c1_gpio,
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.timer_handle = &tim4_handle,
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.output_compare_cfg = &t4_output_compare_cfg,
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.master_cfg = &t4_master_cfg,
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.channel = TIM_CHANNEL_1,
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};
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@ -331,6 +340,11 @@ static TIM_OC_InitTypeDef t5_output_compare_cfg = {
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.OCNIdleState = TIM_OCNIDLESTATE_SET
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};
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static TIM_MasterConfigTypeDef t5_master_cfg = {
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.MasterOutputTrigger = TIM_TRGO_RESET,
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.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE,
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};
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static const GPIO_InitTypeDef port_cfg_A1 = {
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.Pin = GPIO_PIN_1,
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.Mode = GPIO_MODE_AF_PP,
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@ -348,6 +362,7 @@ static struct stm32f4_pwm str32f4_pwm5_c2 = {
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.pwm_gpio = &t5c2_gpio,
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.timer_handle = &tim5_handle,
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.output_compare_cfg = &t5_output_compare_cfg,
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.master_cfg = &t5_master_cfg,
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.channel = TIM_CHANNEL_2,
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};
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@ -14,6 +14,7 @@ struct stm32f4_pwm {
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const struct stm32f4_gpio *pwm_gpio;
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TIM_HandleTypeDef *timer_handle;
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TIM_OC_InitTypeDef *output_compare_cfg;
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TIM_MasterConfigTypeDef *master_cfg;
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uint32_t channel;
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};
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#pragma pack(pop)
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@ -30,10 +30,7 @@ int stm32f4_pwm_open(const void *pwm)
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HAL_TIM_PWM_Init(this->timer_handle);
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HAL_TIM_PWM_ConfigChannel(this->timer_handle, this->output_compare_cfg, this->channel);
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TIM_MasterConfigTypeDef sMasterConfig;
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sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
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sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
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HAL_TIMEx_MasterConfigSynchronization(this->timer_handle, &sMasterConfig);
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HAL_TIMEx_MasterConfigSynchronization(this->timer_handle, this->master_cfg);
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TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig;
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sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
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