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Merge branch 'develop' into 'master'

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Develop



See merge request !19
This commit is contained in:
tkl
2016-08-18 11:48:33 +00:00
parent 59e79ffd4e 2346751382
commit 89f6613472
590 changed files with 176791 additions and 172791 deletions
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2
source/firmware/arch/arch.mk
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@@ -1,3 +1,3 @@
ifeq ($(CPU), stm32f4xx)
include source/firmware/arch/stm32f4xx/stm32f4xx.mk
endif
endif

47
source/firmware/arch/stm32f4xx/__dep/print.c
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@@ -1,47 +0,0 @@
#include <stdio.h>
#include <string.h>
#include "usbd_cdc_vcp.h"
/**
* @brief Transmit a char, if you want to use printf(),
* you need implement this function
*
* @param pStr Storage string.
* @param c Character to write.
*/
void PrintChar(char c) {
/* Send a char like:
while(Transfer not completed);
Transmit a char;
*/
USB_VCOM_Send( &c, 1);
}
/**
* @brief Implementation of fputs using the DBGU as the standard output. Required
* for printf().
*
* @param pStr String to write.
* @param pStream Output stream.
*
* @return Number of characters written if successful, or -1 if the output
* stream is not stdout or stderr.
*/
signed int fputs(const char *pStr, FILE *pStream)
{
#if 0
signed int num = 0;
while (*pStr != 0) {
if (fputc(*pStr, pStream) == -1) {
return -1;
}
num++;
pStr++;
}
return num;
#endif
USB_VCOM_Send((char*)pStr, strlen(pStr));
return strlen(pStr);
}

13
source/firmware/arch/stm32f4xx/__dep/print.h
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@@ -1,13 +0,0 @@
/*
* print.h
*
* Created on: May 22, 2012
* Author: tkl
*/
#ifndef PRINT_H_
#define PRINT_H_
void PrintChar(char c);
#endif /* PRINT_H_ */

513
source/firmware/arch/stm32f4xx/__dep/printf.c
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@@ -1,513 +0,0 @@
/**************************************************************************//*****
* @file printf.c
* @brief Implementation of several stdio.h methods, such as printf(),
* sprintf() and so on. This reduces the memory footprint of the
* binary when using those methods, compared to the libc implementation.
********************************************************************************/
#include <stdio.h>
#include <stdarg.h>
#include "print.h"
/** Maximum string size allowed (in bytes). */
#define MAX_STRING_SIZE 100
/** Required for proper compilation. */
struct _reent r = {0, (FILE *) 0, (FILE *) 1, (FILE *) 0};
//struct _reent *_impure_ptr = &r;
/**
* @brief Writes a character inside the given string. Returns 1.
*
* @param pStr Storage string.
* @param c Character to write.
*/
signed int PutChar(char *pStr, char c)
{
*pStr = c;
return 1;
}
/**
* @brief Writes a string inside the given string.
*
* @param pStr Storage string.
* @param pSource Source string.
* @return The size of the written
*/
signed int PutString(char *pStr, const char *pSource)
{
signed int num = 0;
while (*pSource != 0) {
*pStr++ = *pSource++;
num++;
}
return num;
}
/**
* @brief Writes an unsigned int inside the given string, using the provided fill &
* width parameters.
*
* @param pStr Storage string.
* @param fill Fill character.
* @param width Minimum integer width.
* @param value Integer value.
*/
signed int PutUnsignedInt(
char *pStr,
char fill,
signed int width,
unsigned int value)
{
signed int num = 0;
/* Take current digit into account when calculating width */
width--;
/* Recursively write upper digits */
if ((value / 10) > 0) {
num = PutUnsignedInt(pStr, fill, width, value / 10);
pStr += num;
}
/* Write filler characters */
else {
while (width > 0) {
PutChar(pStr, fill);
pStr++;
num++;
width--;
}
}
/* Write lower digit */
num += PutChar(pStr, (value % 10) + '0');
return num;
}
/**
* @brief Writes a signed int inside the given string, using the provided fill & width
* parameters.
*
* @param pStr Storage string.
* @param fill Fill character.
* @param width Minimum integer width.
* @param value Signed integer value.
*/
signed int PutSignedInt(
char *pStr,
char fill,
signed int width,
signed int value)
{
signed int num = 0;
unsigned int absolute;
/* Compute absolute value */
if (value < 0) {
absolute = -value;
}
else {
absolute = value;
}
/* Take current digit into account when calculating width */
width--;
/* Recursively write upper digits */
if ((absolute / 10) > 0) {
if (value < 0) {
num = PutSignedInt(pStr, fill, width, -(absolute / 10));
}
else {
num = PutSignedInt(pStr, fill, width, absolute / 10);
}
pStr += num;
}
else {
/* Reserve space for sign */
if (value < 0) {
width--;
}
/* Write filler characters */
while (width > 0) {
PutChar(pStr, fill);
pStr++;
num++;
width--;
}
/* Write sign */
if (value < 0) {
num += PutChar(pStr, '-');
pStr++;
}
}
/* Write lower digit */
num += PutChar(pStr, (absolute % 10) + '0');
return num;
}
/**
* @brief Writes an hexadecimal value into a string, using the given fill, width &
* capital parameters.
*
* @param pStr Storage string.
* @param fill Fill character.
* @param width Minimum integer width.
* @param maj Indicates if the letters must be printed in lower- or upper-case.
* @param value Hexadecimal value.
*
* @return The number of char written
*/
signed int PutHexa(
char *pStr,
char fill,
signed int width,
unsigned char maj,
unsigned int value)
{
signed int num = 0;
/* Decrement width */
width--;
/* Recursively output upper digits */
if ((value >> 4) > 0) {
num += PutHexa(pStr, fill, width, maj, value >> 4);
pStr += num;
}
/* Write filler chars */
else {
while (width > 0) {
PutChar(pStr, fill);
pStr++;
num++;
width--;
}
}
/* Write current digit */
if ((value & 0xF) < 10) {
PutChar(pStr, (value & 0xF) + '0');
}
else if (maj) {
PutChar(pStr, (value & 0xF) - 10 + 'A');
}
else {
PutChar(pStr, (value & 0xF) - 10 + 'a');
}
num++;
return num;
}
/* Global Functions ----------------------------------------------------------- */
/**
* @brief Stores the result of a formatted string into another string. Format
* arguments are given in a va_list instance.
*
* @param pStr Destination string.
* @param length Length of Destination string.
* @param pFormat Format string.
* @param ap Argument list.
*
* @return The number of characters written.
*/
signed int vsnprintf(char *pStr, size_t length, const char *pFormat, va_list ap)
{
char fill;
unsigned char width;
signed int num = 0;
signed int size = 0;
/* Clear the string */
if (pStr) {
*pStr = 0;
}
/* Phase string */
while (*pFormat != 0 && size < length) {
/* Normal character */
if (*pFormat != '%') {
*pStr++ = *pFormat++;
size++;
}
/* Escaped '%' */
else if (*(pFormat+1) == '%') {
*pStr++ = '%';
pFormat += 2;
size++;
}
/* Token delimiter */
else {
fill = ' ';
width = 0;
pFormat++;
/* Parse filler */
if (*pFormat == '0') {
fill = '0';
pFormat++;
}
/* Parse width */
while ((*pFormat >= '0') && (*pFormat <= '9')) {
width = (width*10) + *pFormat-'0';
pFormat++;
}
/* Check if there is enough space */
if (size + width > length) {
width = length - size;
}
/* Parse type */
switch (*pFormat) {
case 'd':
case 'i': num = PutSignedInt(pStr, fill, width, va_arg(ap, signed int)); break;
case 'u': num = PutUnsignedInt(pStr, fill, width, va_arg(ap, unsigned int)); break;
case 'x': num = PutHexa(pStr, fill, width, 0, va_arg(ap, unsigned int)); break;
case 'X': num = PutHexa(pStr, fill, width, 1, va_arg(ap, unsigned int)); break;
case 's': num = PutString(pStr, va_arg(ap, char *)); break;
case 'c': num = PutChar(pStr, va_arg(ap, unsigned int)); break;
default:
return EOF;
}
pFormat++;
pStr += num;
size += num;
}
}
/* NULL-terminated (final \0 is not counted) */
if (size < length) {
*pStr = 0;
}
else {
*(--pStr) = 0;
size--;
}
return size;
}
/**
* @brief Stores the result of a formatted string into another string. Format
* arguments are given in a va_list instance.
*
* @param pStr Destination string.
* @param length Length of Destination string.
* @param pFormat Format string.
* @param ... Other arguments
*
* @return The number of characters written.
*/
signed int snprintf(char *pString, size_t length, const char *pFormat, ...)
{
va_list ap;
signed int rc;
va_start(ap, pFormat);
rc = vsnprintf(pString, length, pFormat, ap);
va_end(ap);
return rc;
}
/**
* @brief Stores the result of a formatted string into another string. Format
* arguments are given in a va_list instance.
*
* @param pString Destination string.
* @param length Length of Destination string.
* @param pFormat Format string.
* @param ap Argument list.
*
* @return The number of characters written.
*/
signed int vsprintf(char *pString, const char *pFormat, va_list ap)
{
return vsnprintf(pString, MAX_STRING_SIZE, pFormat, ap);
}
/**
* @brief Outputs a formatted string on the given stream. Format arguments are given
* in a va_list instance.
*
* @param pStream Output stream.
* @param pFormat Format string
* @param ap Argument list.
*/
signed int vfprintf(FILE *pStream, const char *pFormat, va_list ap)
{
char pStr[MAX_STRING_SIZE];
char pError[] = "stdio.c: increase MAX_STRING_SIZE\n\r";
/* Write formatted string in buffer */
if (vsprintf(pStr, pFormat, ap) >= MAX_STRING_SIZE) {
fputs(pError, stderr);
while (1); /* Increase MAX_STRING_SIZE */
}
/* Display string */
return fputs(pStr, pStream);
}
/**
* @brief Outputs a formatted string on the DBGU stream. Format arguments are given
* in a va_list instance.
*
* @param pFormat Format string.
* @param ap Argument list.
*/
signed int vprintf(const char *pFormat, va_list ap)
{
return vfprintf(stdout, pFormat, ap);
}
/**
* @brief Outputs a formatted string on the given stream, using a variable
* number of arguments.
*
* @param pStream Output stream.
* @param pFormat Format string.
*/
signed int fprintf(FILE *pStream, const char *pFormat, ...)
{
va_list ap;
signed int result;
/* Forward call to vfprintf */
va_start(ap, pFormat);
result = vfprintf(pStream, pFormat, ap);
va_end(ap);
return result;
}
/**
* @brief Outputs a formatted string on the DBGU stream, using a variable number of
* arguments.
*
* @param pFormat Format string.
*/
signed int printf(const char *pFormat, ...)
{
va_list ap;
signed int result;
/* Forward call to vprintf */
va_start(ap, pFormat);
result = vprintf(pFormat, ap);
va_end(ap);
return result;
}
/**
* @brief Writes a formatted string inside another string.
*
* @param pStr torage string.
* @param pFormat Format string.
*/
signed int sprintf(char *pStr, const char *pFormat, ...)
{
va_list ap;
signed int result;
// Forward call to vsprintf
va_start(ap, pFormat);
result = vsprintf(pStr, pFormat, ap);
va_end(ap);
return result;
}
/**
* @brief Outputs a string on stdout.
*
* @param pStr String to output.
*/
signed int puts(const char *pStr)
{
return fputs(pStr, stdout);
}
/**
* @brief Implementation of fputc using the DBGU as the standard output. Required
* for printf().
*
* @param c Character to write.
* @param pStream Output stream.
* @param The character written if successful, or -1 if the output stream is
* not stdout or stderr.
*/
signed int fputc(signed int c, FILE *pStream)
{
if ((pStream == stdout) || (pStream == stderr)) {
PrintChar(c);
return c;
}
else {
return EOF;
}
}

172
source/firmware/arch/stm32f4xx/_initialize_hardware.c Normal file
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@@ -0,0 +1,172 @@
//
// This file is part of the GNU ARM Eclipse distribution.
// Copyright (c) 2014 Liviu Ionescu.
//
// ----------------------------------------------------------------------------
#include "stm32f4xx.h"
#include "stm32f4xx_hal.h"
#include "stm32f4xx_hal_cortex.h"
// ----------------------------------------------------------------------------
// The external clock frequency is specified as a preprocessor definition
// passed to the compiler via a command line option (see the 'C/C++ General' ->
// 'Paths and Symbols' -> the 'Symbols' tab, if you want to change it).
// The value selected during project creation was HSE_VALUE=8000000.
//
// The code to set the clock is at the end.
//
// Note1: The default clock settings assume that the HSE_VALUE is a multiple
// of 1MHz, and try to reach the maximum speed available for the
// board. It does NOT guarantee that the required USB clock of 48MHz is
// available. If you need this, please update the settings of PLL_M, PLL_N,
// PLL_P, PLL_Q to match your needs.
//
// Note2: The external memory controllers are not enabled. If needed, you
// have to define DATA_IN_ExtSRAM or DATA_IN_ExtSDRAM and to configure
// the memory banks in system/src/cmsis/system_stm32f4xx.c to match your needs.
// ----------------------------------------------------------------------------
// Forward declarations.
void
__initialize_hardware(void);
void
SystemClock_Config(void);
// ----------------------------------------------------------------------------
// This is the application hardware initialisation routine,
// redefined to add more inits.
//
// Called early from _start(), right after data & bss init, before
// constructors.
//
// After Reset the Cortex-M processor is in Thread mode,
// priority is Privileged, and the Stack is set to Main.
//
// Warning: The HAL requires the system timer, running at 1000 Hz
// and calling HAL_IncTick().
void
__initialize_hardware(void)
{
// Initialise the HAL Library; it must be the first function
// to be executed before the call of any HAL function.
HAL_Init();
// Enable HSE Oscillator and activate PLL with HSE as source
SystemClock_Config();
// Call the CSMSIS system clock routine to store the clock frequency
// in the SystemCoreClock global RAM location.
SystemCoreClockUpdate();
}
// Disable when using RTOSes, since they have their own handler.
#if 0
// This is a sample SysTick handler, use it if you need HAL timings.
void __attribute__ ((section(".after_vectors")))
SysTick_Handler(void)
{
#if defined(USE_HAL_DRIVER)
HAL_IncTick();
#endif
}
#endif
// ----------------------------------------------------------------------------
/**
* @brief System Clock Configuration
* @param None
* @retval None
*/
void
__attribute__((weak))
SystemClock_Config(void)
{
// Enable Power Control clock
__PWR_CLK_ENABLE();
// The voltage scaling allows optimizing the power consumption when the
// device is clocked below the maximum system frequency, to update the
// voltage scaling value regarding system frequency refer to product
// datasheet.
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
//#warning "Please check if the SystemClock_Config() settings match your board!"
// Comment out the warning after checking and updating.
RCC_OscInitTypeDef RCC_OscInitStruct;
#if defined(HSE_VALUE) && (HSE_VALUE != 0)
// Enable HSE Oscillator and activate PLL with HSE as source.
// This is tuned for STM32F4-DISCOVERY; update it for your board.
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
// This assumes the HSE_VALUE is a multiple of 1 MHz. If this is not
// your case, you have to recompute these PLL constants.
RCC_OscInitStruct.PLL.PLLM = (HSE_VALUE/1000000u);
#else
// Use HSI and activate PLL with HSI as source.
// This is tuned for NUCLEO-F411; update it for your board.
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
// 16 is the average calibration value, adjust for your own board.
RCC_OscInitStruct.HSICalibrationValue = 16;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
// This assumes the HSI_VALUE is a multiple of 1 MHz. If this is not
// your case, you have to recompute these PLL constants.
RCC_OscInitStruct.PLL.PLLM = (HSI_VALUE/1000000u);
#endif
RCC_OscInitStruct.PLL.PLLN = 336;
#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; /* 84 MHz */
#elif defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; /* 168 MHz */
#elif defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; /* 168 MHz */
#elif defined(STM32F446xx)
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; /* 168 MHz */
#else
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; /* 84 MHz, conservative */
#endif
RCC_OscInitStruct.PLL.PLLQ = 7; /* To make USB work. */
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
RCC_ClkInitTypeDef RCC_ClkInitStruct;
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
// clocks dividers
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
#else
// This is expected to work for most large cores.
// Check and update it for your own configuration.
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
#endif
HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
}
// ----------------------------------------------------------------------------

50
source/firmware/arch/stm32f4xx/_write.c Normal file
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@@ -0,0 +1,50 @@
//
// This file is part of the µOS++ III distribution.
// Copyright (c) 2014 Liviu Ionescu.
//
// Do not include on semihosting and when freestanding
#if !defined(OS_USE_SEMIHOSTING) && !(__STDC_HOSTED__ == 0)
// ----------------------------------------------------------------------------
#include <errno.h>
#include "diag/Trace.h"
// ----------------------------------------------------------------------------
// When using retargetted configurations, the standard write() system call,
// after a long way inside newlib, finally calls this implementation function.
// Based on the file descriptor, it can send arrays of characters to
// different physical devices.
// Currently only the output and error file descriptors are tested,
// and the characters are forwarded to the trace device, mainly
// for demonstration purposes. Adjust it for your specific needs.
// For freestanding applications this file is not used and can be safely
// ignored.
ssize_t
_write (int fd, const char* buf, size_t nbyte);
ssize_t
_write (int fd __attribute__((unused)), const char* buf __attribute__((unused)),
size_t nbyte __attribute__((unused)))
{
#if defined(TRACE)
// STDOUT and STDERR are routed to the trace device
if (fd == 1 || fd == 2)
{
return trace_write (buf, nbyte);
}
#endif // TRACE
errno = ENOSYS;
return -1;
}
// ----------------------------------------------------------------------------
#endif // !defined(OS_USE_SEMIHOSTING) && !(__STDC_HOSTED__ == 0)

4
source/firmware/arch/stm32f4xx/board/board.h
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@@ -6,8 +6,8 @@
#ifndef BOARD_H_
#define BOARD_H_
#ifdef BOARD_STM32F4_DISCOVERY
//#ifdef BOARD_STM32F4_DISCOVERY
#include "stm32f4-discovery.h"
#endif
//#endif
#endif /* BOARD_H_ */

4
source/firmware/arch/stm32f4xx/board/board.mk
View File

@@ -1,6 +1,6 @@
INCLUDES += source/firmware/arch/stm32f4xx/board
DOC_SRC += source/firmware/arch/stm32f4xx/board
ifeq ($(BOARD), stm32f4-discovery)
#ifeq ($(BOARD), stm32f4-discovery)
include source/firmware/arch/stm32f4xx/board/stm32f4-discovery/stm32f4-discovery.mk
endif
#endif

277
source/firmware/arch/stm32f4xx/board/stm32f4-discovery/include/stm32f4-discovery.h
View File

@@ -6,78 +6,107 @@
#ifndef BSP_STM32F4_DISCOVERY_H_
#define BSP_STM32F4_DISCOVERY_H_
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
#include <stddef.h>
#include <stdint.h>
#include "driver.h"
#include "gpio.h"
#include "pwm.h"
#include "timer.h"
#include "uart.h"
#include "ringbuffer.h"
#include "sys_tick.h"
#include "stm32f4xx.h"
#include "stm32f4_gpio.h"
#include "stm32f4_pwm.h"
#include "stm32f4_uart.h"
#include "stm32_sys_tick.h"
#include "pwm.h"
#include "stm32f4_pwm.h"
#include "uart.h"
#include "stm32f4_uart.h"
#include "ringbuffer.h"
#include "timer.h"
#include "stm32_sys_tick.h"
#include "sys_tick.h"
#include "gpio.h"
#include "stm32f4_gpio.h"
#include "driver.h"
#if 0
// GPIO_D12
static const GPIO_InitTypeDef port_cfg_d12 = {
.Pin = GPIO_PIN_12,
.Mode = GPIO_MODE_OUTPUT_PP,
.Speed = GPIO_SPEED_FREQ_HIGH,
.Pull = GPIO_PULLUP,
};
static const struct stm32f4_gpio stm32_f4_gpio_d12 = {
.port = GPIOD,
.pin = &port_cfg_d12,
};
static const struct gpio __gpio_d12 = {
(void*)&stm32_f4_gpio_d12,
&gpio_fp
};
static const struct driver gpio_d12 = {
DRIVER_TYPE_GPIO,
&__gpio_d12,
};
#endif
// SYSTEM TICK
static const enum stm32_sys_tick_time_base stm23_sys_tick_time_base =
STM32_SYS_TICK_TIME_BASE_MS;
static const struct stm32_sys_tick stm32_sys_tick = {
&stm23_sys_tick_time_base,
NULL,
NULL
.tick_time_base = &stm23_sys_tick_time_base,
.sys_tick_cb = NULL,
.sys_tick_cb_param = NULL,
};
static const struct loki_timer timer_1 = {
(void*)&stm32_sys_tick,
&timer_fp
.arch_dep_device = (void*)&stm32_sys_tick,
.fp = &timer_fp
};
// PWM CHANNEL 4
/* apb1 clock = 84MHz */
/* period_reg = src_clk / presc / cnt_clk */
/* 4199 = 84MHZ / (0 + 1) / 20kHz - 1 */
static const TIM_TimeBaseInitTypeDef timer_4_cfg = {
.TIM_RepetitionCounter = 0x0000,
.TIM_Prescaler = 0,
.TIM_ClockDivision = TIM_CKD_DIV1,
.TIM_CounterMode = TIM_CounterMode_Up,
.TIM_Period = 4199
static TIM_HandleTypeDef tim4_handle = {
.Instance = TIM4,
.Init.Prescaler = 0,
.Init.CounterMode = TIM_COUNTERMODE_UP,
.Init.Period = 4199,
.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1,
.Init.RepetitionCounter = 0,
};
static const TIM_OCInitTypeDef t4_output_compare_cfg = {
.TIM_OutputNState = TIM_OutputNState_Disable,
.TIM_OCNPolarity = TIM_OCPolarity_High,
.TIM_OCIdleState = TIM_OCIdleState_Reset,
.TIM_OCNIdleState = TIM_OCNIdleState_Set,
.TIM_OCMode = TIM_OCMode_PWM1,
.TIM_OCPolarity = TIM_OCPolarity_High,
.TIM_OutputState = TIM_OutputState_Enable,
.TIM_Pulse = 0,
static TIM_OC_InitTypeDef t4_output_compare_cfg = {
.OCMode = TIM_OCMODE_PWM1,
.Pulse = 0,
.OCPolarity = TIM_OCPOLARITY_HIGH,
.OCNPolarity = TIM_OCNPOLARITY_HIGH,
.OCFastMode = TIM_OCFAST_DISABLE,
.OCIdleState = TIM_OCIDLESTATE_SET,
.OCNIdleState = TIM_OCNIDLESTATE_SET
};
static const GPIO_InitTypeDef port_cfg_D15 = {
.GPIO_Pin = GPIO_Pin_15,
.GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP,
.GPIO_Speed = GPIO_Speed_100MHz,
.Pin = GPIO_PIN_15,
.Mode = GPIO_MODE_AF_PP,
.Speed = GPIO_SPEED_FREQ_HIGH,
.Pull = GPIO_PULLUP,
.Alternate = GPIO_AF2_TIM4,
};
static const struct stm32f4_gpio t4c4_gpio = {
.port = GPIOD,
.pin = &port_cfg_D15,
};
static struct stm32f4_pwm str32f4_pwm_4 = {
.timer = TIM4,
.timer_cfg = &timer_4_cfg,
.pwm_gpio = &t4c4_gpio,
.timer_handle = &tim4_handle,
.output_compare_cfg = &t4_output_compare_cfg,
.port = GPIOD,
.pin_src = GPIO_PinSource15,
.port_cfg = &port_cfg_D15,
.channel = channel_4,
.channel = TIM_CHANNEL_4,
};
static const struct pwm pwm_ch4 = {
@@ -96,21 +125,22 @@ const struct driver pwm_4 = {
// PWM Channel 3
static const GPIO_InitTypeDef port_cfg_D14 = {
.GPIO_Pin = GPIO_Pin_14,
.GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP,
.GPIO_Speed = GPIO_Speed_100MHz,
.Pin = GPIO_PIN_14,
.Mode = GPIO_MODE_AF_PP,
.Speed = GPIO_SPEED_FREQ_HIGH,
.Pull = GPIO_PULLUP,
.Alternate = GPIO_AF2_TIM4,
};
static const struct stm32f4_gpio stm32f4_pwm_t4c3_gpio = {
.port = GPIOD,
.pin = &port_cfg_D14,
};
static struct stm32f4_pwm str32f4_pwm_3 = {
.timer = TIM4,
.timer_cfg = &timer_4_cfg,
.pwm_gpio = &stm32f4_pwm_t4c3_gpio,
.timer_handle = &tim4_handle,
.output_compare_cfg = &t4_output_compare_cfg,
.port = GPIOD,
.pin_src = GPIO_PinSource14,
.port_cfg = &port_cfg_D14,
.channel = channel_3,
.channel = TIM_CHANNEL_3,
};
static const struct pwm pwm_ch3 = {
@@ -129,21 +159,22 @@ const struct driver pwm_3 = {
// PWM Channel 2
static const GPIO_InitTypeDef port_cfg_D13 = {
.GPIO_Pin = GPIO_Pin_13,
.GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP,
.GPIO_Speed = GPIO_Speed_100MHz,
.Pin = GPIO_PIN_13,
.Mode = GPIO_MODE_AF_PP,
.Speed = GPIO_SPEED_FREQ_HIGH,
.Pull = GPIO_PULLUP,
.Alternate = GPIO_AF2_TIM4,
};
static const struct stm32f4_gpio stm32f4_pwm_t4c2_gpio = {
.port = GPIOD,
.pin = &port_cfg_D13,
};
static struct stm32f4_pwm str32f4_pwm_2 = {
.timer = TIM4,
.timer_cfg = &timer_4_cfg,
.pwm_gpio = &stm32f4_pwm_t4c2_gpio,
.timer_handle = &tim4_handle,
.output_compare_cfg = &t4_output_compare_cfg,
.port = GPIOD,
.pin_src = GPIO_PinSource13,
.port_cfg = &port_cfg_D13,
.channel = channel_2,
.channel = TIM_CHANNEL_2,
};
static const struct pwm pwm_ch2 = {
@@ -162,21 +193,22 @@ const struct driver pwm_2 = {
// PWM Channel 1
static const GPIO_InitTypeDef port_cfg_D12 = {
.GPIO_Pin = GPIO_Pin_12,
.GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP,
.GPIO_Speed = GPIO_Speed_100MHz,
.Pin = GPIO_PIN_12,
.Mode = GPIO_MODE_AF_PP,
.Speed = GPIO_SPEED_FREQ_HIGH,
.Pull = GPIO_PULLUP,
.Alternate = GPIO_AF2_TIM4,
};
static const struct stm32f4_gpio stm32f4_pwm_t4c1_gpio = {
.port = GPIOD,
.pin = &port_cfg_D12,
};
static struct stm32f4_pwm str32f4_pwm_1 = {
.timer = TIM4,
.timer_cfg = &timer_4_cfg,
.pwm_gpio = &stm32f4_pwm_t4c1_gpio,
.timer_handle = &tim4_handle,
.output_compare_cfg = &t4_output_compare_cfg,
.port = GPIOD,
.pin_src = GPIO_PinSource12,
.port_cfg = &port_cfg_D12,
.channel = channel_1,
.channel = TIM_CHANNEL_1,
};
static const struct pwm pwm_ch1 = {
@@ -194,49 +226,54 @@ const struct driver pwm_1 = {
};
// UART 1
static char console_linear_buffer[80];
static const GPIO_InitTypeDef port_cfg_uart1 = {
.Pin = GPIO_PIN_6 | GPIO_PIN_7,
.Mode = GPIO_MODE_AF_PP,
.Pull = GPIO_PULLUP,
.Speed = GPIO_SPEED_FREQ_HIGH,
.Alternate = GPIO_AF7_USART1,
};
static const struct stm32f4_gpio stm32f4_uart1_gpio = {
.port = GPIOB,
.pin = &port_cfg_uart1,
};
static UART_HandleTypeDef stm32f4_discovery_uart1_handle = {
.Instance = USART1,
.Init.BaudRate = 115200,
.Init.WordLength = UART_WORDLENGTH_8B,
.Init.StopBits = UART_STOPBITS_1,
.Init.Parity = UART_PARITY_NONE,
.Init.Mode = UART_MODE_TX_RX,
.Init.HwFlowCtl = UART_HWCONTROL_NONE,
.Init.OverSampling = UART_OVERSAMPLING_16,
.pTxBuffPtr = NULL,
.TxXferSize = 0,
.TxXferCount = 0,
.pRxBuffPtr = NULL,
.RxXferSize = 0,
.RxXferCount = 0,
.hdmatx = NULL,
.hdmarx = NULL,
.Lock = HAL_UNLOCKED,
.gState = HAL_UART_STATE_RESET,
.ErrorCode = 0,
};
static const struct stm32f4_uart stm32f4_uart1 = {
.uart_gpio = &stm32f4_uart1_gpio,
.uart_handle = &stm32f4_discovery_uart1_handle,
};
static char console_linear_buffer[10];
static struct ringbuffer console_buffer = {
console_linear_buffer,
console_linear_buffer,
console_linear_buffer,
sizeof(console_linear_buffer),
10,
0
};
static const GPIO_InitTypeDef stm32f4_discovery_uart1_gpio = {
GPIO_Pin_6 | GPIO_Pin_7,
GPIO_Mode_AF,
GPIO_Speed_50MHz,
GPIO_OType_PP,
GPIO_PuPd_UP
};
static const USART_InitTypeDef stm32f4_discovery_uart1_usart_init = {
115200,
USART_WordLength_8b,
USART_StopBits_1,
USART_Parity_No,
USART_Mode_Tx | USART_Mode_Rx,
USART_HardwareFlowControl_None,
};
static const NVIC_InitTypeDef stm32f4_discovery_uart1_nvic_init = {
USART1_IRQn,
0,
0,
ENABLE,
};
static const struct stm32f4_uart stm32f4_uart1 = {
&stm32f4_discovery_uart1_gpio,
GPIOB,
GPIO_PinSource7,
GPIO_PinSource6,
&stm32f4_discovery_uart1_usart_init,
USART1,
USART_IT_RXNE /* | USART_IT_TXE*/,
&stm32f4_discovery_uart1_nvic_init,
};
static const struct uart __uart_1 = {
&stm32f4_uart1,
@@ -253,6 +290,7 @@ const struct driver uart_1 = {
&__uart_1,
};
#if 0
// GPIOC0
static const GPIO_InitTypeDef port_cfg_C0 = {
GPIO_Pin_0,
@@ -284,7 +322,8 @@ const struct driver gpio_c0 = {
DRIVER_TYPE_GPIO,
&__gpio_c0,
};
#endif
#if 0
// GPIO_C1
static const GPIO_InitTypeDef port_cfg_C1 = {
GPIO_Pin_1,
@@ -316,7 +355,8 @@ const struct driver gpio_c1 = {
DRIVER_TYPE_GPIO,
&__gpio_c1,
};
#endif
#if 0
// GPIO_C2
static const GPIO_InitTypeDef port_cfg_C2 = {
GPIO_Pin_2,
@@ -348,7 +388,8 @@ const struct driver gpio_c2 = {
DRIVER_TYPE_GPIO,
&__gpio_c2,
};
#endif
#if 0
// GPIO_C3
static const GPIO_InitTypeDef port_cfg_C3 = {
GPIO_Pin_3,
@@ -380,7 +421,7 @@ const struct driver gpio_c3 = {
DRIVER_TYPE_GPIO,
&__gpio_c3,
};
#endif
//! \brief Setup the hardware of the stm32f4-discovery board.
void board_init(void);

6
source/firmware/arch/stm32f4xx/board/stm32f4-discovery/stm32f4-discovery.c
View File

@@ -7,10 +7,12 @@
#include "board.h"
void board_init(void) {
void board_init(void)
{
#if 0
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0);
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4);
SysTick_CLKSourceConfig(RCC_SYSCLKSource_PLLCLK);
#endif
sys_tick_init(&timer_1);
}

4
source/firmware/arch/stm32f4xx/board/stm32f4-discovery/stm32f4-discovery.mk
View File

@@ -1,4 +1,2 @@
CHECK_FOLDER += source/firmware/arch/stm32f4xx/board/stm32f4-discovery
SUB_FOLDER += source/firmware/arch/stm32f4xx/board/stm32f4-discovery
SRC_DIR += source/firmware/arch/stm32f4xx/board/stm32f4-discovery
INCLUDES += source/firmware/arch/stm32f4xx/board/stm32f4-discovery/include
DOC_SRC += source/firmware/arch/stm32f4xx/board/stm32f4-discovery

5
source/firmware/arch/stm32f4xx/driver/driver.mk
View File

@@ -1,5 +1,2 @@
CHECK_FOLDER += source/firmware/arch/stm32f4xx/driver
SUB_FOLDER += source/firmware/arch/stm32f4xx/driver
SRC_DIR += source/firmware/arch/stm32f4xx/driver
INCLUDES += source/firmware/arch/stm32f4xx/driver/include
DOC_SRC += source/firmware/arch/stm32f4xx/driver
DOC_SRC += source/firmware/arch/stm32f4xx/driver/include

2
source/firmware/arch/stm32f4xx/driver/include/stm32_sys_tick.h Executable file → Normal file
View File

@@ -5,8 +5,6 @@
#ifndef STM32_SYS_TICK_H_
#define STM32_SYS_TICK_H_
#include "timer.h"
typedef void* (*stm32_sys_tick_cb_t)(void*); //!< callback for the external interrupt
//! \brief Type of sys tick base time.

4
source/firmware/arch/stm32f4xx/driver/include/stm32f4_gpio.h
View File

@@ -12,10 +12,6 @@ typedef void* (*gpio_ext_it_cb_t)(void*);
struct stm32f4_gpio {
GPIO_TypeDef *port; //!< Gpio port
const GPIO_InitTypeDef *pin; //!< Gpio pin
const EXTI_InitTypeDef *exti; //!< Gpio exit it (could be NULL)
const NVIC_InitTypeDef *nvic; //!< Gpio nvic (could be NULL)
gpio_ext_it_cb_t ext_it_cb; //!< Gpio ext it callback (could be NULL)
void *param; //!< Parameter for the callback
};
//! \brief Open a gpio.

22
source/firmware/arch/stm32f4xx/driver/include/stm32f4_pwm.h
View File

@@ -8,23 +8,15 @@
#ifndef SOURCE_FIRMWARE_ARCH_STM32F4XX_DRIVER_INCLUDE_STM32F4_PWM_H_
#define SOURCE_FIRMWARE_ARCH_STM32F4XX_DRIVER_INCLUDE_STM32F4_PWM_H_
enum stm32f4_pwm_channel {
channel_1 = 1,
channel_2,
channel_3,
channel_4
};
#pragma pack(push)
#pragma pack(1)
struct stm32f4_pwm {
TIM_TypeDef *timer;
const TIM_TimeBaseInitTypeDef *timer_cfg;
const TIM_OCInitTypeDef *output_compare_cfg;
const TIM_BDTRInitTypeDef *bdtr_cfg;
GPIO_TypeDef *port;
uint8_t pin_src;
const GPIO_InitTypeDef *port_cfg;
enum stm32f4_pwm_channel channel;
const struct stm32f4_gpio *pwm_gpio;
TIM_HandleTypeDef *timer_handle;
TIM_OC_InitTypeDef *output_compare_cfg;
uint32_t channel;
};
#pragma pack(pop)
int stm32f4_pwm_open(const void *pwm);

15
source/firmware/arch/stm32f4xx/driver/include/stm32f4_uart.h
View File

@@ -1,5 +1,5 @@
/*
* stm32_uart.h
* stm32f4_uart.h
*
* Created on: Jul 24, 2016
* Author: tkl
@@ -12,16 +12,13 @@
#include "uart.h"
//! \brief Stm32f4 uart device.
#pragma pack(push)
#pragma pack(1)
struct stm32f4_uart {
const GPIO_InitTypeDef *gpio_init;
GPIO_TypeDef *gpio_port;
uint8_t pin_src_rx;
uint8_t pin_src_tx;
const USART_InitTypeDef *usart_init;
USART_TypeDef *usart_port;
uint16_t usart_it_select;
const NVIC_InitTypeDef *nvic_init;
const struct stm32f4_gpio *uart_gpio;
UART_HandleTypeDef *uart_handle;
};
#pragma pack(pop)
//! \brief Open an uart device.
//! \param this The uart to open.

9
source/firmware/arch/stm32f4xx/driver/stm32_sys_tick.c
View File

@@ -8,6 +8,7 @@
#include "stm32f4xx.h"
#include "timer.h"
#include "stm32_sys_tick.h"
#include "stm32f4xx_isr.h"
@@ -67,6 +68,9 @@ void SysTick_Handler(void)
{
enter_isr();
#if defined(USE_HAL_DRIVER)
HAL_IncTick();
#endif
if(stm32_sys_tick_obj.sys_tick_cb != NULL) {
stm32_sys_tick_cb_t cb = stm32_sys_tick_obj.sys_tick_cb;
void *param = stm32_sys_tick_obj.sys_tick_cb_param;
@@ -75,3 +79,8 @@ void SysTick_Handler(void)
exit_isr();
}
HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority)
{
return HAL_OK;
}

126
source/firmware/arch/stm32f4xx/driver/stm32f4_gpio.c
View File

@@ -17,6 +17,7 @@ typedef struct {
void *param; //!< Parameter for the callback
}exti_cb_list_t;
#if 0
//! \brief Contains call back data for all 16 exti lines.
static struct {
exti_cb_list_t callback_list[16]; //!< Call back data list for the exti lines.
@@ -45,83 +46,34 @@ static uint8_t gpio_bin2dec(uint16_t bin)
}
return ret;
}
static void gpio_init(const struct stm32f4_gpio *gpio)
{
uint8_t m_port = 0;
uint8_t m_pin = 0;
uint32_t clock = 0;
if(gpio == NULL)
return;
if(gpio->port == GPIOA) {
clock = RCC_AHB1Periph_GPIOA;
m_port = EXTI_PortSourceGPIOA;
}
else if(gpio->port == GPIOB) {
clock = RCC_AHB1Periph_GPIOB;
m_port = EXTI_PortSourceGPIOB;
}
else if(gpio->port == GPIOC) {
clock = RCC_AHB1Periph_GPIOC;
m_port = EXTI_PortSourceGPIOC;
}
else if(gpio->port == GPIOD) {
clock = RCC_AHB1Periph_GPIOD;
m_port = EXTI_PortSourceGPIOD;
}
else if(gpio->port == GPIOE) {
clock = RCC_AHB1Periph_GPIOE;
m_port = EXTI_PortSourceGPIOE;
}
else if(gpio->port == GPIOF) {
clock = RCC_AHB1Periph_GPIOF;
m_port = EXTI_PortSourceGPIOF;
}
else if(gpio->port == GPIOG) {
clock = RCC_AHB1Periph_GPIOG;
m_port = EXTI_PortSourceGPIOG;
}
else if(gpio->port == GPIOH) {
clock = RCC_AHB1Periph_GPIOH;
m_port = EXTI_PortSourceGPIOH;
}
else if(gpio->port == GPIOI) {
clock = RCC_AHB1Periph_GPIOI;
m_port = EXTI_PortSourceGPIOI;
}
RCC_AHB1PeriphClockCmd(clock, ENABLE);
m_pin = gpio_bin2dec(gpio->pin->GPIO_Pin);
SYSCFG_EXTILineConfig(m_port, m_pin);
}
#endif
int stm32f4_gpio_open(const void *gpio)
{
struct stm32f4_gpio *this;
uint8_t m_pin = 0;
if(gpio == NULL)
return -1;
this = (struct stm32f4_gpio *)gpio;
gpio_init(this);
m_pin = gpio_bin2dec(this->pin->GPIO_Pin);
GPIO_Init(this->port, (GPIO_InitTypeDef*)this->pin);
if(this->ext_it_cb != NULL) {
gpio_obj.callback_list[m_pin].callback = this->ext_it_cb;
gpio_obj.callback_list[m_pin].param = this->param;
}
if((this->exti != NULL) && (this->nvic != NULL)) {
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
EXTI_Init((EXTI_InitTypeDef*)this->exti);
NVIC_Init((NVIC_InitTypeDef*)this->nvic);
}
if(this->port == GPIOA)
__HAL_RCC_GPIOA_CLK_ENABLE();
else if(this->port == GPIOB)
__HAL_RCC_GPIOB_CLK_ENABLE();
else if(this->port == GPIOC)
__HAL_RCC_GPIOC_CLK_ENABLE();
else if(this->port == GPIOD)
__HAL_RCC_GPIOD_CLK_ENABLE();
else if(this->port == GPIOE)
__HAL_RCC_GPIOE_CLK_ENABLE();
else if(this->port == GPIOF)
__HAL_RCC_GPIOF_CLK_ENABLE();
else if(this->port == GPIOG)
__HAL_RCC_GPIOG_CLK_ENABLE();
else if(this->port == GPIOH)
__HAL_RCC_GPIOH_CLK_ENABLE();
else if(this->port == GPIOI)
__HAL_RCC_GPIOI_CLK_ENABLE();
HAL_GPIO_Init(this->port, (GPIO_InitTypeDef*)this->pin);
return 0;
}
@@ -129,7 +81,26 @@ int stm32f4_gpio_close(const void *gpio)
{
if(gpio == NULL)
return -1;
// TODO: deinit exti, nvic & gpio
struct stm32f4_gpio *this = (struct stm32f4_gpio *)gpio;
HAL_GPIO_DeInit(this->port, this->pin->Pin);
if(this->port == GPIOA)
__HAL_RCC_GPIOA_CLK_DISABLE();
else if(this->port == GPIOB)
__HAL_RCC_GPIOB_CLK_DISABLE();
else if(this->port == GPIOC)
__HAL_RCC_GPIOC_CLK_DISABLE();
else if(this->port == GPIOD)
__HAL_RCC_GPIOD_CLK_DISABLE();
else if(this->port == GPIOE)
__HAL_RCC_GPIOE_CLK_DISABLE();
else if(this->port == GPIOF)
__HAL_RCC_GPIOF_CLK_DISABLE();
else if(this->port == GPIOG)
__HAL_RCC_GPIOG_CLK_DISABLE();
else if(this->port == GPIOH)
__HAL_RCC_GPIOH_CLK_DISABLE();
else if(this->port == GPIOI)
__HAL_RCC_GPIOI_CLK_DISABLE();
return 0;
}
@@ -140,7 +111,7 @@ char stm32f4_gpio_read(const void *gpio)
return 0;
this = (struct stm32f4_gpio *)gpio;
return GPIO_ReadOutputDataBit(this->port, this->pin->GPIO_Pin);
return HAL_GPIO_ReadPin(this->port, this->pin->Pin);
}
void stm32f4_gpio_write(const void *gpio, char byte) {
@@ -149,7 +120,7 @@ void stm32f4_gpio_write(const void *gpio, char byte) {
return;
this = (struct stm32f4_gpio *)gpio;
GPIO_WriteBit(this->port, this->pin->GPIO_Pin, (BitAction)byte);
HAL_GPIO_WritePin(this->port, this->pin->Pin, (GPIO_PinState)(byte & 0x01));
}
void stm32f4_gpio_toggle(const void *gpio)
@@ -159,16 +130,13 @@ void stm32f4_gpio_toggle(const void *gpio)
return;
this = (struct stm32f4_gpio *)gpio;
BitAction act = Bit_SET;
if(GPIO_ReadOutputDataBit(this->port, this->pin->GPIO_Pin))
act = Bit_RESET;
GPIO_WriteBit(this->port, this->pin->GPIO_Pin, act);
HAL_GPIO_TogglePin(this->port, this->pin->Pin);
}
int stm32f4_gpio_set_exti_callback(const void *gpio,
const void *callback, const void *param)
{
#if 0
struct stm32f4_gpio *this;
uint8_t pin;
if((gpio == NULL) || (callback == NULL))
@@ -179,10 +147,11 @@ int stm32f4_gpio_set_exti_callback(const void *gpio,
gpio_obj.callback_list[pin].callback = (gpio_ext_it_cb_t)callback;
gpio_obj.callback_list[pin].param = (void*)param;
#endif
return 0;
}
#if 0
//! \brief The ISR for the EXTI0_IRQn interrupt.
void EXTI0_IRQHandler(void)
{
@@ -258,3 +227,4 @@ void EXTI9_5_IRQHandler(void) {
void EXTI15_10_IRQHandler(void) {
// TODO: detect & clear pending bit
}
#endif

100
source/firmware/arch/stm32f4xx/driver/stm32f4_pwm.c
View File

@@ -9,9 +9,14 @@
#include "stm32f4xx.h"
#include "gpio.h"
#include "stm32f4_gpio.h"
#include "pwm.h"
#include "stm32f4_pwm.h"
#pragma pack(push)
#pragma pack(1)
struct stm32f4_pwm_object {
uint8_t used_channels;
uint32_t channel_1_max_period;
@@ -19,61 +24,38 @@ struct stm32f4_pwm_object {
uint32_t channel_3_max_period;
uint32_t channel_4_max_period;
};
static struct stm32f4_pwm_object stm32f4_pwm_object = {
.used_channels = 0,
.channel_1_max_period = 0,
.channel_2_max_period = 0,
.channel_3_max_period = 0,
.channel_4_max_period = 0,
};
#pragma pack(pop)
int stm32f4_pwm_open(const void *pwm)
{
if(NULL == pwm)
return -1;
struct stm32f4_pwm *this = (struct stm32f4_pwm *)pwm;
uint32_t clk_ahb_timer = 0, clk_ahb_gpio = 0;
uint8_t gpio_af_timer = 0;
if(this->timer == TIM4) {
clk_ahb_timer = RCC_APB1Periph_TIM4;
gpio_af_timer = GPIO_AF_TIM4;
stm32f4_gpio_open(this->pwm_gpio);
if(this->timer_handle->Instance == TIM4) {
__HAL_RCC_TIM4_CLK_ENABLE();
}
RCC_APB1PeriphClockCmd(clk_ahb_timer, ENABLE);
if(this->port == GPIOD) {
clk_ahb_gpio = RCC_AHB1Periph_GPIOD;
}
RCC_AHB1PeriphClockCmd(clk_ahb_gpio, ENABLE);
GPIO_Init(this->port, (GPIO_InitTypeDef *)this->port_cfg);
GPIO_PinAFConfig(this->port, this->pin_src, gpio_af_timer);
HAL_TIM_PWM_Init(this->timer_handle);
HAL_TIM_PWM_ConfigChannel(this->timer_handle, this->output_compare_cfg, this->channel);
TIM_TimeBaseInit(this->timer, (TIM_TimeBaseInitTypeDef *)this->timer_cfg);
TIM_MasterConfigTypeDef sMasterConfig;
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
HAL_TIMEx_MasterConfigSynchronization(this->timer_handle, &sMasterConfig);
switch(this->channel) {
case channel_1:
TIM_OC1Init(this->timer, (TIM_OCInitTypeDef *)this->output_compare_cfg);
TIM_OC1PreloadConfig(this->timer, TIM_OCPreload_Enable);
stm32f4_pwm_object.channel_1_max_period = this->timer_cfg->TIM_Period + 1;
break;
case channel_2:
TIM_OC2Init(this->timer, (TIM_OCInitTypeDef *)this->output_compare_cfg);
TIM_OC2PreloadConfig(this->timer, TIM_OCPreload_Enable);
stm32f4_pwm_object.channel_2_max_period = this->timer_cfg->TIM_Period + 1;
break;
case channel_3:
TIM_OC3Init(this->timer, (TIM_OCInitTypeDef *)this->output_compare_cfg);
TIM_OC3PreloadConfig(this->timer, TIM_OCPreload_Enable);
stm32f4_pwm_object.channel_3_max_period = this->timer_cfg->TIM_Period + 1;
break;
case channel_4:
TIM_OC4Init(this->timer, (TIM_OCInitTypeDef *)this->output_compare_cfg);
TIM_OC4PreloadConfig(this->timer, TIM_OCPreload_Enable);
stm32f4_pwm_object.channel_4_max_period = this->timer_cfg->TIM_Period + 1;
break;
}
TIM_ARRPreloadConfig(this->timer, ENABLE);
TIM_Cmd(this->timer, ENABLE);
stm32f4_pwm_object.used_channels++;
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig;
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
sBreakDeadTimeConfig.DeadTime = 0;
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
HAL_TIMEx_ConfigBreakDeadTime(this->timer_handle, &sBreakDeadTimeConfig);
HAL_TIM_Base_Start(this->timer_handle);
HAL_TIM_PWM_Start(this->timer_handle, this->channel);
return 0;
}
@@ -81,12 +63,11 @@ int stm32f4_pwm_close(const void *pwm)
{
if(NULL == pwm)
return -1;
struct stm32f4_pwm *this = (struct stm32f4_pwm *)pwm;
stm32f4_pwm_set_duty_cycle(pwm, 0);
stm32f4_pwm_object.used_channels--;
if(stm32f4_pwm_object.used_channels == 0) {
TIM_Cmd(this->timer, DISABLE);
}
struct stm32f4_pwm *this = (struct stm32f4_pwm *)pwm;
HAL_TIM_Base_Stop(this->timer_handle);
HAL_TIM_PWM_Stop(this->timer_handle, this->channel);
return 0;
}
@@ -94,20 +75,9 @@ int stm32f4_pwm_set_duty_cycle(const void *pwm, unsigned int duty_cycle_percent)
{
if(NULL == pwm)
return -1;
struct stm32f4_pwm *this = (struct stm32f4_pwm *)pwm;
switch(this->channel) {
case channel_1:
TIM_SetCompare1(this->timer, stm32f4_pwm_object.channel_1_max_period * duty_cycle_percent / 100);
break;
case channel_2:
TIM_SetCompare2(this->timer, stm32f4_pwm_object.channel_2_max_period * duty_cycle_percent / 100);
break;
case channel_3:
TIM_SetCompare3(this->timer, stm32f4_pwm_object.channel_3_max_period * duty_cycle_percent / 100);
break;
case channel_4:
TIM_SetCompare4(this->timer, stm32f4_pwm_object.channel_4_max_period * duty_cycle_percent / 100);
break;
}
__HAL_TIM_SET_COMPARE(this->timer_handle, this->channel, this->timer_handle->Init.Period * duty_cycle_percent / 100);
return 0;
}

148
source/firmware/arch/stm32f4xx/driver/stm32f4_uart.c
View File

@@ -11,78 +11,144 @@
#include "stm32f4xx.h"
#include "stm32f4xx_isr.h"
#include "stm32f4_uart.h"
#include "gpio.h"
#include "stm32f4_gpio.h"
struct stm32f4_uart_obj {
const void *callback; //!< Interrupt callback.
const void *parameter; //!< argument for the callback.
UART_HandleTypeDef *uart1_handle;
UART_HandleTypeDef *uart2_handle;
UART_HandleTypeDef *uart3_handle;
UART_HandleTypeDef *uart6_handle;
const void *uart1_callback; //!< Interrupt callback.
const void *uart1_parameter; //!< argument for the callback.
const void *uart2_callback; //!< Interrupt callback.
const void *uart2_parameter; //!< argument for the callback.
const void *uart3_callback; //!< Interrupt callback.
const void *uart3_parameter; //!< argument for the callback.
const void *uart6_callback; //!< Interrupt callback.
const void *uart6_parameter; //!< argument for the callback.
};
static volatile struct stm32f4_uart_obj uart1_obj;
static volatile struct stm32f4_uart_obj uart_obj = {
.uart1_handle = NULL,
.uart1_callback = NULL,
.uart1_parameter = NULL,
.uart2_handle = NULL,
.uart2_callback = NULL,
.uart2_parameter = NULL,
.uart3_handle = NULL,
.uart3_callback = NULL,
.uart3_parameter = NULL,
.uart6_handle = NULL,
.uart6_callback = NULL,
.uart6_parameter = NULL,
};
int stm32f4_uart_open(const void *this)
{
if(NULL == this)
return -1;
struct stm32f4_uart *uart = (struct stm32f4_uart *)this;
uint8_t gpio_af = 0;
uint32_t rcc_apb_uart = 0, rcc_apb_gpio = 0;
IRQn_Type irq_type = USART1_IRQn;
if(uart->usart_port == USART1) {
gpio_af = GPIO_AF_USART1;
rcc_apb_uart = RCC_APB2Periph_USART1;
/* init gpio */
stm32f4_gpio_open(uart->uart_gpio);
/* uart clock enable */
if(uart->uart_handle->Instance == USART1) {
__HAL_RCC_USART1_CLK_ENABLE();
irq_type = USART1_IRQn;
uart_obj.uart1_handle = uart->uart_handle;
}
if(uart->gpio_port == GPIOA) {
rcc_apb_gpio = RCC_AHB1Periph_GPIOA;
else if(uart->uart_handle->Instance == USART2) {
__HAL_RCC_USART2_CLK_ENABLE();
irq_type = USART2_IRQn;
uart_obj.uart2_handle = uart->uart_handle;
}
else if(uart->gpio_port == GPIOB) {
rcc_apb_gpio = RCC_AHB1Periph_GPIOB;
else if(uart->uart_handle->Instance == USART3) {
__HAL_RCC_USART3_CLK_ENABLE();
irq_type = USART3_IRQn;
uart_obj.uart3_handle = uart->uart_handle;
}
else if(uart->uart_handle->Instance == USART6) {
__HAL_RCC_USART6_CLK_ENABLE();
irq_type = USART6_IRQn;
uart_obj.uart3_handle = uart->uart_handle;
}
RCC_APB2PeriphClockCmd(rcc_apb_uart, ENABLE);
RCC_AHB1PeriphClockCmd(rcc_apb_gpio, ENABLE);
HAL_UART_Init(uart->uart_handle);
HAL_NVIC_SetPriority(irq_type, 5, 1);
HAL_NVIC_EnableIRQ(USART1_IRQn);
__HAL_UART_ENABLE_IT(uart->uart_handle, UART_IT_RXNE);
__HAL_UART_DISABLE_IT(uart->uart_handle, UART_IT_TXE);
GPIO_Init(uart->gpio_port, (GPIO_InitTypeDef *)uart->gpio_init);
GPIO_PinAFConfig(uart->gpio_port, uart->pin_src_rx, gpio_af);
GPIO_PinAFConfig(uart->gpio_port, uart->pin_src_tx, gpio_af);
USART_Init(uart->usart_port, (USART_InitTypeDef *)uart->usart_init);
USART_ITConfig(uart->usart_port, uart->usart_it_select, ENABLE);
NVIC_Init((NVIC_InitTypeDef *)uart->nvic_init);
USART_Cmd(uart->usart_port, ENABLE);
return (0);
}
int stm32f4_uart_close(const void *this)
{
if(NULL == this)
return -1;
struct stm32f4_uart *uart = (struct stm32f4_uart *)this;
USART_Cmd(uart->usart_port, DISABLE);
IRQn_Type irq_type = USART1_IRQn;
HAL_UART_DeInit((UART_HandleTypeDef *)uart->uart_handle);
if(uart->uart_handle->Instance == USART1) {
__HAL_RCC_USART1_CLK_DISABLE();
irq_type = USART1_IRQn;
}
else if(uart->uart_handle->Instance == USART2) {
__HAL_RCC_USART2_CLK_DISABLE();
irq_type = USART2_IRQn;
}
else if(uart->uart_handle->Instance == USART3) {
__HAL_RCC_USART3_CLK_DISABLE();
irq_type = USART3_IRQn;
}
else if(uart->uart_handle->Instance == USART6) {
__HAL_RCC_USART6_CLK_DISABLE();
irq_type = USART6_IRQn;
}
HAL_NVIC_DisableIRQ(irq_type);
stm32f4_gpio_close(uart->uart_gpio);
return (0);
}
int stm32f4_uart_read(const void *this, char *buffer, int len)
{
struct stm32f4_uart *uart = (struct stm32f4_uart *)this;
*buffer = uart->usart_port->DR;
*buffer = uart->uart_handle->Instance->DR;
return (1);
}
int stm32f4_uart_write(const void *this, const char *buffer, int len)
{
if(NULL == this)
return -1;
struct stm32f4_uart *uart = (struct stm32f4_uart *)this;
int i;
for(i = 0; i < len; i++) {
// wait until data register is empty
while(!(uart->usart_port->SR & 0x00000040));
USART_SendData(uart->usart_port, buffer[i]);
}
return (i);
HAL_UART_Transmit(uart->uart_handle, (uint8_t *)buffer, len, 1000);
return len;
}
int stm32f4_uart_set_cb(const void *this, const void *callback, const void *param)
{
struct stm32f4_uart *uart = (struct stm32f4_uart *)this;
if(uart->usart_port == USART1) {
uart1_obj.callback = callback;
uart1_obj.parameter = param;
if(uart->uart_handle->Instance == USART1) {
uart_obj.uart1_callback = callback;
uart_obj.uart1_parameter = param;
}
else if(uart->uart_handle->Instance == USART2) {
uart_obj.uart2_callback = callback;
uart_obj.uart2_parameter = param;
}
else if(uart->uart_handle->Instance == USART3) {
uart_obj.uart3_callback = callback;
uart_obj.uart3_parameter = param;
}
else if(uart->uart_handle->Instance == USART6) {
uart_obj.uart6_callback = callback;
uart_obj.uart6_parameter = param;
}
return (0);
}
@@ -91,11 +157,13 @@ int stm32f4_uart_set_cb(const void *this, const void *callback, const void *para
void USART1_IRQHandler(void)
{
enter_isr();
// check if the USART1 receive interrupt flag was set
if(USART_GetITStatus(USART1, USART_IT_RXNE)) {
if(uart1_obj.callback) {
void (*cb)(const void *) = uart1_obj.callback;
cb(uart1_obj.parameter);
uint32_t tmp1 = 0U, tmp2 = 0U;
tmp1 = __HAL_UART_GET_FLAG(uart_obj.uart1_handle, UART_FLAG_RXNE);
tmp2 = __HAL_UART_GET_IT_SOURCE(uart_obj.uart1_handle, UART_IT_RXNE);
if((tmp1 != RESET) && (tmp2 != RESET)) {
if(uart_obj.uart1_callback) {
void (*cb)(const void *) = uart_obj.uart1_callback;
cb(uart_obj.uart1_parameter);
}
}
exit_isr();

2
source/firmware/arch/stm32f4xx/lib/lib.mk Executable file → Normal file
View File

@@ -1 +1 @@
include source/firmware/arch/stm32f4xx/lib/stdperiph/stdperiph.mk
include source/firmware/arch/stm32f4xx/lib/system/system.mk

3711
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ARM/arm_cortexM0x_math.uvopt
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File diff suppressed because it is too large Load Diff

3269
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ARM/arm_cortexM0x_math.uvproj
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File diff suppressed because it is too large Load Diff

3711
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ARM/arm_cortexM3x_math.uvopt
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File diff suppressed because it is too large Load Diff

3269
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ARM/arm_cortexM3x_math.uvproj
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File diff suppressed because it is too large Load Diff

3969
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ARM/arm_cortexM4x_math.uvopt
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File diff suppressed because it is too large Load Diff

6527
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ARM/arm_cortexM4x_math.uvproj
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File diff suppressed because it is too large Load Diff

14
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ARM/arm_cortexMx_math_Build.bat
View File

@@ -1,14 +0,0 @@
SET TMP=C:\Temp
SET TEMP=C:\Temp
SET UVEXE=C:\Keil\UV4\UV4.EXE
%UVEXE% -rb arm_cortexM0x_math.uvproj -t"DSP_Lib CM0 LE" -o"DSP_Lib CM0 LE.txt"
%UVEXE% -rb arm_cortexM0x_math.uvproj -t"DSP_Lib CM0 BE" -o"DSP_Lib CM0 BE.txt"
%UVEXE% -rb arm_cortexM3x_math.uvproj -t"DSP_Lib CM3 LE" -o"DSP_Lib CM3 LE.txt"
%UVEXE% -rb arm_cortexM3x_math.uvproj -t"DSP_Lib CM3 BE" -o"DSP_Lib CM3 BE.txt"
%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 LE" -o"DSP_Lib CM4 LE.txt"
%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 BE" -o"DSP_Lib CM4 BE.txt"
%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 LE FPU" -o"DSP_Lib CM4 LE FPU.txt"
%UVEXE% -rb arm_cortexM4x_math.uvproj -t"DSP_Lib CM4 BE FPU" -o"DSP_Lib CM4 BE FPU.txt"

122
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c
View File

@@ -1,122 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_abs_f32.c
*
* Description: Vector absolute value.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
#include <math.h>
/**
* @ingroup groupMath
*/
/**
* @defgroup BasicAbs Vector Absolute Value
*
* Computes the absolute value of a vector on an element-by-element basis.
*
* <pre>
* pDst[n] = abs(pSrcA[n]), 0 <= n < blockSize.
* </pre>
*
* The operation can be done in-place by setting the input and output pointers to the same buffer.
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
* @addtogroup BasicAbs
* @{
*/
/**
* @brief Floating-point vector absolute value.
* @param[in] *pSrc points to the input buffer
* @param[out] *pDst points to the output buffer
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_abs_f32(
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = |A| */
/* Calculate absolute and then store the results in the destination buffer. */
*pDst++ = fabsf(*pSrc++);
*pDst++ = fabsf(*pSrc++);
*pDst++ = fabsf(*pSrc++);
*pDst++ = fabsf(*pSrc++);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = |A| */
/* Calculate absolute and then store the results in the destination buffer. */
*pDst++ = fabsf(*pSrc++);
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of BasicAbs group
*/

170
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c
View File

@@ -1,170 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_abs_q15.c
*
* Description: Q15 vector absolute value.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicAbs
* @{
*/
/**
* @brief Q15 vector absolute value.
* @param[in] *pSrc points to the input buffer
* @param[out] *pDst points to the output buffer
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
*/
void arm_abs_q15(
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
q15_t in1; /* Input value1 */
q15_t in2; /* Input value2 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = |A| */
/* Read two inputs */
in1 = *pSrc++;
in2 = *pSrc++;
/* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */
#ifndef ARM_MATH_BIG_ENDIAN
*__SIMD32(pDst)++ =
__PKHBT(((in1 > 0) ? in1 : __SSAT(-in1, 16)),
((in2 > 0) ? in2 : __SSAT(-in2, 16)), 16);
#else
*__SIMD32(pDst)++ =
__PKHBT(((in2 > 0) ? in2 : __SSAT(-in2, 16)),
((in1 > 0) ? in1 : __SSAT(-in1, 16)), 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
in1 = *pSrc++;
in2 = *pSrc++;
#ifndef ARM_MATH_BIG_ENDIAN
*__SIMD32(pDst)++ =
__PKHBT(((in1 > 0) ? in1 : __SSAT(-in1, 16)),
((in2 > 0) ? in2 : __SSAT(-in2, 16)), 16);
#else
*__SIMD32(pDst)++ =
__PKHBT(((in2 > 0) ? in2 : __SSAT(-in2, 16)),
((in1 > 0) ? in1 : __SSAT(-in1, 16)), 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = |A| */
/* Read the input */
in1 = *pSrc++;
/* Calculate absolute value of input and then store the result in the destination buffer. */
*pDst++ = (in1 > 0) ? in1 : __SSAT(-in1, 16);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
q15_t in; /* Temporary input variable */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = |A| */
/* Read the input */
in = *pSrc++;
/* Calculate absolute value of input and then store the result in the destination buffer. */
*pDst++ = (in > 0) ? in : __SSAT(-in, 16);
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of BasicAbs group
*/

120
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c
View File

@@ -1,120 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_abs_q31.c
*
* Description: Q31 vector absolute value.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicAbs
* @{
*/
/**
* @brief Q31 vector absolute value.
* @param[in] *pSrc points to the input buffer
* @param[out] *pDst points to the output buffer
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
*/
void arm_abs_q31(
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
q31_t in; /* Input value */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = |A| */
/* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
in = *pSrc++;
*pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in);
in = *pSrc++;
*pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in);
in = *pSrc++;
*pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in);
in = *pSrc++;
*pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = |A| */
/* Calculate absolute value of the input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
in = *pSrc++;
*pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in);
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of BasicAbs group
*/

143
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c
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@@ -1,143 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_abs_q7.c
*
* Description: Q7 vector absolute value.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicAbs
* @{
*/
/**
* @brief Q7 vector absolute value.
* @param[in] *pSrc points to the input buffer
* @param[out] *pDst points to the output buffer
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
*/
void arm_abs_q7(
q7_t * pSrc,
q7_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
q7_t in1; /* Input value1 */
q7_t in2; /* Input value2 */
q7_t in3; /* Input value3 */
q7_t in4; /* Input value4 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = |A| */
/* Read 4 inputs */
in1 = *pSrc++;
in2 = *pSrc++;
in3 = *pSrc++;
in4 = *pSrc++;
/* Store the Absolute result in the destination buffer by packing the 4 values in single cycle */
*__SIMD32(pDst)++ =
__PACKq7(((in1 > 0) ? in1 : __SSAT(-in1, 8)),
((in2 > 0) ? in2 : __SSAT(-in2, 8)),
((in3 > 0) ? in3 : __SSAT(-in3, 8)),
((in4 > 0) ? in4 : __SSAT(-in4, 8)));
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = |A| */
/* Read the input */
in1 = *pSrc++;
/* Store the Absolute result in the destination buffer */
*pDst++ = (in1 > 0) ? in1 : __SSAT(-in1, 8);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
q7_t in; /* Temporary input varible */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = |A| */
/* Read the input */
in = *pSrc++;
/* Store the Absolute result in the destination buffer */
*pDst++ = (in > 0) ? in : __SSAT(-in, 8);
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of BasicAbs group
*/

121
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c
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@@ -1,121 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_add_f32.c
*
* Description: Floating-point vector addition.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @defgroup BasicAdd Vector Addition
*
* Element-by-element addition of two vectors.
*
* <pre>
* pDst[n] = pSrcA[n] + pSrcB[n], 0 <= n < blockSize.
* </pre>
*
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
* @addtogroup BasicAdd
* @{
*/
/**
* @brief Floating-point vector addition.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_add_f32(
float32_t * pSrcA,
float32_t * pSrcB,
float32_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
*pDst++ = (*pSrcA++) + (*pSrcB++);
*pDst++ = (*pSrcA++) + (*pSrcB++);
*pDst++ = (*pSrcA++) + (*pSrcB++);
*pDst++ = (*pSrcA++) + (*pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
*pDst++ = (*pSrcA++) + (*pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of BasicAdd group
*/

127
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c
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@@ -1,127 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_add_q15.c
*
* Description: Q15 vector addition
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicAdd
* @{
*/
/**
* @brief Q15 vector addition.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
*/
void arm_add_q15(
q15_t * pSrcA,
q15_t * pSrcB,
q15_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
*__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
*__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
*pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
*pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ + *pSrcB++), 16);
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of BasicAdd group
*/

129
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c
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@@ -1,129 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_add_q31.c
*
* Description: Q31 vector addition.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicAdd
* @{
*/
/**
* @brief Q31 vector addition.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
*/
void arm_add_q31(
q31_t * pSrcA,
q31_t * pSrcB,
q31_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
*pDst++ = __QADD(*pSrcA++, *pSrcB++);
*pDst++ = __QADD(*pSrcA++, *pSrcB++);
*pDst++ = __QADD(*pSrcA++, *pSrcB++);
*pDst++ = __QADD(*pSrcA++, *pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
*pDst++ = __QADD(*pSrcA++, *pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
*pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of BasicAdd group
*/

126
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c
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@@ -1,126 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_add_q7.c
*
* Description: Q7 vector addition.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicAdd
* @{
*/
/**
* @brief Q7 vector addition.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
*/
void arm_add_q7(
q7_t * pSrcA,
q7_t * pSrcB,
q7_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
*__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
*pDst++ = (q7_t) __SSAT(*pSrcA++ + *pSrcB++, 8);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = A + B */
/* Add and then store the results in the destination buffer. */
*pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ + *pSrcB++, 8);
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of BasicAdd group
*/

122
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c
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@@ -1,122 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_dot_prod_f32.c
*
* Description: Floating-point dot product.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @defgroup dot_prod Vector Dot Product
*
* Computes the dot product of two vectors.
* The vectors are multiplied element-by-element and then summed.
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
* @addtogroup dot_prod
* @{
*/
/**
* @brief Dot product of floating-point vectors.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] blockSize number of samples in each vector
* @param[out] *result output result returned here
* @return none.
*/
void arm_dot_prod_f32(
float32_t * pSrcA,
float32_t * pSrcB,
uint32_t blockSize,
float32_t * result)
{
float32_t sum = 0.0f; /* Temporary result storage */
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Calculate dot product and then store the result in a temporary buffer */
sum += (*pSrcA++) * (*pSrcB++);
sum += (*pSrcA++) * (*pSrcB++);
sum += (*pSrcA++) * (*pSrcB++);
sum += (*pSrcA++) * (*pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Calculate dot product and then store the result in a temporary buffer. */
sum += (*pSrcA++) * (*pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
/* Store the result back in the destination buffer */
*result = sum;
}
/**
* @} end of dot_prod group
*/

132
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c
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@@ -1,132 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_dot_prod_q15.c
*
* Description: Q15 dot product.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup dot_prod
* @{
*/
/**
* @brief Dot product of Q15 vectors.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] blockSize number of samples in each vector
* @param[out] *result output result returned here
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
* results are added to a 64-bit accumulator in 34.30 format.
* Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
* there is no risk of overflow.
* The return result is in 34.30 format.
*/
void arm_dot_prod_q15(
q15_t * pSrcA,
q15_t * pSrcB,
uint32_t blockSize,
q63_t * result)
{
q63_t sum = 0; /* Temporary result storage */
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Calculate dot product and then store the result in a temporary buffer. */
sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Calculate dot product and then store the results in a temporary buffer. */
sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Calculate dot product and then store the results in a temporary buffer. */
sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0 */
/* Store the result in the destination buffer in 34.30 format */
*result = sum;
}
/**
* @} end of dot_prod group
*/

124
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c
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@@ -1,124 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_dot_prod_q31.c
*
* Description: Q31 dot product.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup dot_prod
* @{
*/
/**
* @brief Dot product of Q31 vectors.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] blockSize number of samples in each vector
* @param[out] *result output result returned here
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these
* are truncated to 2.48 format by discarding the lower 14 bits.
* The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
* There are 15 guard bits in the accumulator and there is no risk of overflow as long as
* the length of the vectors is less than 2^16 elements.
* The return result is in 16.48 format.
*/
void arm_dot_prod_q31(
q31_t * pSrcA,
q31_t * pSrcB,
uint32_t blockSize,
q63_t * result)
{
q63_t sum = 0; /* Temporary result storage */
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Calculate dot product and then store the result in a temporary buffer. */
sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Calculate dot product and then store the result in a temporary buffer. */
sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
/* Decrement the loop counter */
blkCnt--;
}
/* Store the result in the destination buffer in 16.48 format */
*result = sum;
}
/**
* @} end of dot_prod group
*/

163
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c
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@@ -1,163 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_dot_prod_q7.c
*
* Description: Q7 dot product.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup dot_prod
* @{
*/
/**
* @brief Dot product of Q7 vectors.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[in] blockSize number of samples in each vector
* @param[out] *result output result returned here
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these
* results are added to an accumulator in 18.14 format.
* Nonsaturating additions are used and there is no danger of wrap around as long as
* the vectors are less than 2^18 elements long.
* The return result is in 18.14 format.
*/
void arm_dot_prod_q7(
q7_t * pSrcA,
q7_t * pSrcB,
uint32_t blockSize,
q31_t * result)
{
uint32_t blkCnt; /* loop counter */
q31_t sum = 0; /* Temporary variables to store output */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t input1, input2; /* Temporary variables to store input */
q15_t in1, in2; /* Temporary variables to store input */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* Reading two inputs of SrcA buffer and packing */
in1 = (q15_t) * pSrcA++;
in2 = (q15_t) * pSrcA++;
input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* Reading two inputs of SrcB buffer and packing */
in1 = (q15_t) * pSrcB++;
in2 = (q15_t) * pSrcB++;
input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Perform Dot product of 2 packed inputs using SMLALD and store the result in a temporary variable. */
sum = __SMLAD(input1, input2, sum);
/* Reading two inputs of SrcA buffer and packing */
in1 = (q15_t) * pSrcA++;
in2 = (q15_t) * pSrcA++;
input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* Reading two inputs of SrcB buffer and packing */
in1 = (q15_t) * pSrcB++;
in2 = (q15_t) * pSrcB++;
input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Perform Dot product of 2 packed inputs using SMLALD and store the result in a temporary variable. */
sum = __SMLAD(input1, input2, sum);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Dot product and then store the results in a temporary buffer. */
sum = __SMLAD(*pSrcA++, *pSrcB++, sum);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
/* Dot product and then store the results in a temporary buffer. */
sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0 */
/* Store the result in the destination buffer in 18.14 format */
*result = sum;
}
/**
* @} end of dot_prod group
*/

126
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c
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@@ -1,126 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_mult_f32.c
*
* Description: Floating-point vector multiplication.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.5 2010/04/26
* incorporated review comments and updated with latest CMSIS layer
*
* Version 0.0.3 2010/03/10
* Initial version
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @defgroup BasicMult Vector Multiplication
*
* Element-by-element multiplication of two vectors.
*
* <pre>
* pDst[n] = pSrcA[n] * pSrcB[n], 0 <= n < blockSize.
* </pre>
*
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
* @addtogroup BasicMult
* @{
*/
/**
* @brief Floating-point vector multiplication.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_mult_f32(
float32_t * pSrcA,
float32_t * pSrcB,
float32_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counters */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A * B */
/* Multiply the inputs and store the results in output buffer */
*pDst++ = (*pSrcA++) * (*pSrcB++);
*pDst++ = (*pSrcA++) * (*pSrcB++);
*pDst++ = (*pSrcA++) * (*pSrcB++);
*pDst++ = (*pSrcA++) * (*pSrcB++);
/* Decrement the blockSize loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = A * B */
/* Multiply the inputs and store the results in output buffer */
*pDst++ = (*pSrcA++) * (*pSrcB++);
/* Decrement the blockSize loop counter */
blkCnt--;
}
}
/**
* @} end of BasicMult group
*/

119
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c
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@@ -1,119 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_mult_q15.c
*
* Description: Q15 vector multiplication.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.5 2010/04/26
* incorporated review comments and updated with latest CMSIS layer
*
* Version 0.0.3 2010/03/10
* Initial version
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicMult
* @{
*/
/**
* @brief Q15 vector multiplication
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
*/
void arm_mult_q15(
q15_t * pSrcA,
q15_t * pSrcB,
q15_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counters */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A * B */
/* Multiply the inputs and store the result in the destination buffer */
*pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
*pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
*pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
*pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
/* Decrement the blockSize loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = A * B */
/* Multiply the inputs and store the result in the destination buffer */
*pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
/* Decrement the blockSize loop counter */
blkCnt--;
}
}
/**
* @} end of BasicMult group
*/

121
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c
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@@ -1,121 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_mult_q31.c
*
* Description: Q31 vector multiplication.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.5 2010/04/26
* incorporated review comments and updated with latest CMSIS layer
*
* Version 0.0.3 2010/03/10
* Initial version
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicMult
* @{
*/
/**
* @brief Q31 vector multiplication.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
*/
void arm_mult_q31(
q31_t * pSrcA,
q31_t * pSrcB,
q31_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counters */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A * B */
/* Multiply the inputs and then store the results in the destination buffer. */
*pDst++ =
(q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
*pDst++ =
(q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
*pDst++ =
(q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
*pDst++ =
(q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
/* Decrement the blockSize loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = A * B */
/* Multiply the inputs and then store the results in the destination buffer. */
*pDst++ =
(q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
/* Decrement the blockSize loop counter */
blkCnt--;
}
}
/**
* @} end of BasicMult group
*/

125
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c
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@@ -1,125 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_mult_q7.c
*
* Description: Q7 vector multiplication.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
*
* Version 0.0.5 2010/04/26
* incorporated review comments and updated with latest CMSIS layer
*
* Version 0.0.3 2010/03/10 DP
* Initial version
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicMult
* @{
*/
/**
* @brief Q7 vector multiplication
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
*/
void arm_mult_q7(
q7_t * pSrcA,
q7_t * pSrcB,
q7_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counters */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
q7_t out1, out2, out3, out4; /* Temporary variables to store the product */
/* loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A * B */
/* Multiply the inputs and store the results in temporary variables */
out1 = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7);
out2 = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7);
out3 = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7);
out4 = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7);
/* Store the results of 4 inputs in the destination buffer in single cycle by packing */
*__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
/* Decrement the blockSize loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = A * B */
/* Multiply the inputs and store the result in the destination buffer */
*pDst++ = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7);
/* Decrement the blockSize loop counter */
blkCnt--;
}
}
/**
* @} end of BasicMult group
*/

117
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c
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@@ -1,117 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_negate_f32.c
*
* Description: Negates floating-point vectors.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @defgroup negate Vector Negate
*
* Negates the elements of a vector.
*
* <pre>
* pDst[n] = -pSrc[n], 0 <= n < blockSize.
* </pre>
*/
/**
* @addtogroup negate
* @{
*/
/**
* @brief Negates the elements of a floating-point vector.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_negate_f32(
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = -A */
/* Negate and then store the results in the destination buffer. */
*pDst++ = -*pSrc++;
*pDst++ = -*pSrc++;
*pDst++ = -*pSrc++;
*pDst++ = -*pSrc++;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = -A */
/* Negate and then store the results in the destination buffer. */
*pDst++ = -*pSrc++;
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of negate group
*/

140
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c
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@@ -1,140 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_negate_q15.c
*
* Description: Negates Q15 vectors.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup negate
* @{
*/
/**
* @brief Negates the elements of a Q15 vector.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
*/
void arm_negate_q15(
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
q15_t in1, in2; /* Temporary variables */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = -A */
/* Read two inputs */
in1 = *pSrc++;
in2 = *pSrc++;
/* Negate and then store the results in the destination buffer by packing. */
#ifndef ARM_MATH_BIG_ENDIAN
*__SIMD32(pDst)++ = __PKHBT(__SSAT(-in1, 16), __SSAT(-in2, 16), 16);
#else
*__SIMD32(pDst)++ = __PKHBT(__SSAT(-in2, 16), __SSAT(-in1, 16), 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
in1 = *pSrc++;
in2 = *pSrc++;
#ifndef ARM_MATH_BIG_ENDIAN
*__SIMD32(pDst)++ = __PKHBT(__SSAT(-in1, 16), __SSAT(-in2, 16), 16);
#else
*__SIMD32(pDst)++ = __PKHBT(__SSAT(-in2, 16), __SSAT(-in1, 16), 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = -A */
/* Negate and then store the result in the destination buffer. */
*pDst++ = __SSAT(-*pSrc++, 16);
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of negate group
*/

119
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c
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@@ -1,119 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_negate_q31.c
*
* Description: Negates Q31 vectors.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup negate
* @{
*/
/**
* @brief Negates the elements of a Q31 vector.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
*/
void arm_negate_q31(
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize)
{
q31_t in; /* Temporary variable */
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = -A */
/* Negate and then store the results in the destination buffer. */
in = *pSrc++;
*pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
in = *pSrc++;
*pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
in = *pSrc++;
*pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
in = *pSrc++;
*pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = -A */
/* Negate and then store the result in the destination buffer. */
in = *pSrc++;
*pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of negate group
*/

122
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c
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@@ -1,122 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_negate_q7.c
*
* Description: Negates Q7 vectors.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup negate
* @{
*/
/**
* @brief Negates the elements of a Q7 vector.
* @param[in] *pSrc points to the input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
*/
void arm_negate_q7(
q7_t * pSrc,
q7_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
q7_t in1; /* Input value1 */
q7_t in2; /* Input value2 */
q7_t in3; /* Input value3 */
q7_t in4; /* Input value4 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = -A */
/* Read four inputs */
in1 = *pSrc++;
in2 = *pSrc++;
in3 = *pSrc++;
in4 = *pSrc++;
/* Store the Negated results in the destination buffer in a single cycle by packing the results */
*__SIMD32(pDst)++ =
__PACKq7(__SSAT(-in1, 8), __SSAT(-in2, 8), __SSAT(-in3, 8),
__SSAT(-in4, 8));
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = -A */
/* Negate and then store the results in the destination buffer. */
*pDst++ = __SSAT(-*pSrc++, 8);
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of negate group
*/

122
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c
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@@ -1,122 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_offset_f32.c
*
* Description: Floating-point vector offset.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @defgroup offset Vector Offset
*
* Adds a constant offset to each element of a vector.
*
* <pre>
* pDst[n] = pSrc[n] + offset, 0 <= n < blockSize.
* </pre>
*
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
* @addtogroup offset
* @{
*/
/**
* @brief Adds a constant offset to a floating-point vector.
* @param[in] *pSrc points to the input vector
* @param[in] offset is the offset to be added
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_offset_f32(
float32_t * pSrc,
float32_t offset,
float32_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A + offset */
/* Add offset and then store the results in the destination buffer. */
*pDst++ = (*pSrc++) + offset;
*pDst++ = (*pSrc++) + offset;
*pDst++ = (*pSrc++) + offset;
*pDst++ = (*pSrc++) + offset;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = A + offset */
/* Add offset and then store the result in the destination buffer. */
*pDst++ = (*pSrc++) + offset;
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of offset group
*/

128
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c
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@@ -1,128 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_offset_q15.c
*
* Description: Q15 vector offset.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup offset
* @{
*/
/**
* @brief Adds a constant offset to a Q15 vector.
* @param[in] *pSrc points to the input vector
* @param[in] offset is the offset to be added
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
*/
void arm_offset_q15(
q15_t * pSrc,
q15_t offset,
q15_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t offset_packed; /* Offset packed to 32 bit */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* Offset is packed to 32 bit in order to use SIMD32 for addition */
offset_packed = __PKHBT(offset, offset, 16);
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A + offset */
/* Add offset and then store the results in the destination buffer, 2 samples at a time. */
*__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
*__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = A + offset */
/* Add offset and then store the results in the destination buffer. */
*pDst++ = (q15_t) __QADD16(*pSrc++, offset);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = A + offset */
/* Add offset and then store the results in the destination buffer. */
*pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16);
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of offset group
*/

126
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c
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@@ -1,126 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_offset_q31.c
*
* Description: Q31 vector offset.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup offset
* @{
*/
/**
* @brief Adds a constant offset to a Q31 vector.
* @param[in] *pSrc points to the input vector
* @param[in] offset is the offset to be added
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
*/
void arm_offset_q31(
q31_t * pSrc,
q31_t offset,
q31_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A + offset */
/* Add offset and then store the results in the destination buffer. */
*pDst++ = __QADD(*pSrc++, offset);
*pDst++ = __QADD(*pSrc++, offset);
*pDst++ = __QADD(*pSrc++, offset);
*pDst++ = __QADD(*pSrc++, offset);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = A + offset */
/* Add offset and then store the result in the destination buffer. */
*pDst++ = __QADD(*pSrc++, offset);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = A + offset */
/* Add offset and then store the result in the destination buffer. */
*pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of offset group
*/

127
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c
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@@ -1,127 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_offset_q7.c
*
* Description: Q7 vector offset.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup offset
* @{
*/
/**
* @brief Adds a constant offset to a Q7 vector.
* @param[in] *pSrc points to the input vector
* @param[in] offset is the offset to be added
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
*/
void arm_offset_q7(
q7_t * pSrc,
q7_t offset,
q7_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t offset_packed; /* Offset packed to 32 bit */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* Offset is packed to 32 bit in order to use SIMD32 for addition */
offset_packed = __PACKq7(offset, offset, offset, offset);
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A + offset */
/* Add offset and then store the results in the destination bufferfor 4 samples at a time. */
*__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrc)++, offset_packed);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = A + offset */
/* Add offset and then store the result in the destination buffer. */
*pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = A + offset */
/* Add offset and then store the result in the destination buffer. */
*pDst++ = (q7_t) __SSAT((q15_t) * pSrc++ + offset, 8);
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of offset group
*/

133
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c
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@@ -1,133 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_scale_f32.c
*
* Description: Multiplies a floating-point vector by a scalar.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @defgroup scale Vector Scale
*
* Multiply a vector by a scalar value. For floating-point data, the algorithm used is:
*
* <pre>
* pDst[n] = pSrc[n] * scale, 0 <= n < blockSize.
* </pre>
*
* In the fixed-point Q7, Q15, and Q31 functions, <code>scale</code> is represented by
* a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
* The shift allows the gain of the scaling operation to exceed 1.0.
* The algorithm used with fixed-point data is:
*
* <pre>
* pDst[n] = (pSrc[n] * scaleFract) << shift, 0 <= n < blockSize.
* </pre>
*
* The overall scale factor applied to the fixed-point data is
* <pre>
* scale = scaleFract * 2^shift.
* </pre>
*/
/**
* @addtogroup scale
* @{
*/
/**
* @brief Multiplies a floating-point vector by a scalar.
* @param[in] *pSrc points to the input vector
* @param[in] scale scale factor to be applied
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*/
void arm_scale_f32(
float32_t * pSrc,
float32_t scale,
float32_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A * scale */
/* Scale the input and then store the results in the destination buffer. */
*pDst++ = (*pSrc++) * scale;
*pDst++ = (*pSrc++) * scale;
*pDst++ = (*pSrc++) * scale;
*pDst++ = (*pSrc++) * scale;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = A * scale */
/* Scale the input and then store the result in the destination buffer. */
*pDst++ = (*pSrc++) * scale;
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of scale group
*/

162
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c
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@@ -1,162 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_scale_q15.c
*
* Description: Multiplies a Q15 vector by a scalar.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup scale
* @{
*/
/**
* @brief Multiplies a Q15 vector by a scalar.
* @param[in] *pSrc points to the input vector
* @param[in] scaleFract fractional portion of the scale value
* @param[in] shift number of bits to shift the result by
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
* These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
*/
void arm_scale_q15(
q15_t * pSrc,
q15_t scaleFract,
int8_t shift,
q15_t * pDst,
uint32_t blockSize)
{
int8_t kShift = 15 - shift; /* shift to apply after scaling */
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
q15_t in1, in2; /* Temporary variables */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* Reading 2 inputs from memory */
in1 = *pSrc++;
in2 = *pSrc++;
/* C = A * scale */
/* Scale the inputs and then store the 2 results in the destination buffer
* in single cycle by packing the outputs */
#ifndef ARM_MATH_BIG_ENDIAN
*__SIMD32(pDst)++ =
__PKHBT(__SSAT((in1 * scaleFract) >> kShift, 16),
__SSAT((in2 * scaleFract) >> kShift, 16), 16);
#else
*__SIMD32(pDst)++ =
__PKHBT(__SSAT((in2 * scaleFract) >> kShift, 16),
__SSAT((in1 * scaleFract) >> kShift, 16), 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
in1 = *pSrc++;
in2 = *pSrc++;
#ifndef ARM_MATH_BIG_ENDIAN
*__SIMD32(pDst)++ =
__PKHBT(__SSAT((in1 * scaleFract) >> kShift, 16),
__SSAT((in2 * scaleFract) >> kShift, 16), 16);
#else
*__SIMD32(pDst)++ =
__PKHBT(__SSAT((in2 * scaleFract) >> kShift, 16),
__SSAT((in1 * scaleFract) >> kShift, 16), 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = A * scale */
/* Scale the input and then store the result in the destination buffer. */
*pDst++ = (q15_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 16));
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = A * scale */
/* Scale the input and then store the result in the destination buffer. */
*pDst++ = (q15_t) (__SSAT(((q31_t) * pSrc++ * scaleFract) >> kShift, 16));
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of scale group
*/

117
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c
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@@ -1,117 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_scale_q31.c
*
* Description: Multiplies a Q31 vector by a scalar.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup scale
* @{
*/
/**
* @brief Multiplies a Q31 vector by a scalar.
* @param[in] *pSrc points to the input vector
* @param[in] scaleFract fractional portion of the scale value
* @param[in] shift number of bits to shift the result by
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
* These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
*/
void arm_scale_q31(
q31_t * pSrc,
q31_t scaleFract,
int8_t shift,
q31_t * pDst,
uint32_t blockSize)
{
int8_t kShift = 31 - shift; /* Shift to apply after scaling */
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A * scale */
/* Scale the input and then store the results in the destination buffer. */
*pDst++ = clip_q63_to_q31(((q63_t) * pSrc++ * scaleFract) >> kShift);
*pDst++ = clip_q63_to_q31(((q63_t) * pSrc++ * scaleFract) >> kShift);
*pDst++ = clip_q63_to_q31(((q63_t) * pSrc++ * scaleFract) >> kShift);
*pDst++ = clip_q63_to_q31(((q63_t) * pSrc++ * scaleFract) >> kShift);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = A * scale */
/* Scale the input and then store the result in the destination buffer. */
*pDst++ = clip_q63_to_q31(((q63_t) * pSrc++ * scaleFract) >> kShift);
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of scale group
*/

141
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c
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@@ -1,141 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_scale_q7.c
*
* Description: Multiplies a Q7 vector by a scalar.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup scale
* @{
*/
/**
* @brief Multiplies a Q7 vector by a scalar.
* @param[in] *pSrc points to the input vector
* @param[in] scaleFract fractional portion of the scale value
* @param[in] shift number of bits to shift the result by
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.7 format.
* These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.
*/
void arm_scale_q7(
q7_t * pSrc,
q7_t scaleFract,
int8_t shift,
q7_t * pDst,
uint32_t blockSize)
{
int8_t kShift = 7 - shift; /* shift to apply after scaling */
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
q7_t in1, in2, in3, in4, out1, out2, out3, out4; /* Temporary variables to store input & output */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* Reading 4 inputs from memory */
in1 = *pSrc++;
in2 = *pSrc++;
in3 = *pSrc++;
in4 = *pSrc++;
/* C = A * scale */
/* Scale the inputs and then store the results in the temporary variables. */
out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8));
out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8));
out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8));
out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8));
/* Packing the individual outputs into 32bit and storing in
* destination buffer in single write */
*__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = A * scale */
/* Scale the input and then store the result in the destination buffer. */
*pDst++ = (q7_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 8));
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = A * scale */
/* Scale the input and then store the result in the destination buffer. */
*pDst++ = (q7_t) (__SSAT((((q15_t) * pSrc++ * scaleFract) >> kShift), 8));
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of scale group
*/

239
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c
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@@ -1,239 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_shift_q15.c
*
* Description: Shifts the elements of a Q15 vector by a specified number of bits.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup shift
* @{
*/
/**
* @brief Shifts the elements of a Q15 vector a specified number of bits.
* @param[in] *pSrc points to the input vector
* @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
*/
void arm_shift_q15(
q15_t * pSrc,
int8_t shiftBits,
q15_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
uint8_t sign; /* Sign of shiftBits */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
q15_t in1, in2; /* Temporary variables */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* Getting the sign of shiftBits */
sign = (shiftBits & 0x80);
/* If the shift value is positive then do right shift else left shift */
if(sign == 0u)
{
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* Read 2 inputs */
in1 = *pSrc++;
in2 = *pSrc++;
/* C = A << shiftBits */
/* Shift the inputs and then store the results in the destination buffer. */
#ifndef ARM_MATH_BIG_ENDIAN
*__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
__SSAT((in2 << shiftBits), 16), 16);
#else
*__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
__SSAT((in1 << shiftBits), 16), 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
in1 = *pSrc++;
in2 = *pSrc++;
#ifndef ARM_MATH_BIG_ENDIAN
*__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
__SSAT((in2 << shiftBits), 16), 16);
#else
*__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
__SSAT((in1 << shiftBits), 16), 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = A << shiftBits */
/* Shift and then store the results in the destination buffer. */
*pDst++ = __SSAT((*pSrc++ << shiftBits), 16);
/* Decrement the loop counter */
blkCnt--;
}
}
else
{
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* Read 2 inputs */
in1 = *pSrc++;
in2 = *pSrc++;
/* C = A >> shiftBits */
/* Shift the inputs and then store the results in the destination buffer. */
#ifndef ARM_MATH_BIG_ENDIAN
*__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
(in2 >> -shiftBits), 16);
#else
*__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
(in1 >> -shiftBits), 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
in1 = *pSrc++;
in2 = *pSrc++;
#ifndef ARM_MATH_BIG_ENDIAN
*__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
(in2 >> -shiftBits), 16);
#else
*__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
(in1 >> -shiftBits), 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = A >> shiftBits */
/* Shift the inputs and then store the results in the destination buffer. */
*pDst++ = (*pSrc++ >> -shiftBits);
/* Decrement the loop counter */
blkCnt--;
}
}
#else
/* Run the below code for Cortex-M0 */
/* Getting the sign of shiftBits */
sign = (shiftBits & 0x80);
/* If the shift value is positive then do right shift else left shift */
if(sign == 0u)
{
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = A << shiftBits */
/* Shift and then store the results in the destination buffer. */
*pDst++ = __SSAT(((q31_t) * pSrc++ << shiftBits), 16);
/* Decrement the loop counter */
blkCnt--;
}
}
else
{
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = A >> shiftBits */
/* Shift the inputs and then store the results in the destination buffer. */
*pDst++ = (*pSrc++ >> -shiftBits);
/* Decrement the loop counter */
blkCnt--;
}
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of shift group
*/

141
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c
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@@ -1,141 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_shift_q31.c
*
* Description: Shifts the elements of a Q31 vector by a specified number of bits.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @defgroup shift Vector Shift
*
* Shifts the elements of a fixed-point vector by a specified number of bits.
* There are separate functions for Q7, Q15, and Q31 data types.
* The underlying algorithm used is:
*
* <pre>
* pDst[n] = pSrc[n] << shift, 0 <= n < blockSize.
* </pre>
*
* If <code>shift</code> is positive then the elements of the vector are shifted to the left.
* If <code>shift</code> is negative then the elements of the vector are shifted to the right.
*/
/**
* @addtogroup shift
* @{
*/
/**
* @brief Shifts the elements of a Q31 vector a specified number of bits.
* @param[in] *pSrc points to the input vector
* @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
*/
void arm_shift_q31(
q31_t * pSrc,
int8_t shiftBits,
q31_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
uint8_t sign; /* Sign of shiftBits */
/* Getting the sign of shiftBits */
sign = (shiftBits & 0x80);
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A (>> or <<) shiftBits */
/* Shift the input and then store the results in the destination buffer. */
*pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
(*pSrc++ >> -shiftBits);
*pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
(*pSrc++ >> -shiftBits);
*pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
(*pSrc++ >> -shiftBits);
*pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
(*pSrc++ >> -shiftBits);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = A (>> or <<) shiftBits */
/* Shift the input and then store the result in the destination buffer. */
*pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
(*pSrc++ >> -shiftBits);
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of shift group
*/

202
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c
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@@ -1,202 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_shift_q7.c
*
* Description: Processing function for the Q7 Shifting
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup shift
* @{
*/
/**
* @brief Shifts the elements of a Q7 vector a specified number of bits.
* @param[in] *pSrc points to the input vector
* @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in the vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q7 range [0x8 0x7F] will be saturated.
*/
void arm_shift_q7(
q7_t * pSrc,
int8_t shiftBits,
q7_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
uint8_t sign; /* Sign of shiftBits */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
q7_t in1; /* Input value1 */
q7_t in2; /* Input value2 */
q7_t in3; /* Input value3 */
q7_t in4; /* Input value4 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* Getting the sign of shiftBits */
sign = (shiftBits & 0x80);
/* If the shift value is positive then do right shift else left shift */
if(sign == 0u)
{
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A << shiftBits */
/* Read 4 inputs */
in1 = *pSrc++;
in2 = *pSrc++;
in3 = *pSrc++;
in4 = *pSrc++;
/* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
*__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8),
__SSAT((in2 << shiftBits), 8),
__SSAT((in3 << shiftBits), 8),
__SSAT((in4 << shiftBits), 8));
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = A << shiftBits */
/* Shift the input and then store the result in the destination buffer. */
*pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8);
/* Decrement the loop counter */
blkCnt--;
}
}
else
{
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A >> shiftBits */
/* Read 4 inputs */
in1 = *pSrc++;
in2 = *pSrc++;
in3 = *pSrc++;
in4 = *pSrc++;
/* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
*__SIMD32(pDst)++ = __PACKq7((in1 >> -shiftBits), (in2 >> -shiftBits),
(in3 >> -shiftBits), (in4 >> -shiftBits));
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = A >> shiftBits */
/* Shift the input and then store the result in the destination buffer. */
*pDst++ = (*pSrc++ >> -shiftBits);
/* Decrement the loop counter */
blkCnt--;
}
}
#else
/* Run the below code for Cortex-M0 */
/* Getting the sign of shiftBits */
sign = (shiftBits & 0x80);
/* If the shift value is positive then do right shift else left shift */
if(sign == 0u)
{
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = A << shiftBits */
/* Shift the input and then store the result in the destination buffer. */
*pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8);
/* Decrement the loop counter */
blkCnt--;
}
}
else
{
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = A >> shiftBits */
/* Shift the input and then store the result in the destination buffer. */
*pDst++ = (*pSrc++ >> -shiftBits);
/* Decrement the loop counter */
blkCnt--;
}
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of shift group
*/

122
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c
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/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_sub_f32.c
*
* Description: Floating-point vector subtraction.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @defgroup BasicSub Vector Subtraction
*
* Element-by-element subtraction of two vectors.
*
* <pre>
* pDst[n] = pSrcA[n] - pSrcB[n], 0 <= n < blockSize.
* </pre>
*
* There are separate functions for floating-point, Q7, Q15, and Q31 data types.
*/
/**
* @addtogroup BasicSub
* @{
*/
/**
* @brief Floating-point vector subtraction.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*/
void arm_sub_f32(
float32_t * pSrcA,
float32_t * pSrcB,
float32_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A - B */
/* Subtract and then store the results in the destination buffer. */
*pDst++ = (*pSrcA++) - (*pSrcB++);
*pDst++ = (*pSrcA++) - (*pSrcB++);
*pDst++ = (*pSrcA++) - (*pSrcB++);
*pDst++ = (*pSrcA++) - (*pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0 */
while(blkCnt > 0u)
{
/* C = A - B */
/* Subtract and then store the results in the destination buffer. */
*pDst++ = (*pSrcA++) - (*pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of BasicSub group
*/

124
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c
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/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_sub_q15.c
*
* Description: Q15 vector subtraction.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicSub
* @{
*/
/**
* @brief Q15 vector subtraction.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
*/
void arm_sub_q15(
q15_t * pSrcA,
q15_t * pSrcB,
q15_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A - B */
/* Subtract and then store the results in the destination buffer two samples at a time. */
*__SIMD32(pDst)++ = __QSUB16(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
*__SIMD32(pDst)++ = __QSUB16(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = A - B */
/* Subtract and then store the result in the destination buffer. */
*pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = A - B */
/* Subtract and then store the result in the destination buffer. */
*pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ - *pSrcB++), 16);
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of BasicSub group
*/

125
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c
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@@ -1,125 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_sub_q31.c
*
* Description: Q31 vector subtraction.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicSub
* @{
*/
/**
* @brief Q31 vector subtraction.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
*/
void arm_sub_q31(
q31_t * pSrcA,
q31_t * pSrcB,
q31_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A - B */
/* Subtract and then store the results in the destination buffer. */
*pDst++ = __QSUB(*pSrcA++, *pSrcB++);
*pDst++ = __QSUB(*pSrcA++, *pSrcB++);
*pDst++ = __QSUB(*pSrcA++, *pSrcB++);
*pDst++ = __QSUB(*pSrcA++, *pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = A - B */
/* Subtract and then store the result in the destination buffer. */
*pDst++ = __QSUB(*pSrcA++, *pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = A - B */
/* Subtract and then store the result in the destination buffer. */
*pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ - *pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of BasicSub group
*/

123
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c
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@@ -1,123 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_sub_q7.c
*
* Description: Q7 vector subtraction.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupMath
*/
/**
* @addtogroup BasicSub
* @{
*/
/**
* @brief Q7 vector subtraction.
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] blockSize number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
*/
void arm_sub_q7(
q7_t * pSrcA,
q7_t * pSrcB,
q7_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = A - B */
/* Subtract and then store the results in the destination buffer 4 samples at a time. */
*__SIMD32(pDst)++ = __QSUB8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while(blkCnt > 0u)
{
/* C = A - B */
/* Subtract and then store the result in the destination buffer. */
*pDst++ = __SSAT(*pSrcA++ - *pSrcB++, 8);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = blockSize;
while(blkCnt > 0u)
{
/* C = A - B */
/* Subtract and then store the result in the destination buffer. */
*pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ - *pSrcB++, 8);
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of BasicSub group
*/

144
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c
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@@ -1,144 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_common_tables.c
*
* Description: This file has common tables like Bitreverse, reciprocal etc which are used across different functions
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupTransforms
*/
/**
* @addtogroup CFFT_CIFFT
* @{
*/
/**
* \par
* Pseudo code for Generation of Bit reversal Table is
* \par
* <pre>for(l=1;l <= N/4;l++)
* {
* for(i=0;i<logN2;i++)
* {
* a[i]=l&(1<<i);
* }
* for(j=0; j<logN2; j++)
* {
* if (a[j]!=0)
* y[l]+=(1<<((logN2-1)-j));
* }
* y[l] = y[l] >> 1;
* } </pre>
* \par
* where N = 1024 logN2 = 10
* \par
* N is the maximum FFT Size supported
*/
/*
* @brief Table for bit reversal process
*/
const uint16_t armBitRevTable[256] = {
0x100, 0x80, 0x180, 0x40, 0x140, 0xc0, 0x1c0,
0x20, 0x120, 0xa0, 0x1a0, 0x60, 0x160, 0xe0,
0x1e0, 0x10, 0x110, 0x90, 0x190, 0x50, 0x150,
0xd0, 0x1d0, 0x30, 0x130, 0xb0, 0x1b0, 0x70,
0x170, 0xf0, 0x1f0, 0x8, 0x108, 0x88, 0x188,
0x48, 0x148, 0xc8, 0x1c8, 0x28, 0x128, 0xa8,
0x1a8, 0x68, 0x168, 0xe8, 0x1e8, 0x18, 0x118,
0x98, 0x198, 0x58, 0x158, 0xd8, 0x1d8, 0x38,
0x138, 0xb8, 0x1b8, 0x78, 0x178, 0xf8, 0x1f8,
0x4, 0x104, 0x84, 0x184, 0x44, 0x144, 0xc4,
0x1c4, 0x24, 0x124, 0xa4, 0x1a4, 0x64, 0x164,
0xe4, 0x1e4, 0x14, 0x114, 0x94, 0x194, 0x54,
0x154, 0xd4, 0x1d4, 0x34, 0x134, 0xb4, 0x1b4,
0x74, 0x174, 0xf4, 0x1f4, 0xc, 0x10c, 0x8c,
0x18c, 0x4c, 0x14c, 0xcc, 0x1cc, 0x2c, 0x12c,
0xac, 0x1ac, 0x6c, 0x16c, 0xec, 0x1ec, 0x1c,
0x11c, 0x9c, 0x19c, 0x5c, 0x15c, 0xdc, 0x1dc,
0x3c, 0x13c, 0xbc, 0x1bc, 0x7c, 0x17c, 0xfc,
0x1fc, 0x2, 0x102, 0x82, 0x182, 0x42, 0x142,
0xc2, 0x1c2, 0x22, 0x122, 0xa2, 0x1a2, 0x62,
0x162, 0xe2, 0x1e2, 0x12, 0x112, 0x92, 0x192,
0x52, 0x152, 0xd2, 0x1d2, 0x32, 0x132, 0xb2,
0x1b2, 0x72, 0x172, 0xf2, 0x1f2, 0xa, 0x10a,
0x8a, 0x18a, 0x4a, 0x14a, 0xca, 0x1ca, 0x2a,
0x12a, 0xaa, 0x1aa, 0x6a, 0x16a, 0xea, 0x1ea,
0x1a, 0x11a, 0x9a, 0x19a, 0x5a, 0x15a, 0xda,
0x1da, 0x3a, 0x13a, 0xba, 0x1ba, 0x7a, 0x17a,
0xfa, 0x1fa, 0x6, 0x106, 0x86, 0x186, 0x46,
0x146, 0xc6, 0x1c6, 0x26, 0x126, 0xa6, 0x1a6,
0x66, 0x166, 0xe6, 0x1e6, 0x16, 0x116, 0x96,
0x196, 0x56, 0x156, 0xd6, 0x1d6, 0x36, 0x136,
0xb6, 0x1b6, 0x76, 0x176, 0xf6, 0x1f6, 0xe,
0x10e, 0x8e, 0x18e, 0x4e, 0x14e, 0xce, 0x1ce,
0x2e, 0x12e, 0xae, 0x1ae, 0x6e, 0x16e, 0xee,
0x1ee, 0x1e, 0x11e, 0x9e, 0x19e, 0x5e, 0x15e,
0xde, 0x1de, 0x3e, 0x13e, 0xbe, 0x1be, 0x7e,
0x17e, 0xfe, 0x1fe, 0x1
};
/**
* @} end of CFFT_CIFFT group
*/
/*
* @brief Q15 table for reciprocal
*/
const q15_t armRecipTableQ15[64] = {
0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0,
0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82,
0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484,
0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0,
0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E,
0x56B0, 0x55C8, 0x54E4, 0x5405, 0x532B, 0x5255,
0x5183, 0x50B6, 0x4FEC, 0x4F26, 0x4E64, 0x4DA6,
0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978,
0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8,
0x4521, 0x448D, 0x43FC, 0x436C, 0x42DF, 0x4255,
0x41CC, 0x4146, 0x40C2, 0x4040
};
/*
* @brief Q31 table for reciprocal
*/
const q31_t armRecipTableQ31[64] = {
0x7F03F03F, 0x7D137420, 0x7B31E739, 0x795E9F94, 0x7798FD29, 0x75E06928,
0x7434554D, 0x72943B4B, 0x70FF9C40, 0x6F760031, 0x6DF6F593, 0x6C8210E3,
0x6B16EC3A, 0x69B526F6, 0x685C655F, 0x670C505D, 0x65C4952D, 0x6484E519,
0x634CF53E, 0x621C7E4F, 0x60F33C61, 0x5FD0EEB3, 0x5EB55785, 0x5DA03BEB,
0x5C9163A1, 0x5B8898E6, 0x5A85A85A, 0x598860DF, 0x58909373, 0x579E1318,
0x56B0B4B8, 0x55C84F0B, 0x54E4BA80, 0x5405D124, 0x532B6E8F, 0x52556FD0,
0x5183B35A, 0x50B618F3, 0x4FEC81A2, 0x4F26CFA2, 0x4E64E64E, 0x4DA6AA1D,
0x4CEC008B, 0x4C34D010, 0x4B810016, 0x4AD078EF, 0x4A2323C4, 0x4978EA96,
0x48D1B827, 0x482D77FE, 0x478C1657, 0x46ED801D, 0x4651A2E5, 0x45B86CE2,
0x4521CCE1, 0x448DB244, 0x43FC0CFA, 0x436CCD78, 0x42DFE4B4, 0x42554426,
0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102
};

141
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c
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/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_conj_f32.c
*
* Description: Floating-point complex conjugate.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @defgroup cmplx_conj Complex Conjugate
*
* Conjugates the elements of a complex data vector.
*
* The <code>pSrc</code> points to the source data and
* <code>pDst</code> points to the where the result should be written.
* <code>numSamples</code> specifies the number of complex samples
* and the data in each array is stored in an interleaved fashion
* (real, imag, real, imag, ...).
* Each array has a total of <code>2*numSamples</code> values.
* The underlying algorithm is used:
*
* <pre>
* for(n=0; n<numSamples; n++) {
* pDst[(2*n)+0)] = pSrc[(2*n)+0]; // real part
* pDst[(2*n)+1)] = -pSrc[(2*n)+1]; // imag part
* }
* </pre>
*
* There are separate functions for floating-point, Q15, and Q31 data types.
*/
/**
* @addtogroup cmplx_conj
* @{
*/
/**
* @brief Floating-point complex conjugate.
* @param *pSrc points to the input vector
* @param *pDst points to the output vector
* @param numSamples number of complex samples in each vector
* @return none.
*/
void arm_cmplx_conj_f32(
float32_t * pSrc,
float32_t * pDst,
uint32_t numSamples)
{
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */
/*loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C[0]+jC[1] = A[0]+ j (-1) A[1] */
/* Calculate Complex Conjugate and then store the results in the destination buffer. */
*pDst++ = *pSrc++;
*pDst++ = -*pSrc++;
*pDst++ = *pSrc++;
*pDst++ = -*pSrc++;
*pDst++ = *pSrc++;
*pDst++ = -*pSrc++;
*pDst++ = *pSrc++;
*pDst++ = -*pSrc++;
/* Decrement the loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* C[0]+jC[1] = A[0]+ j (-1) A[1] */
/* Calculate Complex Conjugate and then store the results in the destination buffer. */
*pDst++ = *pSrc++;
*pDst++ = -*pSrc++;
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while(numSamples > 0u)
{
/* realOut + j (imagOut) = realIn + j (-1) imagIn */
/* Calculate Complex Conjugate and then store the results in the destination buffer. */
*pDst++ = *pSrc++;
*pDst++ = -*pSrc++;
/* Decrement the loop counter */
numSamples--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of cmplx_conj group
*/

123
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
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/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_conj_q15.c
*
* Description: Q15 complex conjugate.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @addtogroup cmplx_conj
* @{
*/
/**
* @brief Q15 complex conjugate.
* @param *pSrc points to the input vector
* @param *pDst points to the output vector
* @param numSamples number of complex samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
*/
void arm_cmplx_conj_q15(
q15_t * pSrc,
q15_t * pDst,
uint32_t numSamples)
{
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */
/*loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C[0]+jC[1] = A[0]+ j (-1) A[1] */
/* Calculate Complex Conjugate and then store the results in the destination buffer. */
*pDst++ = *pSrc++;
*pDst++ = __SSAT(-*pSrc++, 16);
*pDst++ = *pSrc++;
*pDst++ = __SSAT(-*pSrc++, 16);
*pDst++ = *pSrc++;
*pDst++ = __SSAT(-*pSrc++, 16);
*pDst++ = *pSrc++;
*pDst++ = __SSAT(-*pSrc++, 16);
/* Decrement the loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* C[0]+jC[1] = A[0]+ j (-1) A[1] */
/* Calculate Complex Conjugate and then store the results in the destination buffer. */
*pDst++ = *pSrc++;
*pDst++ = __SSAT(-*pSrc++, 16);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while(numSamples > 0u)
{
/* realOut + j (imagOut) = realIn+ j (-1) imagIn */
/* Calculate Complex Conjugate and then store the results in the destination buffer. */
*pDst++ = *pSrc++;
*pDst++ = -*pSrc++;
/* Decrement the loop counter */
numSamples--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of cmplx_conj group
*/

131
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
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/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_conj_q31.c
*
* Description: Q31 complex conjugate.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @addtogroup cmplx_conj
* @{
*/
/**
* @brief Q31 complex conjugate.
* @param *pSrc points to the input vector
* @param *pDst points to the output vector
* @param numSamples number of complex samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
*/
void arm_cmplx_conj_q31(
q31_t * pSrc,
q31_t * pDst,
uint32_t numSamples)
{
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */
q31_t in; /* Input value */
/*loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C[0]+jC[1] = A[0]+ j (-1) A[1] */
/* Calculate Complex Conjugate and then store the results in the destination buffer. */
/* Saturated to 0x7fffffff if the input is -1(0x80000000) */
*pDst++ = *pSrc++;
in = *pSrc++;
*pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
*pDst++ = *pSrc++;
in = *pSrc++;
*pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
*pDst++ = *pSrc++;
in = *pSrc++;
*pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
*pDst++ = *pSrc++;
in = *pSrc++;
*pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
/* Decrement the loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* C[0]+jC[1] = A[0]+ j (-1) A[1] */
/* Calculate Complex Conjugate and then store the results in the destination buffer. */
/* Saturated to 0x7fffffff if the input is -1(0x80000000) */
*pDst++ = *pSrc++;
in = *pSrc++;
*pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while(numSamples > 0u)
{
/* realOut + j (imagOut) = realIn+ j (-1) imagIn */
/* Calculate Complex Conjugate and then store the results in the destination buffer. */
*pDst++ = *pSrc++;
*pDst++ = -*pSrc++;
/* Decrement the loop counter */
numSamples--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of cmplx_conj group
*/

157
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
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@@ -1,157 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_dot_prod_f32.c
*
* Description: Floating-point complex dot product
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @defgroup cmplx_dot_prod Complex Dot Product
*
* Computes the dot product of two complex vectors.
* The vectors are multiplied element-by-element and then summed.
*
* The <code>pSrcA</code> points to the first complex input vector and
* <code>pSrcB</code> points to the second complex input vector.
* <code>numSamples</code> specifies the number of complex samples
* and the data in each array is stored in an interleaved fashion
* (real, imag, real, imag, ...).
* Each array has a total of <code>2*numSamples</code> values.
*
* The underlying algorithm is used:
* <pre>
* realResult=0;
* imagResult=0;
* for(n=0; n<numSamples; n++) {
* realResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+0] - pSrcA[(2*n)+1]*pSrcB[(2*n)+1];
* imagResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+1] + pSrcA[(2*n)+1]*pSrcB[(2*n)+0];
* }
* </pre>
*
* There are separate functions for floating-point, Q15, and Q31 data types.
*/
/**
* @addtogroup cmplx_dot_prod
* @{
*/
/**
* @brief Floating-point complex dot product
* @param *pSrcA points to the first input vector
* @param *pSrcB points to the second input vector
* @param numSamples number of complex samples in each vector
* @param *realResult real part of the result returned here
* @param *imagResult imaginary part of the result returned here
* @return none.
*/
void arm_cmplx_dot_prod_f32(
float32_t * pSrcA,
float32_t * pSrcB,
uint32_t numSamples,
float32_t * realResult,
float32_t * imagResult)
{
float32_t real_sum = 0.0f, imag_sum = 0.0f; /* Temporary result storage */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */
/*loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
real_sum += (*pSrcA++) * (*pSrcB++);
/* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
imag_sum += (*pSrcA++) * (*pSrcB++);
real_sum += (*pSrcA++) * (*pSrcB++);
imag_sum += (*pSrcA++) * (*pSrcB++);
real_sum += (*pSrcA++) * (*pSrcB++);
imag_sum += (*pSrcA++) * (*pSrcB++);
real_sum += (*pSrcA++) * (*pSrcB++);
imag_sum += (*pSrcA++) * (*pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
real_sum += (*pSrcA++) * (*pSrcB++);
/* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
imag_sum += (*pSrcA++) * (*pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while(numSamples > 0u)
{
/* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
real_sum += (*pSrcA++) * (*pSrcB++);
/* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
imag_sum += (*pSrcA++) * (*pSrcB++);
/* Decrement the loop counter */
numSamples--;
}
#endif /* #ifndef ARM_MATH_CM0 */
/* Store the real and imaginary results in the destination buffers */
*realResult = real_sum;
*imagResult = imag_sum;
}
/**
* @} end of cmplx_dot_prod group
*/

141
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
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@@ -1,141 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_dot_prod_q15.c
*
* Description: Processing function for the Q15 Complex Dot product
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @addtogroup cmplx_dot_prod
* @{
*/
/**
* @brief Q15 complex dot product
* @param *pSrcA points to the first input vector
* @param *pSrcB points to the second input vector
* @param numSamples number of complex samples in each vector
* @param *realResult real part of the result returned here
* @param *imagResult imaginary part of the result returned here
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using an internal 64-bit accumulator.
* The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result.
* These are accumulated in a 64-bit accumulator with 34.30 precision.
* As a final step, the accumulators are converted to 8.24 format.
* The return results <code>realResult</code> and <code>imagResult</code> are in 8.24 format.
*/
void arm_cmplx_dot_prod_q15(
q15_t * pSrcA,
q15_t * pSrcB,
uint32_t numSamples,
q31_t * realResult,
q31_t * imagResult)
{
q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */
/*loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
/* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
/* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while(numSamples > 0u)
{
/* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
/* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
/* Decrement the loop counter */
numSamples--;
}
#endif /* #ifndef ARM_MATH_CM0 */
/* Store the real and imaginary results in 8.24 format */
/* Convert real data in 34.30 to 8.24 by 6 right shifts */
*realResult = (q31_t) (real_sum) >> 6;
/* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */
*imagResult = (q31_t) (imag_sum) >> 6;
}
/**
* @} end of cmplx_dot_prod group
*/

142
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
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@@ -1,142 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_dot_prod_q31.c
*
* Description: Q31 complex dot product
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @addtogroup cmplx_dot_prod
* @{
*/
/**
* @brief Q31 complex dot product
* @param *pSrcA points to the first input vector
* @param *pSrcB points to the second input vector
* @param numSamples number of complex samples in each vector
* @param *realResult real part of the result returned here
* @param *imagResult imaginary part of the result returned here
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using an internal 64-bit accumulator.
* The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.
* The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.
* Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768.
* The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format.
* Input down scaling is not required.
*/
void arm_cmplx_dot_prod_q31(
q31_t * pSrcA,
q31_t * pSrcB,
uint32_t numSamples,
q63_t * realResult,
q63_t * imagResult)
{
q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */
/*loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
/* Convert real data in 2.62 to 16.48 by 14 right shifts */
real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
/* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
/* Convert imag data in 2.62 to 16.48 by 14 right shifts */
imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
/* Decrement the loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
/* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while(numSamples > 0u)
{
/* outReal = realA[0]* realB[0] + realA[2]* realB[2] + realA[4]* realB[4] + .....+ realA[numSamples-2]* realB[numSamples-2] */
real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
/* outImag = imagA[1]* imagB[1] + imagA[3]* imagB[3] + imagA[5]* imagB[5] + .....+ imagA[numSamples-1]* imagB[numSamples-1] */
imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
/* Decrement the loop counter */
numSamples--;
}
#endif /* #ifndef ARM_MATH_CM0 */
/* Store the real and imaginary results in 16.48 format */
*realResult = real_sum;
*imagResult = imag_sum;
}
/**
* @} end of cmplx_dot_prod group
*/

154
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
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@@ -1,154 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_mag_f32.c
*
* Description: Floating-point complex magnitude.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @defgroup cmplx_mag Complex Magnitude
*
* Computes the magnitude of the elements of a complex data vector.
*
* The <code>pSrc</code> points to the source data and
* <code>pDst</code> points to the where the result should be written.
* <code>numSamples</code> specifies the number of complex samples
* in the input array and the data is stored in an interleaved fashion
* (real, imag, real, imag, ...).
* The input array has a total of <code>2*numSamples</code> values;
* the output array has a total of <code>numSamples</code> values.
* The underlying algorithm is used:
*
* <pre>
* for(n=0; n<numSamples; n++) {
* pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
* }
* </pre>
*
* There are separate functions for floating-point, Q15, and Q31 data types.
*/
/**
* @addtogroup cmplx_mag
* @{
*/
/**
* @brief Floating-point complex magnitude.
* @param[in] *pSrc points to complex input buffer
* @param[out] *pDst points to real output buffer
* @param[in] numSamples number of complex samples in the input vector
* @return none.
*
*/
void arm_cmplx_mag_f32(
float32_t * pSrc,
float32_t * pDst,
uint32_t numSamples)
{
float32_t realIn, imagIn; /* Temporary variables to hold input values */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */
/*loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
realIn = *pSrc++;
imagIn = *pSrc++;
/* store the result in the destination buffer. */
arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
realIn = *pSrc++;
imagIn = *pSrc++;
arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
realIn = *pSrc++;
imagIn = *pSrc++;
arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
realIn = *pSrc++;
imagIn = *pSrc++;
arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
/* Decrement the loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
realIn = *pSrc++;
imagIn = *pSrc++;
/* store the result in the destination buffer. */
arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while(numSamples > 0u)
{
/* out = sqrt((real * real) + (imag * imag)) */
realIn = *pSrc++;
imagIn = *pSrc++;
/* store the result in the destination buffer. */
arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
/* Decrement the loop counter */
numSamples--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of cmplx_mag group
*/

153
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
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@@ -1,153 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_mag_q15.c
*
* Description: Q15 complex magnitude.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @addtogroup cmplx_mag
* @{
*/
/**
* @brief Q15 complex magnitude
* @param *pSrc points to the complex input vector
* @param *pDst points to the real output vector
* @param numSamples number of complex samples in the input vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.
*/
void arm_cmplx_mag_q15(
q15_t * pSrc,
q15_t * pDst,
uint32_t numSamples)
{
q15_t real, imag; /* Temporary variables to hold input values */
q31_t acc0, acc1; /* Accumulators */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */
/*loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
real = *pSrc++;
imag = *pSrc++;
acc0 = __SMUAD(real, real);
acc1 = __SMUAD(imag, imag);
/* store the result in 2.14 format in the destination buffer. */
arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
real = *pSrc++;
imag = *pSrc++;
acc0 = __SMUAD(real, real);
acc1 = __SMUAD(imag, imag);
/* store the result in 2.14 format in the destination buffer. */
arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
real = *pSrc++;
imag = *pSrc++;
acc0 = __SMUAD(real, real);
acc1 = __SMUAD(imag, imag);
/* store the result in 2.14 format in the destination buffer. */
arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
real = *pSrc++;
imag = *pSrc++;
acc0 = __SMUAD(real, real);
acc1 = __SMUAD(imag, imag);
/* store the result in 2.14 format in the destination buffer. */
arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
/* Decrement the loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
real = *pSrc++;
imag = *pSrc++;
acc0 = __SMUAD(real, real);
acc1 = __SMUAD(imag, imag);
/* store the result in 2.14 format in the destination buffer. */
arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while(numSamples > 0u)
{
/* out = sqrt(real * real + imag * imag) */
real = *pSrc++;
imag = *pSrc++;
acc0 = (real * real);
acc1 = (imag * imag);
/* store the result in 2.14 format in the destination buffer. */
arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
/* Decrement the loop counter */
numSamples--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of cmplx_mag group
*/

151
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
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@@ -1,151 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_mag_q31.c
*
* Description: Q31 complex magnitude
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @addtogroup cmplx_mag
* @{
*/
/**
* @brief Q31 complex magnitude
* @param *pSrc points to the complex input vector
* @param *pDst points to the real output vector
* @param numSamples number of complex samples in the input vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format.
* Input down scaling is not required.
*/
void arm_cmplx_mag_q31(
q31_t * pSrc,
q31_t * pDst,
uint32_t numSamples)
{
q31_t real, imag; /* Temporary variables to hold input values */
q31_t acc0, acc1; /* Accumulators */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */
/*loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
real = *pSrc++;
imag = *pSrc++;
acc0 = (q31_t) (((q63_t) real * real) >> 33);
acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
/* store the result in 2.30 format in the destination buffer. */
arm_sqrt_q31(acc0 + acc1, pDst++);
real = *pSrc++;
imag = *pSrc++;
acc0 = (q31_t) (((q63_t) real * real) >> 33);
acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
/* store the result in 2.30 format in the destination buffer. */
arm_sqrt_q31(acc0 + acc1, pDst++);
real = *pSrc++;
imag = *pSrc++;
acc0 = (q31_t) (((q63_t) real * real) >> 33);
acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
/* store the result in 2.30 format in the destination buffer. */
arm_sqrt_q31(acc0 + acc1, pDst++);
real = *pSrc++;
imag = *pSrc++;
acc0 = (q31_t) (((q63_t) real * real) >> 33);
acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
/* store the result in 2.30 format in the destination buffer. */
arm_sqrt_q31(acc0 + acc1, pDst++);
/* Decrement the loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
real = *pSrc++;
imag = *pSrc++;
acc0 = (q31_t) (((q63_t) real * real) >> 33);
acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
/* store the result in 2.30 format in the destination buffer. */
arm_sqrt_q31(acc0 + acc1, pDst++);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while(numSamples > 0u)
{
/* out = sqrt((real * real) + (imag * imag)) */
real = *pSrc++;
imag = *pSrc++;
acc0 = (q31_t) (((q63_t) real * real) >> 33);
acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
/* store the result in 2.30 format in the destination buffer. */
arm_sqrt_q31(acc0 + acc1, pDst++);
/* Decrement the loop counter */
numSamples--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of cmplx_mag group
*/

155
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
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@@ -1,155 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_mag_squared_f32.c
*
* Description: Floating-point complex magnitude squared.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @defgroup cmplx_mag_squared Complex Magnitude Squared
*
* Computes the magnitude squared of the elements of a complex data vector.
*
* The <code>pSrc</code> points to the source data and
* <code>pDst</code> points to the where the result should be written.
* <code>numSamples</code> specifies the number of complex samples
* in the input array and the data is stored in an interleaved fashion
* (real, imag, real, imag, ...).
* The input array has a total of <code>2*numSamples</code> values;
* the output array has a total of <code>numSamples</code> values.
*
* The underlying algorithm is used:
*
* <pre>
* for(n=0; n<numSamples; n++) {
* pDst[n] = pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2;
* }
* </pre>
*
* There are separate functions for floating-point, Q15, and Q31 data types.
*/
/**
* @addtogroup cmplx_mag_squared
* @{
*/
/**
* @brief Floating-point complex magnitude squared
* @param[in] *pSrc points to the complex input vector
* @param[out] *pDst points to the real output vector
* @param[in] numSamples number of complex samples in the input vector
* @return none.
*/
void arm_cmplx_mag_squared_f32(
float32_t * pSrc,
float32_t * pDst,
uint32_t numSamples)
{
float32_t real, imag; /* Temporary variables to store real and imaginary values */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */
/*loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C[0] = (A[0] * A[0] + A[1] * A[1]) */
real = *pSrc++;
imag = *pSrc++;
/* store the result in the destination buffer. */
*pDst++ = (real * real) + (imag * imag);
real = *pSrc++;
imag = *pSrc++;
*pDst++ = (real * real) + (imag * imag);
real = *pSrc++;
imag = *pSrc++;
*pDst++ = (real * real) + (imag * imag);
real = *pSrc++;
imag = *pSrc++;
*pDst++ = (real * real) + (imag * imag);
/* Decrement the loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* C[0] = (A[0] * A[0] + A[1] * A[1]) */
real = *pSrc++;
imag = *pSrc++;
/* store the result in the destination buffer. */
*pDst++ = (real * real) + (imag * imag);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while(numSamples > 0u)
{
/* reading real and imaginary values */
real = *pSrc++;
imag = *pSrc++;
/* out = (real * real) + (imag * imag) */
/* store the result in the destination buffer. */
*pDst++ = (real * real) + (imag * imag);
/* Decrement the loop counter */
numSamples--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of cmplx_mag_squared group
*/

148
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
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@@ -1,148 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_mag_squared_q15.c
*
* Description: Q15 complex magnitude squared.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @addtogroup cmplx_mag_squared
* @{
*/
/**
* @brief Q15 complex magnitude squared
* @param *pSrc points to the complex input vector
* @param *pDst points to the real output vector
* @param numSamples number of complex samples in the input vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
*/
void arm_cmplx_mag_squared_q15(
q15_t * pSrc,
q15_t * pDst,
uint32_t numSamples)
{
q15_t real, imag; /* Temporary variables to store real and imaginary values */
q31_t acc0, acc1; /* Accumulators */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */
/*loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C[0] = (A[0] * A[0] + A[1] * A[1]) */
real = *pSrc++;
imag = *pSrc++;
acc0 = __SMUAD(real, real);
acc1 = __SMUAD(imag, imag);
/* store the result in 3.13 format in the destination buffer. */
*pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
real = *pSrc++;
imag = *pSrc++;
acc0 = __SMUAD(real, real);
acc1 = __SMUAD(imag, imag);
/* store the result in 3.13 format in the destination buffer. */
*pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
real = *pSrc++;
imag = *pSrc++;
acc0 = __SMUAD(real, real);
acc1 = __SMUAD(imag, imag);
/* store the result in 3.13 format in the destination buffer. */
*pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
real = *pSrc++;
imag = *pSrc++;
acc0 = __SMUAD(real, real);
acc1 = __SMUAD(imag, imag);
/* store the result in 3.13 format in the destination buffer. */
*pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
/* Decrement the loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* C[0] = (A[0] * A[0] + A[1] * A[1]) */
real = *pSrc++;
imag = *pSrc++;
acc0 = __SMUAD(real, real);
acc1 = __SMUAD(imag, imag);
/* store the result in 3.13 format in the destination buffer. */
*pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while(numSamples > 0u)
{
/* out = ((real * real) + (imag * imag)) */
real = *pSrc++;
imag = *pSrc++;
acc0 = (real * real);
acc1 = (imag * imag);
/* store the result in 3.13 format in the destination buffer. */
*pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
/* Decrement the loop counter */
numSamples--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of cmplx_mag_squared group
*/

150
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
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@@ -1,150 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_mag_squared_q31.c
*
* Description: Q31 complex magnitude squared.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @addtogroup cmplx_mag_squared
* @{
*/
/**
* @brief Q31 complex magnitude squared
* @param *pSrc points to the complex input vector
* @param *pDst points to the real output vector
* @param numSamples number of complex samples in the input vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
* Input down scaling is not required.
*/
void arm_cmplx_mag_squared_q31(
q31_t * pSrc,
q31_t * pDst,
uint32_t numSamples)
{
q31_t real, imag; /* Temporary variables to store real and imaginary values */
q31_t acc0, acc1; /* Accumulators */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counter */
/* loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C[0] = (A[0] * A[0] + A[1] * A[1]) */
real = *pSrc++;
imag = *pSrc++;
acc0 = (q31_t) (((q63_t) real * real) >> 33);
acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = acc0 + acc1;
real = *pSrc++;
imag = *pSrc++;
acc0 = (q31_t) (((q63_t) real * real) >> 33);
acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = acc0 + acc1;
real = *pSrc++;
imag = *pSrc++;
acc0 = (q31_t) (((q63_t) real * real) >> 33);
acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = acc0 + acc1;
real = *pSrc++;
imag = *pSrc++;
acc0 = (q31_t) (((q63_t) real * real) >> 33);
acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = acc0 + acc1;
/* Decrement the loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* C[0] = (A[0] * A[0] + A[1] * A[1]) */
real = *pSrc++;
imag = *pSrc++;
acc0 = (q31_t) (((q63_t) real * real) >> 33);
acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = acc0 + acc1;
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while(numSamples > 0u)
{
/* out = ((real * real) + (imag * imag)) */
real = *pSrc++;
imag = *pSrc++;
acc0 = (q31_t) (((q63_t) real * real) >> 33);
acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = acc0 + acc1;
/* Decrement the loop counter */
numSamples--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of cmplx_mag_squared group
*/

180
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
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@@ -1,180 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_mult_cmplx_f32.c
*
* Description: Floating-point complex-by-complex multiplication
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication
*
* Multiplies a complex vector by another complex vector and generates a complex result.
* The data in the complex arrays is stored in an interleaved fashion
* (real, imag, real, imag, ...).
* The parameter <code>numSamples</code> represents the number of complex
* samples processed. The complex arrays have a total of <code>2*numSamples</code>
* real values.
*
* The underlying algorithm is used:
*
* <pre>
* for(n=0; n<numSamples; n++) {
* pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
* pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
* }
* </pre>
*
* There are separate functions for floating-point, Q15, and Q31 data types.
*/
/**
* @addtogroup CmplxByCmplxMult
* @{
*/
/**
* @brief Floating-point complex-by-complex multiplication
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] numSamples number of complex samples in each vector
* @return none.
*/
void arm_cmplx_mult_cmplx_f32(
float32_t * pSrcA,
float32_t * pSrcB,
float32_t * pDst,
uint32_t numSamples)
{
float32_t a, b, c, d; /* Temporary variables to store real and imaginary values */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counters */
/* loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
/* store the result in the destination buffer. */
*pDst++ = (a * c) - (b * d);
*pDst++ = (a * d) + (b * c);
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
*pDst++ = (a * c) - (b * d);
*pDst++ = (a * d) + (b * c);
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
*pDst++ = (a * c) - (b * d);
*pDst++ = (a * d) + (b * c);
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
*pDst++ = (a * c) - (b * d);
*pDst++ = (a * d) + (b * c);
/* Decrement the numSamples loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
/* store the result in the destination buffer. */
*pDst++ = (a * c) - (b * d);
*pDst++ = (a * d) + (b * c);
/* Decrement the numSamples loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while(numSamples > 0u)
{
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
/* store the result in the destination buffer. */
*pDst++ = (a * c) - (b * d);
*pDst++ = (a * d) + (b * c);
/* Decrement the numSamples loop counter */
numSamples--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of CmplxByCmplxMult group
*/

182
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
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@@ -1,182 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_mult_cmplx_q15.c
*
* Description: Q15 complex-by-complex multiplication
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @addtogroup CmplxByCmplxMult
* @{
*/
/**
* @brief Q15 complex-by-complex multiplication
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] numSamples number of complex samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
*/
void arm_cmplx_mult_cmplx_q15(
q15_t * pSrcA,
q15_t * pSrcB,
q15_t * pDst,
uint32_t numSamples)
{
q15_t a, b, c, d; /* Temporary variables to store real and imaginary values */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counters */
/* loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
/* store the result in 3.13 format in the destination buffer. */
*pDst++ =
(q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
/* store the result in 3.13 format in the destination buffer. */
*pDst++ =
(q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
/* store the result in 3.13 format in the destination buffer. */
*pDst++ =
(q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
/* store the result in 3.13 format in the destination buffer. */
*pDst++ =
(q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
/* store the result in 3.13 format in the destination buffer. */
*pDst++ =
(q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
/* store the result in 3.13 format in the destination buffer. */
*pDst++ =
(q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
/* store the result in 3.13 format in the destination buffer. */
*pDst++ =
(q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
/* store the result in 3.13 format in the destination buffer. */
*pDst++ =
(q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
/* Decrement the blockSize loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
/* store the result in 3.13 format in the destination buffer. */
*pDst++ =
(q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
/* store the result in 3.13 format in the destination buffer. */
*pDst++ =
(q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
/* Decrement the blockSize loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while(numSamples > 0u)
{
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
/* store the result in 3.13 format in the destination buffer. */
*pDst++ =
(q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
/* store the result in 3.13 format in the destination buffer. */
*pDst++ =
(q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
/* Decrement the blockSize loop counter */
numSamples--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of CmplxByCmplxMult group
*/

209
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
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@@ -1,209 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_mult_cmplx_q31.c
*
* Description: Q31 complex-by-complex multiplication
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @addtogroup CmplxByCmplxMult
* @{
*/
/**
* @brief Q31 complex-by-complex multiplication
* @param[in] *pSrcA points to the first input vector
* @param[in] *pSrcB points to the second input vector
* @param[out] *pDst points to the output vector
* @param[in] numSamples number of complex samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
* Input down scaling is not required.
*/
void arm_cmplx_mult_cmplx_q31(
q31_t * pSrcA,
q31_t * pSrcB,
q31_t * pDst,
uint32_t numSamples)
{
q31_t a, b, c, d; /* Temporary variables to store real and imaginary values */
uint32_t blkCnt; /* loop counters */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
/* store the real result in 3.29 format in the destination buffer. */
*pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
/* store the imag result in 3.29 format in the destination buffer. */
*pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
/* Decrement the blockSize loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
/* Decrement the blockSize loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* loop Unrolling */
blkCnt = numSamples >> 1u;
/* First part of the processing with loop unrolling. Compute 2 outputs at a time.
** a second loop below computes the remaining 1 sample. */
while(blkCnt > 0u)
{
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
/* store the real result in 3.29 format in the destination buffer. */
*pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
/* store the imag result in 3.29 format in the destination buffer. */
*pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
/* Decrement the blockSize loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 2, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x2u;
while(blkCnt > 0u)
{
/* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */
/* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i]. */
a = *pSrcA++;
b = *pSrcA++;
c = *pSrcB++;
d = *pSrcB++;
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
/* store the result in 3.29 format in the destination buffer. */
*pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
/* Decrement the blockSize loop counter */
blkCnt--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of CmplxByCmplxMult group
*/

157
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
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@@ -1,157 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_mult_real_f32.c
*
* Description: Floating-point complex by real multiplication
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @defgroup CmplxByRealMult Complex-by-Real Multiplication
*
* Multiplies a complex vector by a real vector and generates a complex result.
* The data in the complex arrays is stored in an interleaved fashion
* (real, imag, real, imag, ...).
* The parameter <code>numSamples</code> represents the number of complex
* samples processed. The complex arrays have a total of <code>2*numSamples</code>
* real values while the real array has a total of <code>numSamples</code>
* real values.
*
* The underlying algorithm is used:
*
* <pre>
* for(n=0; n<numSamples; n++) {
* pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];
* pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];
* }
* </pre>
*
* There are separate functions for floating-point, Q15, and Q31 data types.
*/
/**
* @addtogroup CmplxByRealMult
* @{
*/
/**
* @brief Floating-point complex-by-real multiplication
* @param[in] *pSrcCmplx points to the complex input vector
* @param[in] *pSrcReal points to the real input vector
* @param[out] *pCmplxDst points to the complex output vector
* @param[in] numSamples number of samples in each vector
* @return none.
*/
void arm_cmplx_mult_real_f32(
float32_t * pSrcCmplx,
float32_t * pSrcReal,
float32_t * pCmplxDst,
uint32_t numSamples)
{
float32_t in; /* Temporary variable to store input value */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counters */
/* loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C[2 * i] = A[2 * i] * B[i]. */
/* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
in = *pSrcReal++;
/* store the result in the destination buffer. */
*pCmplxDst++ = (*pSrcCmplx++) * (in);
*pCmplxDst++ = (*pSrcCmplx++) * (in);
in = *pSrcReal++;
*pCmplxDst++ = (*pSrcCmplx++) * (in);
*pCmplxDst++ = (*pSrcCmplx++) * (in);
in = *pSrcReal++;
*pCmplxDst++ = (*pSrcCmplx++) * (in);
*pCmplxDst++ = (*pSrcCmplx++) * (in);
in = *pSrcReal++;
*pCmplxDst++ = (*pSrcCmplx++) * (in);
*pCmplxDst++ = (*pSrcCmplx++) * (in);
/* Decrement the numSamples loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* C[2 * i] = A[2 * i] * B[i]. */
/* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
in = *pSrcReal++;
/* store the result in the destination buffer. */
*pCmplxDst++ = (*pSrcCmplx++) * (in);
*pCmplxDst++ = (*pSrcCmplx++) * (in);
/* Decrement the numSamples loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while(numSamples > 0u)
{
/* realOut = realA * realB. */
/* imagOut = imagA * realB. */
in = *pSrcReal++;
/* store the result in the destination buffer. */
*pCmplxDst++ = (*pSrcCmplx++) * (in);
*pCmplxDst++ = (*pSrcCmplx++) * (in);
/* Decrement the numSamples loop counter */
numSamples--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of CmplxByRealMult group
*/

151
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
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@@ -1,151 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_mult_real_q15.c
*
* Description: Q15 complex by real multiplication
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @addtogroup CmplxByRealMult
* @{
*/
/**
* @brief Q15 complex-by-real multiplication
* @param[in] *pSrcCmplx points to the complex input vector
* @param[in] *pSrcReal points to the real input vector
* @param[out] *pCmplxDst points to the complex output vector
* @param[in] numSamples number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
*/
void arm_cmplx_mult_real_q15(
q15_t * pSrcCmplx,
q15_t * pSrcReal,
q15_t * pCmplxDst,
uint32_t numSamples)
{
q15_t in; /* Temporary variable to store input value */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counters */
/* loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C[2 * i] = A[2 * i] * B[i]. */
/* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
in = *pSrcReal++;
/* store the result in the destination buffer. */
*pCmplxDst++ =
(q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
*pCmplxDst++ =
(q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
in = *pSrcReal++;
*pCmplxDst++ =
(q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
*pCmplxDst++ =
(q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
in = *pSrcReal++;
*pCmplxDst++ =
(q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
*pCmplxDst++ =
(q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
in = *pSrcReal++;
*pCmplxDst++ =
(q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
*pCmplxDst++ =
(q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
/* Decrement the numSamples loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* C[2 * i] = A[2 * i] * B[i]. */
/* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
in = *pSrcReal++;
/* store the result in the destination buffer. */
*pCmplxDst++ =
(q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
*pCmplxDst++ =
(q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
/* Decrement the numSamples loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while(numSamples > 0u)
{
/* realOut = realA * realB. */
/* imagOut = imagA * realB. */
in = *pSrcReal++;
/* store the result in the destination buffer. */
*pCmplxDst++ =
(q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
*pCmplxDst++ =
(q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
/* Decrement the numSamples loop counter */
numSamples--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of CmplxByRealMult group
*/

151
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
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@@ -1,151 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cmplx_mult_real_q31.c
*
* Description: Q31 complex by real multiplication
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupCmplxMath
*/
/**
* @addtogroup CmplxByRealMult
* @{
*/
/**
* @brief Q31 complex-by-real multiplication
* @param[in] *pSrcCmplx points to the complex input vector
* @param[in] *pSrcReal points to the real input vector
* @param[out] *pCmplxDst points to the complex output vector
* @param[in] numSamples number of samples in each vector
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
*/
void arm_cmplx_mult_real_q31(
q31_t * pSrcCmplx,
q31_t * pSrcReal,
q31_t * pCmplxDst,
uint32_t numSamples)
{
q31_t in; /* Temporary variable to store input value */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint32_t blkCnt; /* loop counters */
/* loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C[2 * i] = A[2 * i] * B[i]. */
/* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
in = *pSrcReal++;
/* store the result in the destination buffer. */
*pCmplxDst++ =
(q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
*pCmplxDst++ =
(q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
in = *pSrcReal++;
*pCmplxDst++ =
(q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
*pCmplxDst++ =
(q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
in = *pSrcReal++;
*pCmplxDst++ =
(q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
*pCmplxDst++ =
(q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
in = *pSrcReal++;
*pCmplxDst++ =
(q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
*pCmplxDst++ =
(q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
/* Decrement the numSamples loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while(blkCnt > 0u)
{
/* C[2 * i] = A[2 * i] * B[i]. */
/* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
in = *pSrcReal++;
/* store the result in the destination buffer. */
*pCmplxDst++ =
(q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
*pCmplxDst++ =
(q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
/* Decrement the numSamples loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while(numSamples > 0u)
{
/* realOut = realA * realB. */
/* imagReal = imagA * realB. */
in = *pSrcReal++;
/* store the result in the destination buffer. */
*pCmplxDst++ =
(q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
*pCmplxDst++ =
(q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
/* Decrement the numSamples loop counter */
numSamples--;
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of CmplxByRealMult group
*/

76
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c
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@@ -1,76 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_pid_init_f32.c
*
* Description: Floating-point PID Control initialization function
*
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* ------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @addtogroup PID
* @{
*/
/**
* @brief Initialization function for the floating-point PID Control.
* @param[in,out] *S points to an instance of the PID structure.
* @param[in] resetStateFlag flag to reset the state. 0 = no change in state & 1 = reset the state.
* @return none.
* \par Description:
* \par
* The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
* The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
* using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
* also sets the state variables to all zeros.
*/
void arm_pid_init_f32(
arm_pid_instance_f32 * S,
int32_t resetStateFlag)
{
/* Derived coefficient A0 */
S->A0 = S->Kp + S->Ki + S->Kd;
/* Derived coefficient A1 */
S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd);
/* Derived coefficient A2 */
S->A2 = S->Kd;
/* Check whether state needs reset or not */
if(resetStateFlag)
{
/* Clear the state buffer. The size will be always 3 samples */
memset(S->state, 0, 3u * sizeof(float32_t));
}
}
/**
* @} end of PID group
*/

111
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c
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@@ -1,111 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_pid_init_q15.c
*
* Description: Q15 PID Control initialization function
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @addtogroup PID
* @{
*/
/**
* @details
* @param[in,out] *S points to an instance of the Q15 PID structure.
* @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
* @return none.
* \par Description:
* \par
* The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
* The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
* using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
* also sets the state variables to all zeros.
*/
void arm_pid_init_q15(
arm_pid_instance_q15 * S,
int32_t resetStateFlag)
{
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* Derived coefficient A0 */
S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd);
/* Derived coefficients and pack into A1 */
#ifndef ARM_MATH_BIG_ENDIAN
S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16);
#else
S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Check whether state needs reset or not */
if(resetStateFlag)
{
/* Clear the state buffer. The size will be always 3 samples */
memset(S->state, 0, 3u * sizeof(q15_t));
}
#else
/* Run the below code for Cortex-M0 */
q31_t temp; /*to store the sum */
/* Derived coefficient A0 */
temp = S->Kp + S->Ki + S->Kd;
S->A0 = (q15_t) __SSAT(temp, 16);
/* Derived coefficients and pack into A1 */
temp = -(S->Kd + S->Kd + S->Kp);
S->A1 = (q15_t) __SSAT(temp, 16);
S->A2 = S->Kd;
/* Check whether state needs reset or not */
if(resetStateFlag)
{
/* Clear the state buffer. The size will be always 3 samples */
memset(S->state, 0, 3u * sizeof(q15_t));
}
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of PID group
*/

96
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c
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@@ -1,96 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_pid_init_q31.c
*
* Description: Q31 PID Control initialization function
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* ------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @addtogroup PID
* @{
*/
/**
* @brief Initialization function for the Q31 PID Control.
* @param[in,out] *S points to an instance of the Q31 PID structure.
* @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
* @return none.
* \par Description:
* \par
* The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
* The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
* using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
* also sets the state variables to all zeros.
*/
void arm_pid_init_q31(
arm_pid_instance_q31 * S,
int32_t resetStateFlag)
{
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* Derived coefficient A0 */
S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
/* Derived coefficient A1 */
S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
#else
/* Run the below code for Cortex-M0 */
q31_t temp;
/* Derived coefficient A0 */
temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd);
/* Derived coefficient A1 */
temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
#endif /* #ifndef ARM_MATH_CM0 */
/* Derived coefficient A2 */
S->A2 = S->Kd;
/* Check whether state needs reset or not */
if(resetStateFlag)
{
/* Clear the state buffer. The size will be always 3 samples */
memset(S->state, 0, 3u * sizeof(q31_t));
}
}
/**
* @} end of PID group
*/

54
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c
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@@ -1,54 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_pid_reset_f32.c
*
* Description: Floating-point PID Control reset function
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* ------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @addtogroup PID
* @{
*/
/**
* @brief Reset function for the floating-point PID Control.
* @param[in] *S Instance pointer of PID control data structure.
* @return none.
* \par Description:
* The function resets the state buffer to zeros.
*/
void arm_pid_reset_f32(
arm_pid_instance_f32 * S)
{
/* Clear the state buffer. The size will be always 3 samples */
memset(S->state, 0, 3u * sizeof(float32_t));
}
/**
* @} end of PID group
*/

53
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c
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@@ -1,53 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_pid_reset_q15.c
*
* Description: Q15 PID Control reset function
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @addtogroup PID
* @{
*/
/**
* @brief Reset function for the Q15 PID Control.
* @param[in] *S Instance pointer of PID control data structure.
* @return none.
* \par Description:
* The function resets the state buffer to zeros.
*/
void arm_pid_reset_q15(
arm_pid_instance_q15 * S)
{
/* Reset state to zero, The size will be always 3 samples */
memset(S->state, 0, 3u * sizeof(q15_t));
}
/**
* @} end of PID group
*/

54
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c
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@@ -1,54 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_pid_reset_q31.c
*
* Description: Q31 PID Control reset function
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* ------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @addtogroup PID
* @{
*/
/**
* @brief Reset function for the Q31 PID Control.
* @param[in] *S Instance pointer of PID control data structure.
* @return none.
* \par Description:
* The function resets the state buffer to zeros.
*/
void arm_pid_reset_q31(
arm_pid_instance_q31 * S)
{
/* Clear the state buffer. The size will be always 3 samples */
memset(S->state, 0, 3u * sizeof(q31_t));
}
/**
* @} end of PID group
*/

408
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c
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@@ -1,408 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_sin_cos_f32.c
*
* Description: Sine and Cosine calculation for floating-point values.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupController
*/
/**
* @defgroup SinCos Sine Cosine
*
* Computes the trigonometric sine and cosine values using a combination of table lookup
* and linear interpolation.
* There are separate functions for Q31 and floating-point data types.
* The input to the floating-point version is in degrees while the
* fixed-point Q31 have a scaled input with the range
* [-1 1) mapping to [-180 180) degrees.
*
* The implementation is based on table lookup using 360 values together with linear interpolation.
* The steps used are:
* -# Calculation of the nearest integer table index.
* -# Compute the fractional portion (fract) of the input.
* -# Fetch the value corresponding to \c index from sine table to \c y0 and also value from \c index+1 to \c y1.
* -# Sine value is computed as <code> *psinVal = y0 + (fract * (y1 - y0))</code>.
* -# Fetch the value corresponding to \c index from cosine table to \c y0 and also value from \c index+1 to \c y1.
* -# Cosine value is computed as <code> *pcosVal = y0 + (fract * (y1 - y0))</code>.
*/
/**
* @addtogroup SinCos
* @{
*/
/**
* \par
* Cosine Table is generated from following loop
* <pre>for(i = 0; i < 360; i++)
* {
* cosTable[i]= cos((i-180) * PI/180.0);
* } </pre>
*/
static const float32_t cosTable[360] = {
-0.999847695156391270f, -0.999390827019095760f, -0.998629534754573830f,
-0.997564050259824200f, -0.996194698091745550f, -0.994521895368273290f,
-0.992546151641321980f, -0.990268068741570250f,
-0.987688340595137660f, -0.984807753012208020f, -0.981627183447663980f,
-0.978147600733805690f, -0.974370064785235250f, -0.970295726275996470f,
-0.965925826289068200f, -0.961261695938318670f,
-0.956304755963035440f, -0.951056516295153530f, -0.945518575599316740f,
-0.939692620785908320f, -0.933580426497201740f, -0.927183854566787310f,
-0.920504853452440150f, -0.913545457642600760f,
-0.906307787036649940f, -0.898794046299167040f, -0.891006524188367790f,
-0.882947592858926770f, -0.874619707139395740f, -0.866025403784438710f,
-0.857167300702112220f, -0.848048096156425960f,
-0.838670567945424160f, -0.829037572555041620f, -0.819152044288991580f,
-0.809016994374947340f, -0.798635510047292940f, -0.788010753606721900f,
-0.777145961456970680f, -0.766044443118977900f,
-0.754709580222772010f, -0.743144825477394130f, -0.731353701619170460f,
-0.719339800338651300f, -0.707106781186547460f, -0.694658370458997030f,
-0.681998360062498370f, -0.669130606358858240f,
-0.656059028990507500f, -0.642787609686539360f, -0.629320391049837280f,
-0.615661475325658290f, -0.601815023152048380f, -0.587785252292473030f,
-0.573576436351045830f, -0.559192903470746680f,
-0.544639035015027080f, -0.529919264233204790f, -0.515038074910054270f,
-0.499999999999999780f, -0.484809620246337000f, -0.469471562785890530f,
-0.453990499739546750f, -0.438371146789077510f,
-0.422618261740699330f, -0.406736643075800100f, -0.390731128489273600f,
-0.374606593415912070f, -0.358367949545300270f, -0.342020143325668710f,
-0.325568154457156420f, -0.309016994374947340f,
-0.292371704722736660f, -0.275637355816999050f, -0.258819045102520850f,
-0.241921895599667790f, -0.224951054343864810f, -0.207911690817759120f,
-0.190808995376544800f, -0.173648177666930300f,
-0.156434465040231040f, -0.139173100960065350f, -0.121869343405147370f,
-0.104528463267653330f, -0.087155742747658235f, -0.069756473744125330f,
-0.052335956242943620f, -0.034899496702500733f,
-0.017452406437283477f, 0.000000000000000061f, 0.017452406437283376f,
0.034899496702501080f, 0.052335956242943966f, 0.069756473744125455f,
0.087155742747658138f, 0.104528463267653460f,
0.121869343405147490f, 0.139173100960065690f, 0.156434465040230920f,
0.173648177666930410f, 0.190808995376544920f, 0.207911690817759450f,
0.224951054343864920f, 0.241921895599667900f,
0.258819045102520740f, 0.275637355816999160f, 0.292371704722736770f,
0.309016994374947450f, 0.325568154457156760f, 0.342020143325668820f,
0.358367949545300380f, 0.374606593415911960f,
0.390731128489273940f, 0.406736643075800210f, 0.422618261740699440f,
0.438371146789077460f, 0.453990499739546860f, 0.469471562785890860f,
0.484809620246337110f, 0.500000000000000110f,
0.515038074910054380f, 0.529919264233204900f, 0.544639035015027200f,
0.559192903470746790f, 0.573576436351046050f, 0.587785252292473140f,
0.601815023152048270f, 0.615661475325658290f,
0.629320391049837500f, 0.642787609686539360f, 0.656059028990507280f,
0.669130606358858240f, 0.681998360062498480f, 0.694658370458997370f,
0.707106781186547570f, 0.719339800338651190f,
0.731353701619170570f, 0.743144825477394240f, 0.754709580222772010f,
0.766044443118978010f, 0.777145961456970900f, 0.788010753606722010f,
0.798635510047292830f, 0.809016994374947450f,
0.819152044288991800f, 0.829037572555041620f, 0.838670567945424050f,
0.848048096156425960f, 0.857167300702112330f, 0.866025403784438710f,
0.874619707139395740f, 0.882947592858926990f,
0.891006524188367900f, 0.898794046299167040f, 0.906307787036649940f,
0.913545457642600870f, 0.920504853452440370f, 0.927183854566787420f,
0.933580426497201740f, 0.939692620785908430f,
0.945518575599316850f, 0.951056516295153530f, 0.956304755963035440f,
0.961261695938318890f, 0.965925826289068310f, 0.970295726275996470f,
0.974370064785235250f, 0.978147600733805690f,
0.981627183447663980f, 0.984807753012208020f, 0.987688340595137770f,
0.990268068741570360f, 0.992546151641321980f, 0.994521895368273290f,
0.996194698091745550f, 0.997564050259824200f,
0.998629534754573830f, 0.999390827019095760f, 0.999847695156391270f,
1.000000000000000000f, 0.999847695156391270f, 0.999390827019095760f,
0.998629534754573830f, 0.997564050259824200f,
0.996194698091745550f, 0.994521895368273290f, 0.992546151641321980f,
0.990268068741570360f, 0.987688340595137770f, 0.984807753012208020f,
0.981627183447663980f, 0.978147600733805690f,
0.974370064785235250f, 0.970295726275996470f, 0.965925826289068310f,
0.961261695938318890f, 0.956304755963035440f, 0.951056516295153530f,
0.945518575599316850f, 0.939692620785908430f,
0.933580426497201740f, 0.927183854566787420f, 0.920504853452440370f,
0.913545457642600870f, 0.906307787036649940f, 0.898794046299167040f,
0.891006524188367900f, 0.882947592858926990f,
0.874619707139395740f, 0.866025403784438710f, 0.857167300702112330f,
0.848048096156425960f, 0.838670567945424050f, 0.829037572555041620f,
0.819152044288991800f, 0.809016994374947450f,
0.798635510047292830f, 0.788010753606722010f, 0.777145961456970900f,
0.766044443118978010f, 0.754709580222772010f, 0.743144825477394240f,
0.731353701619170570f, 0.719339800338651190f,
0.707106781186547570f, 0.694658370458997370f, 0.681998360062498480f,
0.669130606358858240f, 0.656059028990507280f, 0.642787609686539360f,
0.629320391049837500f, 0.615661475325658290f,
0.601815023152048270f, 0.587785252292473140f, 0.573576436351046050f,
0.559192903470746790f, 0.544639035015027200f, 0.529919264233204900f,
0.515038074910054380f, 0.500000000000000110f,
0.484809620246337110f, 0.469471562785890860f, 0.453990499739546860f,
0.438371146789077460f, 0.422618261740699440f, 0.406736643075800210f,
0.390731128489273940f, 0.374606593415911960f,
0.358367949545300380f, 0.342020143325668820f, 0.325568154457156760f,
0.309016994374947450f, 0.292371704722736770f, 0.275637355816999160f,
0.258819045102520740f, 0.241921895599667900f,
0.224951054343864920f, 0.207911690817759450f, 0.190808995376544920f,
0.173648177666930410f, 0.156434465040230920f, 0.139173100960065690f,
0.121869343405147490f, 0.104528463267653460f,
0.087155742747658138f, 0.069756473744125455f, 0.052335956242943966f,
0.034899496702501080f, 0.017452406437283376f, 0.000000000000000061f,
-0.017452406437283477f, -0.034899496702500733f,
-0.052335956242943620f, -0.069756473744125330f, -0.087155742747658235f,
-0.104528463267653330f, -0.121869343405147370f, -0.139173100960065350f,
-0.156434465040231040f, -0.173648177666930300f,
-0.190808995376544800f, -0.207911690817759120f, -0.224951054343864810f,
-0.241921895599667790f, -0.258819045102520850f, -0.275637355816999050f,
-0.292371704722736660f, -0.309016994374947340f,
-0.325568154457156420f, -0.342020143325668710f, -0.358367949545300270f,
-0.374606593415912070f, -0.390731128489273600f, -0.406736643075800100f,
-0.422618261740699330f, -0.438371146789077510f,
-0.453990499739546750f, -0.469471562785890530f, -0.484809620246337000f,
-0.499999999999999780f, -0.515038074910054270f, -0.529919264233204790f,
-0.544639035015027080f, -0.559192903470746680f,
-0.573576436351045830f, -0.587785252292473030f, -0.601815023152048380f,
-0.615661475325658290f, -0.629320391049837280f, -0.642787609686539360f,
-0.656059028990507500f, -0.669130606358858240f,
-0.681998360062498370f, -0.694658370458997030f, -0.707106781186547460f,
-0.719339800338651300f, -0.731353701619170460f, -0.743144825477394130f,
-0.754709580222772010f, -0.766044443118977900f,
-0.777145961456970680f, -0.788010753606721900f, -0.798635510047292940f,
-0.809016994374947340f, -0.819152044288991580f, -0.829037572555041620f,
-0.838670567945424160f, -0.848048096156425960f,
-0.857167300702112220f, -0.866025403784438710f, -0.874619707139395740f,
-0.882947592858926770f, -0.891006524188367790f, -0.898794046299167040f,
-0.906307787036649940f, -0.913545457642600760f,
-0.920504853452440150f, -0.927183854566787310f, -0.933580426497201740f,
-0.939692620785908320f, -0.945518575599316740f, -0.951056516295153530f,
-0.956304755963035440f, -0.961261695938318670f,
-0.965925826289068200f, -0.970295726275996470f, -0.974370064785235250f,
-0.978147600733805690f, -0.981627183447663980f, -0.984807753012208020f,
-0.987688340595137660f, -0.990268068741570250f,
-0.992546151641321980f, -0.994521895368273290f, -0.996194698091745550f,
-0.997564050259824200f, -0.998629534754573830f, -0.999390827019095760f,
-0.999847695156391270f, -1.000000000000000000f
};
/**
* \par
* Sine Table is generated from following loop
* <pre>for(i = 0; i < 360; i++)
* {
* sinTable[i]= sin((i-180) * PI/180.0);
* } </pre>
*/
static const float32_t sinTable[360] = {
-0.017452406437283439f, -0.034899496702500699f, -0.052335956242943807f,
-0.069756473744125524f, -0.087155742747658638f, -0.104528463267653730f,
-0.121869343405147550f, -0.139173100960065740f,
-0.156434465040230980f, -0.173648177666930280f, -0.190808995376544970f,
-0.207911690817759310f, -0.224951054343864780f, -0.241921895599667730f,
-0.258819045102521020f, -0.275637355816999660f,
-0.292371704722737050f, -0.309016994374947510f, -0.325568154457156980f,
-0.342020143325668880f, -0.358367949545300210f, -0.374606593415912240f,
-0.390731128489274160f, -0.406736643075800430f,
-0.422618261740699500f, -0.438371146789077290f, -0.453990499739546860f,
-0.469471562785891080f, -0.484809620246337170f, -0.499999999999999940f,
-0.515038074910054380f, -0.529919264233204900f,
-0.544639035015026860f, -0.559192903470746900f, -0.573576436351046380f,
-0.587785252292473250f, -0.601815023152048160f, -0.615661475325658400f,
-0.629320391049837720f, -0.642787609686539470f,
-0.656059028990507280f, -0.669130606358858350f, -0.681998360062498590f,
-0.694658370458997140f, -0.707106781186547570f, -0.719339800338651410f,
-0.731353701619170570f, -0.743144825477394240f,
-0.754709580222771790f, -0.766044443118978010f, -0.777145961456971010f,
-0.788010753606722010f, -0.798635510047292720f, -0.809016994374947450f,
-0.819152044288992020f, -0.829037572555041740f,
-0.838670567945424050f, -0.848048096156426070f, -0.857167300702112330f,
-0.866025403784438710f, -0.874619707139395850f, -0.882947592858927100f,
-0.891006524188367900f, -0.898794046299166930f,
-0.906307787036650050f, -0.913545457642600980f, -0.920504853452440370f,
-0.927183854566787420f, -0.933580426497201740f, -0.939692620785908430f,
-0.945518575599316850f, -0.951056516295153640f,
-0.956304755963035550f, -0.961261695938318890f, -0.965925826289068310f,
-0.970295726275996470f, -0.974370064785235250f, -0.978147600733805690f,
-0.981627183447663980f, -0.984807753012208020f,
-0.987688340595137660f, -0.990268068741570360f, -0.992546151641322090f,
-0.994521895368273400f, -0.996194698091745550f, -0.997564050259824200f,
-0.998629534754573830f, -0.999390827019095760f,
-0.999847695156391270f, -1.000000000000000000f, -0.999847695156391270f,
-0.999390827019095760f, -0.998629534754573830f, -0.997564050259824200f,
-0.996194698091745550f, -0.994521895368273290f,
-0.992546151641321980f, -0.990268068741570250f, -0.987688340595137770f,
-0.984807753012208020f, -0.981627183447663980f, -0.978147600733805580f,
-0.974370064785235250f, -0.970295726275996470f,
-0.965925826289068310f, -0.961261695938318890f, -0.956304755963035440f,
-0.951056516295153530f, -0.945518575599316740f, -0.939692620785908320f,
-0.933580426497201740f, -0.927183854566787420f,
-0.920504853452440260f, -0.913545457642600870f, -0.906307787036649940f,
-0.898794046299167040f, -0.891006524188367790f, -0.882947592858926880f,
-0.874619707139395740f, -0.866025403784438600f,
-0.857167300702112220f, -0.848048096156426070f, -0.838670567945423940f,
-0.829037572555041740f, -0.819152044288991800f, -0.809016994374947450f,
-0.798635510047292830f, -0.788010753606722010f,
-0.777145961456970790f, -0.766044443118978010f, -0.754709580222772010f,
-0.743144825477394240f, -0.731353701619170460f, -0.719339800338651080f,
-0.707106781186547460f, -0.694658370458997250f,
-0.681998360062498480f, -0.669130606358858240f, -0.656059028990507160f,
-0.642787609686539250f, -0.629320391049837390f, -0.615661475325658180f,
-0.601815023152048270f, -0.587785252292473140f,
-0.573576436351046050f, -0.559192903470746900f, -0.544639035015027080f,
-0.529919264233204900f, -0.515038074910054160f, -0.499999999999999940f,
-0.484809620246337060f, -0.469471562785890810f,
-0.453990499739546750f, -0.438371146789077400f, -0.422618261740699440f,
-0.406736643075800150f, -0.390731128489273720f, -0.374606593415912010f,
-0.358367949545300270f, -0.342020143325668710f,
-0.325568154457156640f, -0.309016994374947400f, -0.292371704722736770f,
-0.275637355816999160f, -0.258819045102520740f, -0.241921895599667730f,
-0.224951054343865000f, -0.207911690817759310f,
-0.190808995376544800f, -0.173648177666930330f, -0.156434465040230870f,
-0.139173100960065440f, -0.121869343405147480f, -0.104528463267653460f,
-0.087155742747658166f, -0.069756473744125302f,
-0.052335956242943828f, -0.034899496702500969f, -0.017452406437283512f,
0.000000000000000000f, 0.017452406437283512f, 0.034899496702500969f,
0.052335956242943828f, 0.069756473744125302f,
0.087155742747658166f, 0.104528463267653460f, 0.121869343405147480f,
0.139173100960065440f, 0.156434465040230870f, 0.173648177666930330f,
0.190808995376544800f, 0.207911690817759310f,
0.224951054343865000f, 0.241921895599667730f, 0.258819045102520740f,
0.275637355816999160f, 0.292371704722736770f, 0.309016994374947400f,
0.325568154457156640f, 0.342020143325668710f,
0.358367949545300270f, 0.374606593415912010f, 0.390731128489273720f,
0.406736643075800150f, 0.422618261740699440f, 0.438371146789077400f,
0.453990499739546750f, 0.469471562785890810f,
0.484809620246337060f, 0.499999999999999940f, 0.515038074910054160f,
0.529919264233204900f, 0.544639035015027080f, 0.559192903470746900f,
0.573576436351046050f, 0.587785252292473140f,
0.601815023152048270f, 0.615661475325658180f, 0.629320391049837390f,
0.642787609686539250f, 0.656059028990507160f, 0.669130606358858240f,
0.681998360062498480f, 0.694658370458997250f,
0.707106781186547460f, 0.719339800338651080f, 0.731353701619170460f,
0.743144825477394240f, 0.754709580222772010f, 0.766044443118978010f,
0.777145961456970790f, 0.788010753606722010f,
0.798635510047292830f, 0.809016994374947450f, 0.819152044288991800f,
0.829037572555041740f, 0.838670567945423940f, 0.848048096156426070f,
0.857167300702112220f, 0.866025403784438600f,
0.874619707139395740f, 0.882947592858926880f, 0.891006524188367790f,
0.898794046299167040f, 0.906307787036649940f, 0.913545457642600870f,
0.920504853452440260f, 0.927183854566787420f,
0.933580426497201740f, 0.939692620785908320f, 0.945518575599316740f,
0.951056516295153530f, 0.956304755963035440f, 0.961261695938318890f,
0.965925826289068310f, 0.970295726275996470f,
0.974370064785235250f, 0.978147600733805580f, 0.981627183447663980f,
0.984807753012208020f, 0.987688340595137770f, 0.990268068741570250f,
0.992546151641321980f, 0.994521895368273290f,
0.996194698091745550f, 0.997564050259824200f, 0.998629534754573830f,
0.999390827019095760f, 0.999847695156391270f, 1.000000000000000000f,
0.999847695156391270f, 0.999390827019095760f,
0.998629534754573830f, 0.997564050259824200f, 0.996194698091745550f,
0.994521895368273400f, 0.992546151641322090f, 0.990268068741570360f,
0.987688340595137660f, 0.984807753012208020f,
0.981627183447663980f, 0.978147600733805690f, 0.974370064785235250f,
0.970295726275996470f, 0.965925826289068310f, 0.961261695938318890f,
0.956304755963035550f, 0.951056516295153640f,
0.945518575599316850f, 0.939692620785908430f, 0.933580426497201740f,
0.927183854566787420f, 0.920504853452440370f, 0.913545457642600980f,
0.906307787036650050f, 0.898794046299166930f,
0.891006524188367900f, 0.882947592858927100f, 0.874619707139395850f,
0.866025403784438710f, 0.857167300702112330f, 0.848048096156426070f,
0.838670567945424050f, 0.829037572555041740f,
0.819152044288992020f, 0.809016994374947450f, 0.798635510047292720f,
0.788010753606722010f, 0.777145961456971010f, 0.766044443118978010f,
0.754709580222771790f, 0.743144825477394240f,
0.731353701619170570f, 0.719339800338651410f, 0.707106781186547570f,
0.694658370458997140f, 0.681998360062498590f, 0.669130606358858350f,
0.656059028990507280f, 0.642787609686539470f,
0.629320391049837720f, 0.615661475325658400f, 0.601815023152048160f,
0.587785252292473250f, 0.573576436351046380f, 0.559192903470746900f,
0.544639035015026860f, 0.529919264233204900f,
0.515038074910054380f, 0.499999999999999940f, 0.484809620246337170f,
0.469471562785891080f, 0.453990499739546860f, 0.438371146789077290f,
0.422618261740699500f, 0.406736643075800430f,
0.390731128489274160f, 0.374606593415912240f, 0.358367949545300210f,
0.342020143325668880f, 0.325568154457156980f, 0.309016994374947510f,
0.292371704722737050f, 0.275637355816999660f,
0.258819045102521020f, 0.241921895599667730f, 0.224951054343864780f,
0.207911690817759310f, 0.190808995376544970f, 0.173648177666930280f,
0.156434465040230980f, 0.139173100960065740f,
0.121869343405147550f, 0.104528463267653730f, 0.087155742747658638f,
0.069756473744125524f, 0.052335956242943807f, 0.034899496702500699f,
0.017452406437283439f, 0.000000000000000122f
};
/**
* @brief Floating-point sin_cos function.
* @param[in] theta input value in degrees
* @param[out] *pSinVal points to the processed sine output.
* @param[out] *pCosVal points to the processed cos output.
* @return none.
*/
void arm_sin_cos_f32(
float32_t theta,
float32_t * pSinVal,
float32_t * pCosVal)
{
uint32_t i; /* Index for reading nearwst output values */
float32_t x1 = -179.0f; /* Initial input value */
float32_t y0, y1; /* nearest output values */
float32_t fract; /* fractional part of input */
/* Calculation of fractional part */
if(theta > 0.0f)
{
fract = theta - (float32_t) ((int32_t) theta);
}
else
{
fract = (theta - (float32_t) ((int32_t) theta)) + 1.0f;
}
/* index calculation for reading nearest output values */
i = (uint32_t) (theta - x1);
/* reading nearest sine output values */
y0 = sinTable[i];
y1 = sinTable[i + 1u];
/* Calculation of sine value */
*pSinVal = y0 + (fract * (y1 - y0));
/* reading nearest cosine output values */
y0 = cosTable[i];
y1 = cosTable[i + 1u];
/* Calculation of cosine value */
*pCosVal = y0 + (fract * (y1 - y0));
}
/**
* @} end of SinCos group
*/

311
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c
View File

@@ -1,311 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_sin_cos_q31.c
*
* Description: Cosine & Sine calculation for Q31 values.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupController
*/
/**
* @addtogroup SinCos
* @{
*/
/**
* \par
* Sine Table is generated from following loop
* <pre>for(i = 0; i < 360; i++)
* {
* sinTable[i]= sin((i-180) * PI/180.0);
* } </pre>
* Convert above coefficients to fixed point 1.31 format.
*/
static const int32_t sinTableQ31[360] = {
0x0, 0xfdc41e9b, 0xfb8869ce, 0xf94d0e2e, 0xf7123849, 0xf4d814a4, 0xf29ecfb2,
0xf06695da,
0xee2f9369, 0xebf9f498, 0xe9c5e582, 0xe7939223, 0xe5632654, 0xe334cdc9,
0xe108b40d, 0xdedf047d,
0xdcb7ea46, 0xda939061, 0xd8722192, 0xd653c860, 0xd438af17, 0xd220ffc0,
0xd00ce422, 0xcdfc85bb,
0xcbf00dbe, 0xc9e7a512, 0xc7e3744b, 0xc5e3a3a9, 0xc3e85b18, 0xc1f1c224,
0xc0000000, 0xbe133b7c,
0xbc2b9b05, 0xba4944a2, 0xb86c5df0, 0xb6950c1e, 0xb4c373ee, 0xb2f7b9af,
0xb1320139, 0xaf726def,
0xadb922b7, 0xac0641fb, 0xaa59eda4, 0xa8b4471a, 0xa7156f3c, 0xa57d8666,
0xa3ecac65, 0xa263007d,
0xa0e0a15f, 0x9f65ad2d, 0x9df24175, 0x9c867b2c, 0x9b2276b0, 0x99c64fc5,
0x98722192, 0x9726069c,
0x95e218c9, 0x94a6715d, 0x937328f5, 0x92485786, 0x9126145f, 0x900c7621,
0x8efb92c2, 0x8df37f8b,
0x8cf45113, 0x8bfe1b3f, 0x8b10f144, 0x8a2ce59f, 0x89520a1a, 0x88806fc4,
0x87b826f7, 0x86f93f50,
0x8643c7b3, 0x8597ce46, 0x84f56073, 0x845c8ae3, 0x83cd5982, 0x8347d77b,
0x82cc0f36, 0x825a0a5b,
0x81f1d1ce, 0x81936daf, 0x813ee55b, 0x80f43f69, 0x80b381ac, 0x807cb130,
0x804fd23a, 0x802ce84c,
0x8013f61d, 0x8004fda0, 0x80000000, 0x8004fda0, 0x8013f61d, 0x802ce84c,
0x804fd23a, 0x807cb130,
0x80b381ac, 0x80f43f69, 0x813ee55b, 0x81936daf, 0x81f1d1ce, 0x825a0a5b,
0x82cc0f36, 0x8347d77b,
0x83cd5982, 0x845c8ae3, 0x84f56073, 0x8597ce46, 0x8643c7b3, 0x86f93f50,
0x87b826f7, 0x88806fc4,
0x89520a1a, 0x8a2ce59f, 0x8b10f144, 0x8bfe1b3f, 0x8cf45113, 0x8df37f8b,
0x8efb92c2, 0x900c7621,
0x9126145f, 0x92485786, 0x937328f5, 0x94a6715d, 0x95e218c9, 0x9726069c,
0x98722192, 0x99c64fc5,
0x9b2276b0, 0x9c867b2c, 0x9df24175, 0x9f65ad2d, 0xa0e0a15f, 0xa263007d,
0xa3ecac65, 0xa57d8666,
0xa7156f3c, 0xa8b4471a, 0xaa59eda4, 0xac0641fb, 0xadb922b7, 0xaf726def,
0xb1320139, 0xb2f7b9af,
0xb4c373ee, 0xb6950c1e, 0xb86c5df0, 0xba4944a2, 0xbc2b9b05, 0xbe133b7c,
0xc0000000, 0xc1f1c224,
0xc3e85b18, 0xc5e3a3a9, 0xc7e3744b, 0xc9e7a512, 0xcbf00dbe, 0xcdfc85bb,
0xd00ce422, 0xd220ffc0,
0xd438af17, 0xd653c860, 0xd8722192, 0xda939061, 0xdcb7ea46, 0xdedf047d,
0xe108b40d, 0xe334cdc9,
0xe5632654, 0xe7939223, 0xe9c5e582, 0xebf9f498, 0xee2f9369, 0xf06695da,
0xf29ecfb2, 0xf4d814a4,
0xf7123849, 0xf94d0e2e, 0xfb8869ce, 0xfdc41e9b, 0x0, 0x23be165, 0x4779632,
0x6b2f1d2,
0x8edc7b7, 0xb27eb5c, 0xd61304e, 0xf996a26, 0x11d06c97, 0x14060b68,
0x163a1a7e, 0x186c6ddd,
0x1a9cd9ac, 0x1ccb3237, 0x1ef74bf3, 0x2120fb83, 0x234815ba, 0x256c6f9f,
0x278dde6e, 0x29ac37a0,
0x2bc750e9, 0x2ddf0040, 0x2ff31bde, 0x32037a45, 0x340ff242, 0x36185aee,
0x381c8bb5, 0x3a1c5c57,
0x3c17a4e8, 0x3e0e3ddc, 0x40000000, 0x41ecc484, 0x43d464fb, 0x45b6bb5e,
0x4793a210, 0x496af3e2,
0x4b3c8c12, 0x4d084651, 0x4ecdfec7, 0x508d9211, 0x5246dd49, 0x53f9be05,
0x55a6125c, 0x574bb8e6,
0x58ea90c4, 0x5a82799a, 0x5c13539b, 0x5d9cff83, 0x5f1f5ea1, 0x609a52d3,
0x620dbe8b, 0x637984d4,
0x64dd8950, 0x6639b03b, 0x678dde6e, 0x68d9f964, 0x6a1de737, 0x6b598ea3,
0x6c8cd70b, 0x6db7a87a,
0x6ed9eba1, 0x6ff389df, 0x71046d3e, 0x720c8075, 0x730baeed, 0x7401e4c1,
0x74ef0ebc, 0x75d31a61,
0x76adf5e6, 0x777f903c, 0x7847d909, 0x7906c0b0, 0x79bc384d, 0x7a6831ba,
0x7b0a9f8d, 0x7ba3751d,
0x7c32a67e, 0x7cb82885, 0x7d33f0ca, 0x7da5f5a5, 0x7e0e2e32, 0x7e6c9251,
0x7ec11aa5, 0x7f0bc097,
0x7f4c7e54, 0x7f834ed0, 0x7fb02dc6, 0x7fd317b4, 0x7fec09e3, 0x7ffb0260,
0x7fffffff, 0x7ffb0260,
0x7fec09e3, 0x7fd317b4, 0x7fb02dc6, 0x7f834ed0, 0x7f4c7e54, 0x7f0bc097,
0x7ec11aa5, 0x7e6c9251,
0x7e0e2e32, 0x7da5f5a5, 0x7d33f0ca, 0x7cb82885, 0x7c32a67e, 0x7ba3751d,
0x7b0a9f8d, 0x7a6831ba,
0x79bc384d, 0x7906c0b0, 0x7847d909, 0x777f903c, 0x76adf5e6, 0x75d31a61,
0x74ef0ebc, 0x7401e4c1,
0x730baeed, 0x720c8075, 0x71046d3e, 0x6ff389df, 0x6ed9eba1, 0x6db7a87a,
0x6c8cd70b, 0x6b598ea3,
0x6a1de737, 0x68d9f964, 0x678dde6e, 0x6639b03b, 0x64dd8950, 0x637984d4,
0x620dbe8b, 0x609a52d3,
0x5f1f5ea1, 0x5d9cff83, 0x5c13539b, 0x5a82799a, 0x58ea90c4, 0x574bb8e6,
0x55a6125c, 0x53f9be05,
0x5246dd49, 0x508d9211, 0x4ecdfec7, 0x4d084651, 0x4b3c8c12, 0x496af3e2,
0x4793a210, 0x45b6bb5e,
0x43d464fb, 0x41ecc484, 0x40000000, 0x3e0e3ddc, 0x3c17a4e8, 0x3a1c5c57,
0x381c8bb5, 0x36185aee,
0x340ff242, 0x32037a45, 0x2ff31bde, 0x2ddf0040, 0x2bc750e9, 0x29ac37a0,
0x278dde6e, 0x256c6f9f,
0x234815ba, 0x2120fb83, 0x1ef74bf3, 0x1ccb3237, 0x1a9cd9ac, 0x186c6ddd,
0x163a1a7e, 0x14060b68,
0x11d06c97, 0xf996a26, 0xd61304e, 0xb27eb5c, 0x8edc7b7, 0x6b2f1d2,
0x4779632, 0x23be165,
};
/**
* \par
* Cosine Table is generated from following loop
* <pre>for(i = 0; i < 360; i++)
* {
* cosTable[i]= cos((i-180) * PI/180.0);
* } </pre>
* \par
* Convert above coefficients to fixed point 1.31 format.
*/
static const int32_t cosTableQ31[360] = {
0x80000000, 0x8004fda0, 0x8013f61d, 0x802ce84c, 0x804fd23a, 0x807cb130,
0x80b381ac, 0x80f43f69,
0x813ee55b, 0x81936daf, 0x81f1d1ce, 0x825a0a5b, 0x82cc0f36, 0x8347d77b,
0x83cd5982, 0x845c8ae3,
0x84f56073, 0x8597ce46, 0x8643c7b3, 0x86f93f50, 0x87b826f7, 0x88806fc4,
0x89520a1a, 0x8a2ce59f,
0x8b10f144, 0x8bfe1b3f, 0x8cf45113, 0x8df37f8b, 0x8efb92c2, 0x900c7621,
0x9126145f, 0x92485786,
0x937328f5, 0x94a6715d, 0x95e218c9, 0x9726069c, 0x98722192, 0x99c64fc5,
0x9b2276b0, 0x9c867b2c,
0x9df24175, 0x9f65ad2d, 0xa0e0a15f, 0xa263007d, 0xa3ecac65, 0xa57d8666,
0xa7156f3c, 0xa8b4471a,
0xaa59eda4, 0xac0641fb, 0xadb922b7, 0xaf726def, 0xb1320139, 0xb2f7b9af,
0xb4c373ee, 0xb6950c1e,
0xb86c5df0, 0xba4944a2, 0xbc2b9b05, 0xbe133b7c, 0xc0000000, 0xc1f1c224,
0xc3e85b18, 0xc5e3a3a9,
0xc7e3744b, 0xc9e7a512, 0xcbf00dbe, 0xcdfc85bb, 0xd00ce422, 0xd220ffc0,
0xd438af17, 0xd653c860,
0xd8722192, 0xda939061, 0xdcb7ea46, 0xdedf047d, 0xe108b40d, 0xe334cdc9,
0xe5632654, 0xe7939223,
0xe9c5e582, 0xebf9f498, 0xee2f9369, 0xf06695da, 0xf29ecfb2, 0xf4d814a4,
0xf7123849, 0xf94d0e2e,
0xfb8869ce, 0xfdc41e9b, 0x0, 0x23be165, 0x4779632, 0x6b2f1d2, 0x8edc7b7,
0xb27eb5c,
0xd61304e, 0xf996a26, 0x11d06c97, 0x14060b68, 0x163a1a7e, 0x186c6ddd,
0x1a9cd9ac, 0x1ccb3237,
0x1ef74bf3, 0x2120fb83, 0x234815ba, 0x256c6f9f, 0x278dde6e, 0x29ac37a0,
0x2bc750e9, 0x2ddf0040,
0x2ff31bde, 0x32037a45, 0x340ff242, 0x36185aee, 0x381c8bb5, 0x3a1c5c57,
0x3c17a4e8, 0x3e0e3ddc,
0x40000000, 0x41ecc484, 0x43d464fb, 0x45b6bb5e, 0x4793a210, 0x496af3e2,
0x4b3c8c12, 0x4d084651,
0x4ecdfec7, 0x508d9211, 0x5246dd49, 0x53f9be05, 0x55a6125c, 0x574bb8e6,
0x58ea90c4, 0x5a82799a,
0x5c13539b, 0x5d9cff83, 0x5f1f5ea1, 0x609a52d3, 0x620dbe8b, 0x637984d4,
0x64dd8950, 0x6639b03b,
0x678dde6e, 0x68d9f964, 0x6a1de737, 0x6b598ea3, 0x6c8cd70b, 0x6db7a87a,
0x6ed9eba1, 0x6ff389df,
0x71046d3e, 0x720c8075, 0x730baeed, 0x7401e4c1, 0x74ef0ebc, 0x75d31a61,
0x76adf5e6, 0x777f903c,
0x7847d909, 0x7906c0b0, 0x79bc384d, 0x7a6831ba, 0x7b0a9f8d, 0x7ba3751d,
0x7c32a67e, 0x7cb82885,
0x7d33f0ca, 0x7da5f5a5, 0x7e0e2e32, 0x7e6c9251, 0x7ec11aa5, 0x7f0bc097,
0x7f4c7e54, 0x7f834ed0,
0x7fb02dc6, 0x7fd317b4, 0x7fec09e3, 0x7ffb0260, 0x7fffffff, 0x7ffb0260,
0x7fec09e3, 0x7fd317b4,
0x7fb02dc6, 0x7f834ed0, 0x7f4c7e54, 0x7f0bc097, 0x7ec11aa5, 0x7e6c9251,
0x7e0e2e32, 0x7da5f5a5,
0x7d33f0ca, 0x7cb82885, 0x7c32a67e, 0x7ba3751d, 0x7b0a9f8d, 0x7a6831ba,
0x79bc384d, 0x7906c0b0,
0x7847d909, 0x777f903c, 0x76adf5e6, 0x75d31a61, 0x74ef0ebc, 0x7401e4c1,
0x730baeed, 0x720c8075,
0x71046d3e, 0x6ff389df, 0x6ed9eba1, 0x6db7a87a, 0x6c8cd70b, 0x6b598ea3,
0x6a1de737, 0x68d9f964,
0x678dde6e, 0x6639b03b, 0x64dd8950, 0x637984d4, 0x620dbe8b, 0x609a52d3,
0x5f1f5ea1, 0x5d9cff83,
0x5c13539b, 0x5a82799a, 0x58ea90c4, 0x574bb8e6, 0x55a6125c, 0x53f9be05,
0x5246dd49, 0x508d9211,
0x4ecdfec7, 0x4d084651, 0x4b3c8c12, 0x496af3e2, 0x4793a210, 0x45b6bb5e,
0x43d464fb, 0x41ecc484,
0x40000000, 0x3e0e3ddc, 0x3c17a4e8, 0x3a1c5c57, 0x381c8bb5, 0x36185aee,
0x340ff242, 0x32037a45,
0x2ff31bde, 0x2ddf0040, 0x2bc750e9, 0x29ac37a0, 0x278dde6e, 0x256c6f9f,
0x234815ba, 0x2120fb83,
0x1ef74bf3, 0x1ccb3237, 0x1a9cd9ac, 0x186c6ddd, 0x163a1a7e, 0x14060b68,
0x11d06c97, 0xf996a26,
0xd61304e, 0xb27eb5c, 0x8edc7b7, 0x6b2f1d2, 0x4779632, 0x23be165, 0x0,
0xfdc41e9b,
0xfb8869ce, 0xf94d0e2e, 0xf7123849, 0xf4d814a4, 0xf29ecfb2, 0xf06695da,
0xee2f9369, 0xebf9f498,
0xe9c5e582, 0xe7939223, 0xe5632654, 0xe334cdc9, 0xe108b40d, 0xdedf047d,
0xdcb7ea46, 0xda939061,
0xd8722192, 0xd653c860, 0xd438af17, 0xd220ffc0, 0xd00ce422, 0xcdfc85bb,
0xcbf00dbe, 0xc9e7a512,
0xc7e3744b, 0xc5e3a3a9, 0xc3e85b18, 0xc1f1c224, 0xc0000000, 0xbe133b7c,
0xbc2b9b05, 0xba4944a2,
0xb86c5df0, 0xb6950c1e, 0xb4c373ee, 0xb2f7b9af, 0xb1320139, 0xaf726def,
0xadb922b7, 0xac0641fb,
0xaa59eda4, 0xa8b4471a, 0xa7156f3c, 0xa57d8666, 0xa3ecac65, 0xa263007d,
0xa0e0a15f, 0x9f65ad2d,
0x9df24175, 0x9c867b2c, 0x9b2276b0, 0x99c64fc5, 0x98722192, 0x9726069c,
0x95e218c9, 0x94a6715d,
0x937328f5, 0x92485786, 0x9126145f, 0x900c7621, 0x8efb92c2, 0x8df37f8b,
0x8cf45113, 0x8bfe1b3f,
0x8b10f144, 0x8a2ce59f, 0x89520a1a, 0x88806fc4, 0x87b826f7, 0x86f93f50,
0x8643c7b3, 0x8597ce46,
0x84f56073, 0x845c8ae3, 0x83cd5982, 0x8347d77b, 0x82cc0f36, 0x825a0a5b,
0x81f1d1ce, 0x81936daf,
0x813ee55b, 0x80f43f69, 0x80b381ac, 0x807cb130, 0x804fd23a, 0x802ce84c,
0x8013f61d, 0x8004fda0,
};
/**
* @brief Q31 sin_cos function.
* @param[in] theta scaled input value in degrees
* @param[out] *pSinVal points to the processed sine output.
* @param[out] *pCosVal points to the processed cosine output.
* @return none.
*
* The Q31 input value is in the range [-1 +1) and is mapped to a degree value in the range [-180 180).
*
*/
void arm_sin_cos_q31(
q31_t theta,
q31_t * pSinVal,
q31_t * pCosVal)
{
q31_t x0; /* Nearest input value */
q31_t y0, y1; /* Nearest output values */
q31_t xSpacing = INPUT_SPACING; /* Spaing between inputs */
uint32_t i; /* Index */
q31_t oneByXSpacing; /* 1/ xSpacing value */
q31_t out; /* temporary variable */
uint32_t sign_bits; /* No.of sign bits */
uint32_t firstX = 0x80000000; /* First X value */
/* Calculation of index */
i = ((uint32_t) theta - firstX) / (uint32_t) xSpacing;
/* Calculation of first nearest input value */
x0 = (q31_t) firstX + ((q31_t) i * xSpacing);
/* Reading nearest sine output values from table */
y0 = sinTableQ31[i];
y1 = sinTableQ31[i + 1u];
/* Calculation of 1/(x1-x0) */
/* (x1-x0) is xSpacing which is fixed value */
sign_bits = 8u;
oneByXSpacing = 0x5A000000;
/* Calculation of (theta - x0)/(x1-x0) */
out =
(((q31_t) (((q63_t) (theta - x0) * oneByXSpacing) >> 32)) << sign_bits);
/* Calculation of y0 + (y1 - y0) * ((theta - x0)/(x1-x0)) */
*pSinVal = y0 + ((q31_t) (((q63_t) (y1 - y0) * out) >> 30));
/* Reading nearest cosine output values from table */
y0 = cosTableQ31[i];
y1 = cosTableQ31[i + 1u];
/* Calculation of y0 + (y1 - y0) * ((theta - x0)/(x1-x0)) */
*pCosVal = y0 + ((q31_t) (((q63_t) (y1 - y0) * out) >> 30));
}
/**
* @} end of SinCos group
*/

254
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c
View File

@@ -1,254 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cos_f32.c
*
* Description: Fast cosine calculation for floating-point values.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupFastMath
*/
/**
* @defgroup cos Cosine
*
* Computes the trigonometric cosine function using a combination of table lookup
* and cubic interpolation. There are separate functions for
* Q15, Q31, and floating-point data types.
* The input to the floating-point version is in radians while the
* fixed-point Q15 and Q31 have a scaled input with the range
* [0 1) mapping to [0 2*pi).
*
* The implementation is based on table lookup using 256 values together with cubic interpolation.
* The steps used are:
* -# Calculation of the nearest integer table index
* -# Fetch the four table values a, b, c, and d
* -# Compute the fractional portion (fract) of the table index.
* -# Calculation of wa, wb, wc, wd
* -# The final result equals <code>a*wa + b*wb + c*wc + d*wd</code>
*
* where
* <pre>
* a=Table[index-1];
* b=Table[index+0];
* c=Table[index+1];
* d=Table[index+2];
* </pre>
* and
* <pre>
* wa=-(1/6)*fract.^3 + (1/2)*fract.^2 - (1/3)*fract;
* wb=(1/2)*fract.^3 - fract.^2 - (1/2)*fract + 1;
* wc=-(1/2)*fract.^3+(1/2)*fract.^2+fract;
* wd=(1/6)*fract.^3 - (1/6)*fract;
* </pre>
*/
/**
* @addtogroup cos
* @{
*/
/**
* \par
* <b>Example code for Generation of Cos Table:</b>
* tableSize = 256;
* <pre>for(n = -1; n < (tableSize + 1); n++)
* {
* cosTable[n+1]= cos(2*pi*n/tableSize);
* } </pre>
* where pi value is 3.14159265358979
*/
static const float32_t cosTable[259] = {
0.999698817729949950f, 1.000000000000000000f, 0.999698817729949950f,
0.998795449733734130f, 0.997290432453155520f, 0.995184719562530520f,
0.992479562759399410f, 0.989176511764526370f,
0.985277652740478520f, 0.980785250663757320f, 0.975702106952667240f,
0.970031261444091800f, 0.963776051998138430f, 0.956940352916717530f,
0.949528157711029050f, 0.941544055938720700f,
0.932992815971374510f, 0.923879504203796390f, 0.914209783077239990f,
0.903989315032958980f, 0.893224298954010010f, 0.881921291351318360f,
0.870086967945098880f, 0.857728600502014160f,
0.844853579998016360f, 0.831469595432281490f, 0.817584812641143800f,
0.803207516670227050f, 0.788346409797668460f, 0.773010432720184330f,
0.757208824157714840f, 0.740951120853424070f,
0.724247097969055180f, 0.707106769084930420f, 0.689540565013885500f,
0.671558976173400880f, 0.653172850608825680f, 0.634393274784088130f,
0.615231573581695560f, 0.595699310302734380f,
0.575808167457580570f, 0.555570244789123540f, 0.534997642040252690f,
0.514102756977081300f, 0.492898195981979370f, 0.471396744251251220f,
0.449611335992813110f, 0.427555084228515630f,
0.405241310596466060f, 0.382683426141738890f, 0.359895050525665280f,
0.336889863014221190f, 0.313681751489639280f, 0.290284663438797000f,
0.266712754964828490f, 0.242980182170867920f,
0.219101235270500180f, 0.195090323686599730f, 0.170961886644363400f,
0.146730467677116390f, 0.122410677373409270f, 0.098017141222953796f,
0.073564566671848297f, 0.049067676067352295f,
0.024541229009628296f, 0.000000000000000061f, -0.024541229009628296f,
-0.049067676067352295f, -0.073564566671848297f, -0.098017141222953796f,
-0.122410677373409270f, -0.146730467677116390f,
-0.170961886644363400f, -0.195090323686599730f, -0.219101235270500180f,
-0.242980182170867920f, -0.266712754964828490f, -0.290284663438797000f,
-0.313681751489639280f, -0.336889863014221190f,
-0.359895050525665280f, -0.382683426141738890f, -0.405241310596466060f,
-0.427555084228515630f, -0.449611335992813110f, -0.471396744251251220f,
-0.492898195981979370f, -0.514102756977081300f,
-0.534997642040252690f, -0.555570244789123540f, -0.575808167457580570f,
-0.595699310302734380f, -0.615231573581695560f, -0.634393274784088130f,
-0.653172850608825680f, -0.671558976173400880f,
-0.689540565013885500f, -0.707106769084930420f, -0.724247097969055180f,
-0.740951120853424070f, -0.757208824157714840f, -0.773010432720184330f,
-0.788346409797668460f, -0.803207516670227050f,
-0.817584812641143800f, -0.831469595432281490f, -0.844853579998016360f,
-0.857728600502014160f, -0.870086967945098880f, -0.881921291351318360f,
-0.893224298954010010f, -0.903989315032958980f,
-0.914209783077239990f, -0.923879504203796390f, -0.932992815971374510f,
-0.941544055938720700f, -0.949528157711029050f, -0.956940352916717530f,
-0.963776051998138430f, -0.970031261444091800f,
-0.975702106952667240f, -0.980785250663757320f, -0.985277652740478520f,
-0.989176511764526370f, -0.992479562759399410f, -0.995184719562530520f,
-0.997290432453155520f, -0.998795449733734130f,
-0.999698817729949950f, -1.000000000000000000f, -0.999698817729949950f,
-0.998795449733734130f, -0.997290432453155520f, -0.995184719562530520f,
-0.992479562759399410f, -0.989176511764526370f,
-0.985277652740478520f, -0.980785250663757320f, -0.975702106952667240f,
-0.970031261444091800f, -0.963776051998138430f, -0.956940352916717530f,
-0.949528157711029050f, -0.941544055938720700f,
-0.932992815971374510f, -0.923879504203796390f, -0.914209783077239990f,
-0.903989315032958980f, -0.893224298954010010f, -0.881921291351318360f,
-0.870086967945098880f, -0.857728600502014160f,
-0.844853579998016360f, -0.831469595432281490f, -0.817584812641143800f,
-0.803207516670227050f, -0.788346409797668460f, -0.773010432720184330f,
-0.757208824157714840f, -0.740951120853424070f,
-0.724247097969055180f, -0.707106769084930420f, -0.689540565013885500f,
-0.671558976173400880f, -0.653172850608825680f, -0.634393274784088130f,
-0.615231573581695560f, -0.595699310302734380f,
-0.575808167457580570f, -0.555570244789123540f, -0.534997642040252690f,
-0.514102756977081300f, -0.492898195981979370f, -0.471396744251251220f,
-0.449611335992813110f, -0.427555084228515630f,
-0.405241310596466060f, -0.382683426141738890f, -0.359895050525665280f,
-0.336889863014221190f, -0.313681751489639280f, -0.290284663438797000f,
-0.266712754964828490f, -0.242980182170867920f,
-0.219101235270500180f, -0.195090323686599730f, -0.170961886644363400f,
-0.146730467677116390f, -0.122410677373409270f, -0.098017141222953796f,
-0.073564566671848297f, -0.049067676067352295f,
-0.024541229009628296f, -0.000000000000000184f, 0.024541229009628296f,
0.049067676067352295f, 0.073564566671848297f, 0.098017141222953796f,
0.122410677373409270f, 0.146730467677116390f,
0.170961886644363400f, 0.195090323686599730f, 0.219101235270500180f,
0.242980182170867920f, 0.266712754964828490f, 0.290284663438797000f,
0.313681751489639280f, 0.336889863014221190f,
0.359895050525665280f, 0.382683426141738890f, 0.405241310596466060f,
0.427555084228515630f, 0.449611335992813110f, 0.471396744251251220f,
0.492898195981979370f, 0.514102756977081300f,
0.534997642040252690f, 0.555570244789123540f, 0.575808167457580570f,
0.595699310302734380f, 0.615231573581695560f, 0.634393274784088130f,
0.653172850608825680f, 0.671558976173400880f,
0.689540565013885500f, 0.707106769084930420f, 0.724247097969055180f,
0.740951120853424070f, 0.757208824157714840f, 0.773010432720184330f,
0.788346409797668460f, 0.803207516670227050f,
0.817584812641143800f, 0.831469595432281490f, 0.844853579998016360f,
0.857728600502014160f, 0.870086967945098880f, 0.881921291351318360f,
0.893224298954010010f, 0.903989315032958980f,
0.914209783077239990f, 0.923879504203796390f, 0.932992815971374510f,
0.941544055938720700f, 0.949528157711029050f, 0.956940352916717530f,
0.963776051998138430f, 0.970031261444091800f,
0.975702106952667240f, 0.980785250663757320f, 0.985277652740478520f,
0.989176511764526370f, 0.992479562759399410f, 0.995184719562530520f,
0.997290432453155520f, 0.998795449733734130f,
0.999698817729949950f, 1.000000000000000000f, 0.999698817729949950f
};
/**
* @brief Fast approximation to the trigonometric cosine function for floating-point data.
* @param[in] x input value in radians.
* @return cos(x).
*/
float32_t arm_cos_f32(
float32_t x)
{
float32_t cosVal, fract, in;
uint32_t index;
uint32_t tableSize = (uint32_t) TABLE_SIZE;
float32_t wa, wb, wc, wd;
float32_t a, b, c, d;
float32_t *tablePtr;
int32_t n;
/* input x is in radians */
/* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi */
in = x * 0.159154943092f;
/* Calculation of floor value of input */
n = (int32_t) in;
/* Make negative values towards -infinity */
if(x < 0.0f)
{
n = n - 1;
}
/* Map input value to [0 1] */
in = in - (float32_t) n;
/* Calculation of index of the table */
index = (uint32_t) (tableSize * in);
/* fractional value calculation */
fract = ((float32_t) tableSize * in) - (float32_t) index;
/* Initialise table pointer */
tablePtr = (float32_t *) & cosTable[index];
/* Read four nearest values of input value from the cos table */
a = *tablePtr++;
b = *tablePtr++;
c = *tablePtr++;
d = *tablePtr++;
/* Cubic interpolation process */
wa = -(((0.166666667f) * fract) * (fract * fract)) +
(((0.5f) * (fract * fract)) - ((0.3333333333333f) * fract));
wb = ((((0.5f) * fract) * (fract * fract)) - (fract * fract)) +
(-((0.5f) * fract) + 1.0f);
wc = -(((0.5f) * fract) * (fract * fract)) +
(((0.5f) * (fract * fract)) + fract);
wd = (((0.166666667f) * fract) * (fract * fract)) -
((0.166666667f) * fract);
/* Calculate cos value */
cosVal = ((a * wa) + (b * wb)) + ((c * wc) + (d * wd));
/* Return the output value */
return (cosVal);
}
/**
* @} end of cos group
*/

189
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c
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@@ -1,189 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cos_q15.c
*
* Description: Fast cosine calculation for Q15 values.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupFastMath
*/
/**
* @addtogroup cos
* @{
*/
/**
* \par
* Table Values are in Q15(1.15 Fixed point format) and generation is done in three steps
* \par
* First Generate cos values in floating point:
* tableSize = 256;
* <pre>for(n = -1; n < (tableSize + 1); n++)
* {
* cosTable[n+1]= cos(2*pi*n/tableSize);
* }</pre>
* where pi value is 3.14159265358979
* \par
* Secondly Convert Floating point to Q15(Fixed point):
* (cosTable[i] * pow(2, 15))
* \par
* Finally Rounding to nearest integer is done
* cosTable[i] += (cosTable[i] > 0 ? 0.5 :-0.5);
*/
static const q15_t cosTableQ15[259] = {
0x7ff6, 0x7fff, 0x7ff6, 0x7fd9, 0x7fa7, 0x7f62, 0x7f0a, 0x7e9d,
0x7e1e, 0x7d8a, 0x7ce4, 0x7c2a, 0x7b5d, 0x7a7d, 0x798a, 0x7885,
0x776c, 0x7642, 0x7505, 0x73b6, 0x7255, 0x70e3, 0x6f5f, 0x6dca,
0x6c24, 0x6a6e, 0x68a7, 0x66d0, 0x64e9, 0x62f2, 0x60ec, 0x5ed7,
0x5cb4, 0x5a82, 0x5843, 0x55f6, 0x539b, 0x5134, 0x4ec0, 0x4c40,
0x49b4, 0x471d, 0x447b, 0x41ce, 0x3f17, 0x3c57, 0x398d, 0x36ba,
0x33df, 0x30fc, 0x2e11, 0x2b1f, 0x2827, 0x2528, 0x2224, 0x1f1a,
0x1c0c, 0x18f9, 0x15e2, 0x12c8, 0xfab, 0xc8c, 0x96b, 0x648,
0x324, 0x0, 0xfcdc, 0xf9b8, 0xf695, 0xf374, 0xf055, 0xed38,
0xea1e, 0xe707, 0xe3f4, 0xe0e6, 0xdddc, 0xdad8, 0xd7d9, 0xd4e1,
0xd1ef, 0xcf04, 0xcc21, 0xc946, 0xc673, 0xc3a9, 0xc0e9, 0xbe32,
0xbb85, 0xb8e3, 0xb64c, 0xb3c0, 0xb140, 0xaecc, 0xac65, 0xaa0a,
0xa7bd, 0xa57e, 0xa34c, 0xa129, 0x9f14, 0x9d0e, 0x9b17, 0x9930,
0x9759, 0x9592, 0x93dc, 0x9236, 0x90a1, 0x8f1d, 0x8dab, 0x8c4a,
0x8afb, 0x89be, 0x8894, 0x877b, 0x8676, 0x8583, 0x84a3, 0x83d6,
0x831c, 0x8276, 0x81e2, 0x8163, 0x80f6, 0x809e, 0x8059, 0x8027,
0x800a, 0x8000, 0x800a, 0x8027, 0x8059, 0x809e, 0x80f6, 0x8163,
0x81e2, 0x8276, 0x831c, 0x83d6, 0x84a3, 0x8583, 0x8676, 0x877b,
0x8894, 0x89be, 0x8afb, 0x8c4a, 0x8dab, 0x8f1d, 0x90a1, 0x9236,
0x93dc, 0x9592, 0x9759, 0x9930, 0x9b17, 0x9d0e, 0x9f14, 0xa129,
0xa34c, 0xa57e, 0xa7bd, 0xaa0a, 0xac65, 0xaecc, 0xb140, 0xb3c0,
0xb64c, 0xb8e3, 0xbb85, 0xbe32, 0xc0e9, 0xc3a9, 0xc673, 0xc946,
0xcc21, 0xcf04, 0xd1ef, 0xd4e1, 0xd7d9, 0xdad8, 0xdddc, 0xe0e6,
0xe3f4, 0xe707, 0xea1e, 0xed38, 0xf055, 0xf374, 0xf695, 0xf9b8,
0xfcdc, 0x0, 0x324, 0x648, 0x96b, 0xc8c, 0xfab, 0x12c8,
0x15e2, 0x18f9, 0x1c0c, 0x1f1a, 0x2224, 0x2528, 0x2827, 0x2b1f,
0x2e11, 0x30fc, 0x33df, 0x36ba, 0x398d, 0x3c57, 0x3f17, 0x41ce,
0x447b, 0x471d, 0x49b4, 0x4c40, 0x4ec0, 0x5134, 0x539b, 0x55f6,
0x5843, 0x5a82, 0x5cb4, 0x5ed7, 0x60ec, 0x62f2, 0x64e9, 0x66d0,
0x68a7, 0x6a6e, 0x6c24, 0x6dca, 0x6f5f, 0x70e3, 0x7255, 0x73b6,
0x7505, 0x7642, 0x776c, 0x7885, 0x798a, 0x7a7d, 0x7b5d, 0x7c2a,
0x7ce4, 0x7d8a, 0x7e1e, 0x7e9d, 0x7f0a, 0x7f62, 0x7fa7, 0x7fd9,
0x7ff6, 0x7fff, 0x7ff6
};
/**
* @brief Fast approximation to the trigonometric cosine function for Q15 data.
* @param[in] x Scaled input value in radians.
* @return cos(x).
*
* The Q15 input value is in the range [0 +1) and is mapped to a radian value in the range [0 2*pi).
*/
q15_t arm_cos_q15(
q15_t x)
{
q31_t cosVal; /* Temporary variable for output */
q15_t *tablePtr; /* Pointer to table */
q15_t in, in2; /* Temporary variables for input */
q31_t wa, wb, wc, wd; /* Cubic interpolation coefficients */
q15_t a, b, c, d; /* Four nearest output values */
q15_t fract, fractCube, fractSquare; /* Variables for fractional value */
q15_t oneBy6 = 0x1555; /* Fixed point value of 1/6 */
q15_t tableSpacing = TABLE_SPACING_Q15; /* Table spacing */
int32_t index; /* Index variable */
in = x;
/* Calculate the nearest index */
index = (int32_t) in / tableSpacing;
/* Calculate the nearest value of input */
in2 = (q15_t) index *tableSpacing;
/* Calculation of fractional value */
fract = (in - in2) << 8;
/* fractSquare = fract * fract */
fractSquare = (q15_t) ((fract * fract) >> 15);
/* fractCube = fract * fract * fract */
fractCube = (q15_t) ((fractSquare * fract) >> 15);
/* Initialise table pointer */
tablePtr = (q15_t *) & cosTableQ15[index];
/* Cubic interpolation process */
/* Calculation of wa */
/* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAA)*fract; */
wa = (q31_t) oneBy6 *fractCube;
wa += (q31_t) 0x2AAA *fract;
wa = -(wa >> 15);
wa += (fractSquare >> 1u);
/* Read first nearest value of output from the cos table */
a = *tablePtr++;
/* cosVal = a * wa */
cosVal = a * wa;
/* Calculation of wb */
wb = (((fractCube >> 1u) - fractSquare) - (fract >> 1u)) + 0x7FFF;
/* Read second nearest value of output from the cos table */
b = *tablePtr++;
/* cosVal += b*wb */
cosVal += b * wb;
/* Calculation of wc */
wc = -(q31_t) fractCube + fractSquare;
wc = (wc >> 1u) + fract;
/* Read third nearest value of output from the cos table */
c = *tablePtr++;
/* cosVal += c*wc */
cosVal += c * wc;
/* Calculation of wd */
/* wd = (oneBy6)*fractCube - (oneBy6)*fract; */
fractCube = fractCube - fract;
wd = ((q15_t) (((q31_t) oneBy6 * fractCube) >> 15));
/* Read fourth nearest value of output from the cos table */
d = *tablePtr++;
/* cosVal += d*wd; */
cosVal += d * wd;
/* Return the output value in 1.15(q15) format */
return ((q15_t) (cosVal >> 15u));
}
/**
* @} end of cos group
*/

225
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c
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@@ -1,225 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_cos_q31.c
*
* Description: Fast cosine calculation for Q31 values.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupFastMath
*/
/**
* @addtogroup cos
* @{
*/
/**
* \par
* Table Values are in Q31(1.31 Fixed point format) and generation is done in three steps
* First Generate cos values in floating point:
* tableSize = 256;
* <pre>for(n = -1; n < (tableSize + 1); n++)
* {
* cosTable[n+1]= cos(2*pi*n/tableSize);
* } </pre>
* where pi value is 3.14159265358979
* \par
* Secondly Convert Floating point to Q31(Fixed point):
* (cosTable[i] * pow(2, 31))
* \par
* Finally Rounding to nearest integer is done
* cosTable[i] += (cosTable[i] > 0 ? 0.5 :-0.5);
*/
static const q31_t cosTableQ31[259] = {
0x7ff62182, 0x7fffffff, 0x7ff62182, 0x7fd8878e, 0x7fa736b4, 0x7f62368f,
0x7f0991c4, 0x7e9d55fc,
0x7e1d93ea, 0x7d8a5f40, 0x7ce3ceb2, 0x7c29fbee, 0x7b5d039e, 0x7a7d055b,
0x798a23b1, 0x78848414,
0x776c4edb, 0x7641af3d, 0x7504d345, 0x73b5ebd1, 0x72552c85, 0x70e2cbc6,
0x6f5f02b2, 0x6dca0d14,
0x6c242960, 0x6a6d98a4, 0x68a69e81, 0x66cf8120, 0x64e88926, 0x62f201ac,
0x60ec3830, 0x5ed77c8a,
0x5cb420e0, 0x5a82799a, 0x5842dd54, 0x55f5a4d2, 0x539b2af0, 0x5133cc94,
0x4ebfe8a5, 0x4c3fdff4,
0x49b41533, 0x471cece7, 0x447acd50, 0x41ce1e65, 0x3f1749b8, 0x3c56ba70,
0x398cdd32, 0x36ba2014,
0x33def287, 0x30fbc54d, 0x2e110a62, 0x2b1f34eb, 0x2826b928, 0x25280c5e,
0x2223a4c5, 0x1f19f97b,
0x1c0b826a, 0x18f8b83c, 0x15e21445, 0x12c8106f, 0xfab272b, 0xc8bd35e,
0x96a9049, 0x647d97c,
0x3242abf, 0x0, 0xfcdbd541, 0xf9b82684, 0xf6956fb7, 0xf3742ca2, 0xf054d8d5,
0xed37ef91,
0xea1debbb, 0xe70747c4, 0xe3f47d96, 0xe0e60685, 0xdddc5b3b, 0xdad7f3a2,
0xd7d946d8, 0xd4e0cb15,
0xd1eef59e, 0xcf043ab3, 0xcc210d79, 0xc945dfec, 0xc67322ce, 0xc3a94590,
0xc0e8b648, 0xbe31e19b,
0xbb8532b0, 0xb8e31319, 0xb64beacd, 0xb3c0200c, 0xb140175b, 0xaecc336c,
0xac64d510, 0xaa0a5b2e,
0xa7bd22ac, 0xa57d8666, 0xa34bdf20, 0xa1288376, 0x9f13c7d0, 0x9d0dfe54,
0x9b1776da, 0x99307ee0,
0x9759617f, 0x9592675c, 0x93dbd6a0, 0x9235f2ec, 0x90a0fd4e, 0x8f1d343a,
0x8daad37b, 0x8c4a142f,
0x8afb2cbb, 0x89be50c3, 0x8893b125, 0x877b7bec, 0x8675dc4f, 0x8582faa5,
0x84a2fc62, 0x83d60412,
0x831c314e, 0x8275a0c0, 0x81e26c16, 0x8162aa04, 0x80f66e3c, 0x809dc971,
0x8058c94c, 0x80277872,
0x8009de7e, 0x80000000, 0x8009de7e, 0x80277872, 0x8058c94c, 0x809dc971,
0x80f66e3c, 0x8162aa04,
0x81e26c16, 0x8275a0c0, 0x831c314e, 0x83d60412, 0x84a2fc62, 0x8582faa5,
0x8675dc4f, 0x877b7bec,
0x8893b125, 0x89be50c3, 0x8afb2cbb, 0x8c4a142f, 0x8daad37b, 0x8f1d343a,
0x90a0fd4e, 0x9235f2ec,
0x93dbd6a0, 0x9592675c, 0x9759617f, 0x99307ee0, 0x9b1776da, 0x9d0dfe54,
0x9f13c7d0, 0xa1288376,
0xa34bdf20, 0xa57d8666, 0xa7bd22ac, 0xaa0a5b2e, 0xac64d510, 0xaecc336c,
0xb140175b, 0xb3c0200c,
0xb64beacd, 0xb8e31319, 0xbb8532b0, 0xbe31e19b, 0xc0e8b648, 0xc3a94590,
0xc67322ce, 0xc945dfec,
0xcc210d79, 0xcf043ab3, 0xd1eef59e, 0xd4e0cb15, 0xd7d946d8, 0xdad7f3a2,
0xdddc5b3b, 0xe0e60685,
0xe3f47d96, 0xe70747c4, 0xea1debbb, 0xed37ef91, 0xf054d8d5, 0xf3742ca2,
0xf6956fb7, 0xf9b82684,
0xfcdbd541, 0x0, 0x3242abf, 0x647d97c, 0x96a9049, 0xc8bd35e, 0xfab272b,
0x12c8106f,
0x15e21445, 0x18f8b83c, 0x1c0b826a, 0x1f19f97b, 0x2223a4c5, 0x25280c5e,
0x2826b928, 0x2b1f34eb,
0x2e110a62, 0x30fbc54d, 0x33def287, 0x36ba2014, 0x398cdd32, 0x3c56ba70,
0x3f1749b8, 0x41ce1e65,
0x447acd50, 0x471cece7, 0x49b41533, 0x4c3fdff4, 0x4ebfe8a5, 0x5133cc94,
0x539b2af0, 0x55f5a4d2,
0x5842dd54, 0x5a82799a, 0x5cb420e0, 0x5ed77c8a, 0x60ec3830, 0x62f201ac,
0x64e88926, 0x66cf8120,
0x68a69e81, 0x6a6d98a4, 0x6c242960, 0x6dca0d14, 0x6f5f02b2, 0x70e2cbc6,
0x72552c85, 0x73b5ebd1,
0x7504d345, 0x7641af3d, 0x776c4edb, 0x78848414, 0x798a23b1, 0x7a7d055b,
0x7b5d039e, 0x7c29fbee,
0x7ce3ceb2, 0x7d8a5f40, 0x7e1d93ea, 0x7e9d55fc, 0x7f0991c4, 0x7f62368f,
0x7fa736b4, 0x7fd8878e,
0x7ff62182, 0x7fffffff, 0x7ff62182
};
/**
* @brief Fast approximation to the trigonometric cosine function for Q31 data.
* @param[in] x Scaled input value in radians.
* @return cos(x).
*
* The Q31 input value is in the range [0 +1) and is mapped to a radian value in the range [0 2*pi).
*/
q31_t arm_cos_q31(
q31_t x)
{
q31_t cosVal, in, in2; /* Temporary variables for input, output */
q31_t wa, wb, wc, wd; /* Cubic interpolation coefficients */
q31_t a, b, c, d; /* Four nearest output values */
q31_t *tablePtr; /* Pointer to table */
q31_t fract, fractCube, fractSquare; /* Temporary values for fractional values */
q31_t oneBy6 = 0x15555555; /* Fixed point value of 1/6 */
q31_t tableSpacing = TABLE_SPACING_Q31; /* Table spacing */
q31_t temp; /* Temporary variable for intermediate process */
uint32_t index; /* Index variable */
in = x;
/* Calculate the nearest index */
index = in / tableSpacing;
/* Calculate the nearest value of input */
in2 = ((q31_t) index) * tableSpacing;
/* Calculation of fractional value */
fract = (in - in2) << 8;
/* fractSquare = fract * fract */
fractSquare = ((q31_t) (((q63_t) fract * fract) >> 32));
fractSquare = fractSquare << 1;
/* fractCube = fract * fract * fract */
fractCube = ((q31_t) (((q63_t) fractSquare * fract) >> 32));
fractCube = fractCube << 1;
/* Initialise table pointer */
tablePtr = (q31_t *) & cosTableQ31[index];
/* Cubic interpolation process */
/* Calculation of wa */
/* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAAAAAA)*fract; */
wa = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32));
temp = 0x2AAAAAAA;
wa = (q31_t) ((((q63_t) wa << 32) + ((q63_t) temp * fract)) >> 32);
wa = -(wa << 1u);
wa += (fractSquare >> 1u);
/* Read first nearest value of output from the cos table */
a = *tablePtr++;
/* cosVal = a*wa */
cosVal = ((q31_t) (((q63_t) a * wa) >> 32));
/* q31(1.31) Fixed point value of 1 */
temp = 0x7FFFFFFF;
/* Calculation of wb */
wb = ((fractCube >> 1u) - (fractSquare + (fract >> 1u))) + temp;
/* Read second nearest value of output from the cos table */
b = *tablePtr++;
/* cosVal += b*wb */
cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) b * (wb))) >> 32);
/* Calculation of wc */
wc = -fractCube + fractSquare;
wc = (wc >> 1u) + fract;
/* Read third nearest values of output value from the cos table */
c = *tablePtr++;
/* cosVal += c*wc */
cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) c * (wc))) >> 32);
/* Calculation of wd */
/* wd = (oneBy6)*fractCube - (oneBy6)*fract; */
fractCube = fractCube - fract;
wd = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32));
wd = (wd << 1u);
/* Read fourth nearest value of output from the cos table */
d = *tablePtr++;
/* cosVal += d*wd; */
cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) d * (wd))) >> 32);
/* convert cosVal in 2.30 format to 1.31 format */
return (cosVal << 1u);
}
/**
* @} end of cos group
*/

257
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c
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@@ -1,257 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_sin_f32.c
*
* Description: Fast sine calculation for floating-point values.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupFastMath
*/
/**
* @defgroup sin Sine
*
* Computes the trigonometric sine function using a combination of table lookup
* and cubic interpolation. There are separate functions for
* Q15, Q31, and floating-point data types.
* The input to the floating-point version is in radians while the
* fixed-point Q15 and Q31 have a scaled input with the range
* [0 1) mapping to [0 2*pi).
*
* The implementation is based on table lookup using 256 values together with cubic interpolation.
* The steps used are:
* -# Calculation of the nearest integer table index
* -# Fetch the four table values a, b, c, and d
* -# Compute the fractional portion (fract) of the table index.
* -# Calculation of wa, wb, wc, wd
* -# The final result equals <code>a*wa + b*wb + c*wc + d*wd</code>
*
* where
* <pre>
* a=Table[index-1];
* b=Table[index+0];
* c=Table[index+1];
* d=Table[index+2];
* </pre>
* and
* <pre>
* wa=-(1/6)*fract.^3 + (1/2)*fract.^2 - (1/3)*fract;
* wb=(1/2)*fract.^3 - fract.^2 - (1/2)*fract + 1;
* wc=-(1/2)*fract.^3+(1/2)*fract.^2+fract;
* wd=(1/6)*fract.^3 - (1/6)*fract;
* </pre>
*/
/**
* @addtogroup sin
* @{
*/
/**
* \par
* Example code for Generation of Floating-point Sin Table:
* tableSize = 256;
* <pre>for(n = -1; n < (tableSize + 1); n++)
* {
* sinTable[n+1]=sin(2*pi*n/tableSize);
* }</pre>
* \par
* where pi value is 3.14159265358979
*/
static const float32_t sinTable[259] = {
-0.024541229009628296f, 0.000000000000000000f, 0.024541229009628296f,
0.049067676067352295f, 0.073564566671848297f, 0.098017141222953796f,
0.122410677373409270f, 0.146730467677116390f,
0.170961886644363400f, 0.195090323686599730f, 0.219101235270500180f,
0.242980182170867920f, 0.266712754964828490f, 0.290284663438797000f,
0.313681751489639280f, 0.336889863014221190f,
0.359895050525665280f, 0.382683426141738890f, 0.405241310596466060f,
0.427555084228515630f, 0.449611335992813110f, 0.471396744251251220f,
0.492898195981979370f, 0.514102756977081300f,
0.534997642040252690f, 0.555570244789123540f, 0.575808167457580570f,
0.595699310302734380f, 0.615231573581695560f, 0.634393274784088130f,
0.653172850608825680f, 0.671558976173400880f,
0.689540565013885500f, 0.707106769084930420f, 0.724247097969055180f,
0.740951120853424070f, 0.757208824157714840f, 0.773010432720184330f,
0.788346409797668460f, 0.803207516670227050f,
0.817584812641143800f, 0.831469595432281490f, 0.844853579998016360f,
0.857728600502014160f, 0.870086967945098880f, 0.881921291351318360f,
0.893224298954010010f, 0.903989315032958980f,
0.914209783077239990f, 0.923879504203796390f, 0.932992815971374510f,
0.941544055938720700f, 0.949528157711029050f, 0.956940352916717530f,
0.963776051998138430f, 0.970031261444091800f,
0.975702106952667240f, 0.980785250663757320f, 0.985277652740478520f,
0.989176511764526370f, 0.992479562759399410f, 0.995184719562530520f,
0.997290432453155520f, 0.998795449733734130f,
0.999698817729949950f, 1.000000000000000000f, 0.999698817729949950f,
0.998795449733734130f, 0.997290432453155520f, 0.995184719562530520f,
0.992479562759399410f, 0.989176511764526370f,
0.985277652740478520f, 0.980785250663757320f, 0.975702106952667240f,
0.970031261444091800f, 0.963776051998138430f, 0.956940352916717530f,
0.949528157711029050f, 0.941544055938720700f,
0.932992815971374510f, 0.923879504203796390f, 0.914209783077239990f,
0.903989315032958980f, 0.893224298954010010f, 0.881921291351318360f,
0.870086967945098880f, 0.857728600502014160f,
0.844853579998016360f, 0.831469595432281490f, 0.817584812641143800f,
0.803207516670227050f, 0.788346409797668460f, 0.773010432720184330f,
0.757208824157714840f, 0.740951120853424070f,
0.724247097969055180f, 0.707106769084930420f, 0.689540565013885500f,
0.671558976173400880f, 0.653172850608825680f, 0.634393274784088130f,
0.615231573581695560f, 0.595699310302734380f,
0.575808167457580570f, 0.555570244789123540f, 0.534997642040252690f,
0.514102756977081300f, 0.492898195981979370f, 0.471396744251251220f,
0.449611335992813110f, 0.427555084228515630f,
0.405241310596466060f, 0.382683426141738890f, 0.359895050525665280f,
0.336889863014221190f, 0.313681751489639280f, 0.290284663438797000f,
0.266712754964828490f, 0.242980182170867920f,
0.219101235270500180f, 0.195090323686599730f, 0.170961886644363400f,
0.146730467677116390f, 0.122410677373409270f, 0.098017141222953796f,
0.073564566671848297f, 0.049067676067352295f,
0.024541229009628296f, 0.000000000000000122f, -0.024541229009628296f,
-0.049067676067352295f, -0.073564566671848297f, -0.098017141222953796f,
-0.122410677373409270f, -0.146730467677116390f,
-0.170961886644363400f, -0.195090323686599730f, -0.219101235270500180f,
-0.242980182170867920f, -0.266712754964828490f, -0.290284663438797000f,
-0.313681751489639280f, -0.336889863014221190f,
-0.359895050525665280f, -0.382683426141738890f, -0.405241310596466060f,
-0.427555084228515630f, -0.449611335992813110f, -0.471396744251251220f,
-0.492898195981979370f, -0.514102756977081300f,
-0.534997642040252690f, -0.555570244789123540f, -0.575808167457580570f,
-0.595699310302734380f, -0.615231573581695560f, -0.634393274784088130f,
-0.653172850608825680f, -0.671558976173400880f,
-0.689540565013885500f, -0.707106769084930420f, -0.724247097969055180f,
-0.740951120853424070f, -0.757208824157714840f, -0.773010432720184330f,
-0.788346409797668460f, -0.803207516670227050f,
-0.817584812641143800f, -0.831469595432281490f, -0.844853579998016360f,
-0.857728600502014160f, -0.870086967945098880f, -0.881921291351318360f,
-0.893224298954010010f, -0.903989315032958980f,
-0.914209783077239990f, -0.923879504203796390f, -0.932992815971374510f,
-0.941544055938720700f, -0.949528157711029050f, -0.956940352916717530f,
-0.963776051998138430f, -0.970031261444091800f,
-0.975702106952667240f, -0.980785250663757320f, -0.985277652740478520f,
-0.989176511764526370f, -0.992479562759399410f, -0.995184719562530520f,
-0.997290432453155520f, -0.998795449733734130f,
-0.999698817729949950f, -1.000000000000000000f, -0.999698817729949950f,
-0.998795449733734130f, -0.997290432453155520f, -0.995184719562530520f,
-0.992479562759399410f, -0.989176511764526370f,
-0.985277652740478520f, -0.980785250663757320f, -0.975702106952667240f,
-0.970031261444091800f, -0.963776051998138430f, -0.956940352916717530f,
-0.949528157711029050f, -0.941544055938720700f,
-0.932992815971374510f, -0.923879504203796390f, -0.914209783077239990f,
-0.903989315032958980f, -0.893224298954010010f, -0.881921291351318360f,
-0.870086967945098880f, -0.857728600502014160f,
-0.844853579998016360f, -0.831469595432281490f, -0.817584812641143800f,
-0.803207516670227050f, -0.788346409797668460f, -0.773010432720184330f,
-0.757208824157714840f, -0.740951120853424070f,
-0.724247097969055180f, -0.707106769084930420f, -0.689540565013885500f,
-0.671558976173400880f, -0.653172850608825680f, -0.634393274784088130f,
-0.615231573581695560f, -0.595699310302734380f,
-0.575808167457580570f, -0.555570244789123540f, -0.534997642040252690f,
-0.514102756977081300f, -0.492898195981979370f, -0.471396744251251220f,
-0.449611335992813110f, -0.427555084228515630f,
-0.405241310596466060f, -0.382683426141738890f, -0.359895050525665280f,
-0.336889863014221190f, -0.313681751489639280f, -0.290284663438797000f,
-0.266712754964828490f, -0.242980182170867920f,
-0.219101235270500180f, -0.195090323686599730f, -0.170961886644363400f,
-0.146730467677116390f, -0.122410677373409270f, -0.098017141222953796f,
-0.073564566671848297f, -0.049067676067352295f,
-0.024541229009628296f, -0.000000000000000245f, 0.024541229009628296f
};
/**
* @brief Fast approximation to the trigonometric sine function for floating-point data.
* @param[in] x input value in radians.
* @return sin(x).
*/
float32_t arm_sin_f32(
float32_t x)
{
float32_t sinVal, fract, in; /* Temporary variables for input, output */
uint32_t index; /* Index variable */
uint32_t tableSize = (uint32_t) TABLE_SIZE; /* Initialise tablesize */
float32_t wa, wb, wc, wd; /* Cubic interpolation coefficients */
float32_t a, b, c, d; /* Four nearest output values */
float32_t *tablePtr; /* Pointer to table */
int32_t n;
/* input x is in radians */
/* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi */
in = x * 0.159154943092f;
/* Calculation of floor value of input */
n = (int32_t) in;
/* Make negative values towards -infinity */
if(x < 0.0f)
{
n = n - 1;
}
/* Map input value to [0 1] */
in = in - (float32_t) n;
/* Calculation of index of the table */
index = (uint32_t) (tableSize * in);
/* fractional value calculation */
fract = ((float32_t) tableSize * in) - (float32_t) index;
/* Initialise table pointer */
tablePtr = (float32_t *) & sinTable[index];
/* Read four nearest values of output value from the sin table */
a = *tablePtr++;
b = *tablePtr++;
c = *tablePtr++;
d = *tablePtr++;
/* Cubic interpolation process */
wa = -(((0.166666667f) * (fract * (fract * fract))) +
((0.3333333333333f) * fract)) + ((0.5f) * (fract * fract));
wb = (((0.5f) * (fract * (fract * fract))) -
((fract * fract) + ((0.5f) * fract))) + 1.0f;
wc = (-((0.5f) * (fract * (fract * fract))) +
((0.5f) * (fract * fract))) + fract;
wd = ((0.166666667f) * (fract * (fract * fract))) -
((0.166666667f) * fract);
/* Calculate sin value */
sinVal = ((a * wa) + (b * wb)) + ((c * wc) + (d * wd));
/* Return the output value */
return (sinVal);
}
/**
* @} end of sin group
*/

192
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c
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@@ -1,192 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_sin_q15.c
*
* Description: Fast sine calculation for Q15 values.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupFastMath
*/
/**
* @addtogroup sin
* @{
*/
/**
* \par
* Example code for Generation of Q15 Sin Table:
* \par
* <pre>tableSize = 256;
* for(n = -1; n < (tableSize + 1); n++)
* {
* sinTable[n+1]=sin(2*pi*n/tableSize);
* } </pre>
* where pi value is 3.14159265358979
* \par
* Convert Floating point to Q15(Fixed point):
* (sinTable[i] * pow(2, 15))
* \par
* rounding to nearest integer is done
* sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);
*/
static const q15_t sinTableQ15[259] = {
0xfcdc, 0x0, 0x324, 0x648, 0x96b, 0xc8c, 0xfab, 0x12c8,
0x15e2, 0x18f9, 0x1c0c, 0x1f1a, 0x2224, 0x2528, 0x2827, 0x2b1f,
0x2e11, 0x30fc, 0x33df, 0x36ba, 0x398d, 0x3c57, 0x3f17, 0x41ce,
0x447b, 0x471d, 0x49b4, 0x4c40, 0x4ec0, 0x5134, 0x539b, 0x55f6,
0x5843, 0x5a82, 0x5cb4, 0x5ed7, 0x60ec, 0x62f2, 0x64e9, 0x66d0,
0x68a7, 0x6a6e, 0x6c24, 0x6dca, 0x6f5f, 0x70e3, 0x7255, 0x73b6,
0x7505, 0x7642, 0x776c, 0x7885, 0x798a, 0x7a7d, 0x7b5d, 0x7c2a,
0x7ce4, 0x7d8a, 0x7e1e, 0x7e9d, 0x7f0a, 0x7f62, 0x7fa7, 0x7fd9,
0x7ff6, 0x7fff, 0x7ff6, 0x7fd9, 0x7fa7, 0x7f62, 0x7f0a, 0x7e9d,
0x7e1e, 0x7d8a, 0x7ce4, 0x7c2a, 0x7b5d, 0x7a7d, 0x798a, 0x7885,
0x776c, 0x7642, 0x7505, 0x73b6, 0x7255, 0x70e3, 0x6f5f, 0x6dca,
0x6c24, 0x6a6e, 0x68a7, 0x66d0, 0x64e9, 0x62f2, 0x60ec, 0x5ed7,
0x5cb4, 0x5a82, 0x5843, 0x55f6, 0x539b, 0x5134, 0x4ec0, 0x4c40,
0x49b4, 0x471d, 0x447b, 0x41ce, 0x3f17, 0x3c57, 0x398d, 0x36ba,
0x33df, 0x30fc, 0x2e11, 0x2b1f, 0x2827, 0x2528, 0x2224, 0x1f1a,
0x1c0c, 0x18f9, 0x15e2, 0x12c8, 0xfab, 0xc8c, 0x96b, 0x648,
0x324, 0x0, 0xfcdc, 0xf9b8, 0xf695, 0xf374, 0xf055, 0xed38,
0xea1e, 0xe707, 0xe3f4, 0xe0e6, 0xdddc, 0xdad8, 0xd7d9, 0xd4e1,
0xd1ef, 0xcf04, 0xcc21, 0xc946, 0xc673, 0xc3a9, 0xc0e9, 0xbe32,
0xbb85, 0xb8e3, 0xb64c, 0xb3c0, 0xb140, 0xaecc, 0xac65, 0xaa0a,
0xa7bd, 0xa57e, 0xa34c, 0xa129, 0x9f14, 0x9d0e, 0x9b17, 0x9930,
0x9759, 0x9592, 0x93dc, 0x9236, 0x90a1, 0x8f1d, 0x8dab, 0x8c4a,
0x8afb, 0x89be, 0x8894, 0x877b, 0x8676, 0x8583, 0x84a3, 0x83d6,
0x831c, 0x8276, 0x81e2, 0x8163, 0x80f6, 0x809e, 0x8059, 0x8027,
0x800a, 0x8000, 0x800a, 0x8027, 0x8059, 0x809e, 0x80f6, 0x8163,
0x81e2, 0x8276, 0x831c, 0x83d6, 0x84a3, 0x8583, 0x8676, 0x877b,
0x8894, 0x89be, 0x8afb, 0x8c4a, 0x8dab, 0x8f1d, 0x90a1, 0x9236,
0x93dc, 0x9592, 0x9759, 0x9930, 0x9b17, 0x9d0e, 0x9f14, 0xa129,
0xa34c, 0xa57e, 0xa7bd, 0xaa0a, 0xac65, 0xaecc, 0xb140, 0xb3c0,
0xb64c, 0xb8e3, 0xbb85, 0xbe32, 0xc0e9, 0xc3a9, 0xc673, 0xc946,
0xcc21, 0xcf04, 0xd1ef, 0xd4e1, 0xd7d9, 0xdad8, 0xdddc, 0xe0e6,
0xe3f4, 0xe707, 0xea1e, 0xed38, 0xf055, 0xf374, 0xf695, 0xf9b8,
0xfcdc, 0x0, 0x324
};
/**
* @brief Fast approximation to the trigonometric sine function for Q15 data.
* @param[in] x Scaled input value in radians.
* @return sin(x).
*
* The Q15 input value is in the range [0 +1) and is mapped to a radian value in the range [0 2*pi).
*/
q15_t arm_sin_q15(
q15_t x)
{
q31_t sinVal; /* Temporary variables output */
q15_t *tablePtr; /* Pointer to table */
q15_t fract, in, in2; /* Temporary variables for input, output */
q31_t wa, wb, wc, wd; /* Cubic interpolation coefficients */
q15_t a, b, c, d; /* Four nearest output values */
q15_t fractCube, fractSquare; /* Temporary values for fractional value */
q15_t oneBy6 = 0x1555; /* Fixed point value of 1/6 */
q15_t tableSpacing = TABLE_SPACING_Q15; /* Table spacing */
int32_t index; /* Index variable */
in = x;
/* Calculate the nearest index */
index = (int32_t) in / tableSpacing;
/* Calculate the nearest value of input */
in2 = (q15_t) ((index) * tableSpacing);
/* Calculation of fractional value */
fract = (in - in2) << 8;
/* fractSquare = fract * fract */
fractSquare = (q15_t) ((fract * fract) >> 15);
/* fractCube = fract * fract * fract */
fractCube = (q15_t) ((fractSquare * fract) >> 15);
/* Initialise table pointer */
tablePtr = (q15_t *) & sinTableQ15[index];
/* Cubic interpolation process */
/* Calculation of wa */
/* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAA)*fract; */
wa = (q31_t) oneBy6 *fractCube;
wa += (q31_t) 0x2AAA *fract;
wa = -(wa >> 15);
wa += ((q31_t) fractSquare >> 1u);
/* Read first nearest value of output from the sin table */
a = *tablePtr++;
/* sinVal = a * wa */
sinVal = a * wa;
/* Calculation of wb */
wb = (((q31_t) fractCube >> 1u) - (q31_t) fractSquare) -
(((q31_t) fract >> 1u) - 0x7FFF);
/* Read second nearest value of output from the sin table */
b = *tablePtr++;
/* sinVal += b*wb */
sinVal += b * wb;
/* Calculation of wc */
wc = -(q31_t) fractCube + fractSquare;
wc = (wc >> 1u) + fract;
/* Read third nearest value of output from the sin table */
c = *tablePtr++;
/* sinVal += c*wc */
sinVal += c * wc;
/* Calculation of wd */
/* wd = (oneBy6)*fractCube - (oneBy6)*fract; */
fractCube = fractCube - fract;
wd = ((q15_t) (((q31_t) oneBy6 * fractCube) >> 15));
/* Read fourth nearest value of output from the sin table */
d = *tablePtr++;
/* sinVal += d*wd; */
sinVal += d * wd;
/* Return the output value in 1.15(q15) format */
return ((q15_t) (sinVal >> 15u));
}
/**
* @} end of sin group
*/

227
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c
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@@ -1,227 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_sin_q31.c
*
* Description: Fast sine calculation for Q31 values.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupFastMath
*/
/**
* @addtogroup sin
* @{
*/
/**
* \par
* Tables generated are in Q31(1.31 Fixed point format)
* Generation of sin values in floating point:
* <pre>tableSize = 256;
* for(n = -1; n < (tableSize + 1); n++)
* {
* sinTable[n+1]= sin(2*pi*n/tableSize);
* } </pre>
* where pi value is 3.14159265358979
* \par
* Convert Floating point to Q31(Fixed point):
* (sinTable[i] * pow(2, 31))
* \par
* rounding to nearest integer is done
* sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);
*/
static const q31_t sinTableQ31[259] = {
0xfcdbd541, 0x0, 0x3242abf, 0x647d97c, 0x96a9049, 0xc8bd35e, 0xfab272b,
0x12c8106f,
0x15e21445, 0x18f8b83c, 0x1c0b826a, 0x1f19f97b, 0x2223a4c5, 0x25280c5e,
0x2826b928, 0x2b1f34eb,
0x2e110a62, 0x30fbc54d, 0x33def287, 0x36ba2014, 0x398cdd32, 0x3c56ba70,
0x3f1749b8, 0x41ce1e65,
0x447acd50, 0x471cece7, 0x49b41533, 0x4c3fdff4, 0x4ebfe8a5, 0x5133cc94,
0x539b2af0, 0x55f5a4d2,
0x5842dd54, 0x5a82799a, 0x5cb420e0, 0x5ed77c8a, 0x60ec3830, 0x62f201ac,
0x64e88926, 0x66cf8120,
0x68a69e81, 0x6a6d98a4, 0x6c242960, 0x6dca0d14, 0x6f5f02b2, 0x70e2cbc6,
0x72552c85, 0x73b5ebd1,
0x7504d345, 0x7641af3d, 0x776c4edb, 0x78848414, 0x798a23b1, 0x7a7d055b,
0x7b5d039e, 0x7c29fbee,
0x7ce3ceb2, 0x7d8a5f40, 0x7e1d93ea, 0x7e9d55fc, 0x7f0991c4, 0x7f62368f,
0x7fa736b4, 0x7fd8878e,
0x7ff62182, 0x7fffffff, 0x7ff62182, 0x7fd8878e, 0x7fa736b4, 0x7f62368f,
0x7f0991c4, 0x7e9d55fc,
0x7e1d93ea, 0x7d8a5f40, 0x7ce3ceb2, 0x7c29fbee, 0x7b5d039e, 0x7a7d055b,
0x798a23b1, 0x78848414,
0x776c4edb, 0x7641af3d, 0x7504d345, 0x73b5ebd1, 0x72552c85, 0x70e2cbc6,
0x6f5f02b2, 0x6dca0d14,
0x6c242960, 0x6a6d98a4, 0x68a69e81, 0x66cf8120, 0x64e88926, 0x62f201ac,
0x60ec3830, 0x5ed77c8a,
0x5cb420e0, 0x5a82799a, 0x5842dd54, 0x55f5a4d2, 0x539b2af0, 0x5133cc94,
0x4ebfe8a5, 0x4c3fdff4,
0x49b41533, 0x471cece7, 0x447acd50, 0x41ce1e65, 0x3f1749b8, 0x3c56ba70,
0x398cdd32, 0x36ba2014,
0x33def287, 0x30fbc54d, 0x2e110a62, 0x2b1f34eb, 0x2826b928, 0x25280c5e,
0x2223a4c5, 0x1f19f97b,
0x1c0b826a, 0x18f8b83c, 0x15e21445, 0x12c8106f, 0xfab272b, 0xc8bd35e,
0x96a9049, 0x647d97c,
0x3242abf, 0x0, 0xfcdbd541, 0xf9b82684, 0xf6956fb7, 0xf3742ca2, 0xf054d8d5,
0xed37ef91,
0xea1debbb, 0xe70747c4, 0xe3f47d96, 0xe0e60685, 0xdddc5b3b, 0xdad7f3a2,
0xd7d946d8, 0xd4e0cb15,
0xd1eef59e, 0xcf043ab3, 0xcc210d79, 0xc945dfec, 0xc67322ce, 0xc3a94590,
0xc0e8b648, 0xbe31e19b,
0xbb8532b0, 0xb8e31319, 0xb64beacd, 0xb3c0200c, 0xb140175b, 0xaecc336c,
0xac64d510, 0xaa0a5b2e,
0xa7bd22ac, 0xa57d8666, 0xa34bdf20, 0xa1288376, 0x9f13c7d0, 0x9d0dfe54,
0x9b1776da, 0x99307ee0,
0x9759617f, 0x9592675c, 0x93dbd6a0, 0x9235f2ec, 0x90a0fd4e, 0x8f1d343a,
0x8daad37b, 0x8c4a142f,
0x8afb2cbb, 0x89be50c3, 0x8893b125, 0x877b7bec, 0x8675dc4f, 0x8582faa5,
0x84a2fc62, 0x83d60412,
0x831c314e, 0x8275a0c0, 0x81e26c16, 0x8162aa04, 0x80f66e3c, 0x809dc971,
0x8058c94c, 0x80277872,
0x8009de7e, 0x80000000, 0x8009de7e, 0x80277872, 0x8058c94c, 0x809dc971,
0x80f66e3c, 0x8162aa04,
0x81e26c16, 0x8275a0c0, 0x831c314e, 0x83d60412, 0x84a2fc62, 0x8582faa5,
0x8675dc4f, 0x877b7bec,
0x8893b125, 0x89be50c3, 0x8afb2cbb, 0x8c4a142f, 0x8daad37b, 0x8f1d343a,
0x90a0fd4e, 0x9235f2ec,
0x93dbd6a0, 0x9592675c, 0x9759617f, 0x99307ee0, 0x9b1776da, 0x9d0dfe54,
0x9f13c7d0, 0xa1288376,
0xa34bdf20, 0xa57d8666, 0xa7bd22ac, 0xaa0a5b2e, 0xac64d510, 0xaecc336c,
0xb140175b, 0xb3c0200c,
0xb64beacd, 0xb8e31319, 0xbb8532b0, 0xbe31e19b, 0xc0e8b648, 0xc3a94590,
0xc67322ce, 0xc945dfec,
0xcc210d79, 0xcf043ab3, 0xd1eef59e, 0xd4e0cb15, 0xd7d946d8, 0xdad7f3a2,
0xdddc5b3b, 0xe0e60685,
0xe3f47d96, 0xe70747c4, 0xea1debbb, 0xed37ef91, 0xf054d8d5, 0xf3742ca2,
0xf6956fb7, 0xf9b82684,
0xfcdbd541, 0x0, 0x3242abf
};
/**
* @brief Fast approximation to the trigonometric sine function for Q31 data.
* @param[in] x Scaled input value in radians.
* @return sin(x).
*
* The Q31 input value is in the range [0 +1) and is mapped to a radian value in the range [0 2*pi).
*/
q31_t arm_sin_q31(
q31_t x)
{
q31_t sinVal, in, in2; /* Temporary variables for input, output */
uint32_t index; /* Index variables */
q31_t wa, wb, wc, wd; /* Cubic interpolation coefficients */
q31_t a, b, c, d; /* Four nearest output values */
q31_t *tablePtr; /* Pointer to table */
q31_t fract, fractCube, fractSquare; /* Temporary values for fractional values */
q31_t oneBy6 = 0x15555555; /* Fixed point value of 1/6 */
q31_t tableSpacing = TABLE_SPACING_Q31; /* Table spacing */
q31_t temp; /* Temporary variable for intermediate process */
in = x;
/* Calculate the nearest index */
index = (uint32_t) in / (uint32_t) tableSpacing;
/* Calculate the nearest value of input */
in2 = (q31_t) index *tableSpacing;
/* Calculation of fractional value */
fract = (in - in2) << 8;
/* fractSquare = fract * fract */
fractSquare = ((q31_t) (((q63_t) fract * fract) >> 32));
fractSquare = fractSquare << 1;
/* fractCube = fract * fract * fract */
fractCube = ((q31_t) (((q63_t) fractSquare * fract) >> 32));
fractCube = fractCube << 1;
/* Initialise table pointer */
tablePtr = (q31_t *) & sinTableQ31[index];
/* Cubic interpolation process */
/* Calculation of wa */
/* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAAAAAA)*fract; */
wa = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32));
temp = 0x2AAAAAAA;
wa = (q31_t) ((((q63_t) wa << 32) + ((q63_t) temp * fract)) >> 32);
wa = -(wa << 1u);
wa += (fractSquare >> 1u);
/* Read first nearest value of output from the sin table */
a = *tablePtr++;
/* sinVal = a*wa */
sinVal = ((q31_t) (((q63_t) a * wa) >> 32));
/* q31(1.31) Fixed point value of 1 */
temp = 0x7FFFFFFF;
/* Calculation of wb */
wb = ((fractCube >> 1u) - (fractSquare + (fract >> 1u))) + temp;
/* Read second nearest value of output from the sin table */
b = *tablePtr++;
/* sinVal += b*wb */
sinVal = (q31_t) ((((q63_t) sinVal << 32) + (q63_t) b * (wb)) >> 32);
/* Calculation of wc */
wc = -fractCube + fractSquare;
wc = (wc >> 1u) + fract;
/* Read third nearest value of output from the sin table */
c = *tablePtr++;
/* sinVal += c*wc */
sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) c * wc)) >> 32);
/* Calculation of wd */
/* wd = (oneBy6) * fractCube - (oneBy6) * fract; */
fractCube = fractCube - fract;
wd = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32));
wd = (wd << 1u);
/* Read fourth nearest value of output from the sin table */
d = *tablePtr++;
/* sinVal += d*wd; */
sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) d * wd)) >> 32);
/* convert sinVal in 2.30 format to 1.31 format */
return (sinVal << 1u);
}
/**
* @} end of sin group
*/

178
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c
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/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_sqrt_q15.c
*
* Description: Q15 square root function.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
#include "arm_common_tables.h"
/**
* @ingroup groupFastMath
*/
/**
* @addtogroup SQRT
* @{
*/
/**
* @brief Q15 square root function.
* @param[in] in input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
* @param[out] *pOut square root of input value.
* @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
* <code>in</code> is negative value and returns zero output for negative values.
*/
arm_status arm_sqrt_q15(
q15_t in,
q15_t * pOut)
{
q31_t prevOut;
q15_t oneByOut;
uint32_t sign_bits;
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t out;
if(in > 0)
{
/* run for ten iterations */
/* Take initial guess as half of the input and first iteration */
out = ((q31_t) in >> 1u) + 0x3FFF;
/* Calculation of reciprocal of out */
/* oneByOut contains reciprocal of out which is in 2.14 format
and oneByOut should be upscaled by signBits */
sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
/* 0.5 * (out) */
out = out >> 1u;
/* prevOut = 0.5 * out + (in * (oneByOut << signBits))) */
prevOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
/* Third iteration */
sign_bits = arm_recip_q15((q15_t) prevOut, &oneByOut, armRecipTableQ15);
prevOut = prevOut >> 1u;
out = prevOut + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
out = out >> 1u;
prevOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
/* Fifth iteration */
sign_bits = arm_recip_q15((q15_t) prevOut, &oneByOut, armRecipTableQ15);
prevOut = prevOut >> 1u;
out = prevOut + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
out = out >> 1u;
prevOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
/* Seventh iteration */
sign_bits = arm_recip_q15((q15_t) prevOut, &oneByOut, armRecipTableQ15);
prevOut = prevOut >> 1u;
out = prevOut + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
out = out >> 1u;
prevOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
sign_bits = arm_recip_q15((q15_t) prevOut, &oneByOut, armRecipTableQ15);
prevOut = prevOut >> 1u;
out = prevOut + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
/* tenth iteration */
sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
out = out >> 1u;
*pOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
return (ARM_MATH_SUCCESS);
}
#else
/* Run the below code for Cortex-M0 */
q31_t out, loopVar; /* Temporary variable for output, loop variable */
if(in > 0)
{
/* run for ten iterations */
/* Take initial guess as half of the input and first iteration */
out = ((q31_t) in >> 1u) + 0x3FFF;
/* Calculation of reciprocal of out */
/* oneByOut contains reciprocal of out which is in 2.14 format
and oneByOut should be upscaled by sign bits */
sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
/* 0.5 * (out) */
out = out >> 1u;
/* prevOut = 0.5 * out + (in * oneByOut) << signbits))) */
prevOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
/* loop for third iteration to tenth iteration */
for (loopVar = 1; loopVar <= 8; loopVar++)
{
sign_bits = arm_recip_q15((q15_t) prevOut, &oneByOut, armRecipTableQ15);
/* 0.5 * (prevOut) */
prevOut = prevOut >> 1u;
/* prevOut = 0.5 * prevOut+ (in * oneByOut) << signbits))) */
out =
prevOut + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
/* prevOut = out */
prevOut = out;
}
/* output is moved to pOut pointer */
*pOut = prevOut;
return (ARM_MATH_SUCCESS);
}
#endif /* #ifndef ARM_MATH_CM0 */
else
{
*pOut = 0;
return (ARM_MATH_ARGUMENT_ERROR);
}
}
/**
* @} end of SQRT group
*/

199
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c
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/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_sqrt_q31.c
*
* Description: Q31 square root function.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
* -------------------------------------------------------------------- */
#include "arm_math.h"
#include "arm_common_tables.h"
/**
* @ingroup groupFastMath
*/
/**
* @addtogroup SQRT
* @{
*/
/**
* @brief Q31 square root function.
* @param[in] in input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
* @param[out] *pOut square root of input value.
* @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
* <code>in</code> is negative value and returns zero output for negative values.
*/
arm_status arm_sqrt_q31(
q31_t in,
q31_t * pOut)
{
q63_t prevOut;
q31_t oneByOut;
uint32_t signBits;
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
q63_t out;
if(in > 0)
{
/* run for ten iterations */
/* Take initial guess as half of the input and first iteration */
out = (in >> 1) + 0x3FFFFFFF;
/* Calculation of reciprocal of out */
/* oneByOut contains reciprocal of out which is in 2.30 format
and oneByOut should be upscaled by signBits */
signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
/* 0.5 * (out) */
out = out >> 1u;
/* prevOut = 0.5 * out + (in * (oneByOut << signBits))) */
prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
/* Third iteration */
signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
prevOut = prevOut >> 1u;
out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
out = out >> 1u;
prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
/* Fifth iteration */
signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
prevOut = prevOut >> 1u;
out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
out = out >> 1u;
prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
/* Seventh iteration */
signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
prevOut = prevOut >> 1u;
out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
out = out >> 1u;
prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
prevOut = prevOut >> 1u;
out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
out = out >> 1u;
prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
prevOut = prevOut >> 1u;
out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
out = out >> 1u;
prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
prevOut = prevOut >> 1u;
out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
out = out >> 1u;
prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
prevOut = prevOut >> 1u;
out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
/* tenth iteration */
signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
out = out >> 1u;
*pOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
return (ARM_MATH_SUCCESS);
}
#else
/* Run the below code for Cortex-M0 */
q63_t out, loopVar; /* Temporary variable for output, loop variable */
if(in > 0)
{
/* run for ten iterations */
/* Take initial guess as half of the input and first iteration */
out = (in >> 1) + 0x3FFFFFFF;
/* Calculation of reciprocal of out */
/* oneByOut contains reciprocal of out which is in 2.30 format
and oneByOut should be upscaled by sign bits */
signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
/* 0.5 * (out) */
out = out >> 1u;
/* prevOut = 0.5 * out + (in * (oneByOut) << signbits) */
prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
/* loop for third iteration to tength iteration */
for (loopVar = 1; loopVar <= 14; loopVar++)
{
signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
/* 0.5 * (prevOut) */
prevOut = prevOut >> 1u;
/* out = 0.5 * prevOut + (in * oneByOut) << signbits))) */
out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
/* prevOut = out */
prevOut = out;
}
/* output is moved to pOut pointer */
*pOut = prevOut;
return (ARM_MATH_SUCCESS);
}
#endif /* #ifndef ARM_MATH_CM0 */
else
{
*pOut = 0;
return (ARM_MATH_ARGUMENT_ERROR);
}
}
/**
* @} end of SQRT group
*/

102
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
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@@ -1,102 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_biquad_cascade_df1_32x64_init_q31.c
*
* Description: High precision Q31 Biquad cascade filter initialization function.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup BiquadCascadeDF1_32x64
* @{
*/
/**
* @details
*
* @param[in,out] *S points to an instance of the high precision Q31 Biquad cascade filter structure.
* @param[in] numStages number of 2nd order stages in the filter.
* @param[in] *pCoeffs points to the filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] postShift Shift to be applied after the accumulator. Varies according to the coefficients format.
* @return none
*
* <b>Coefficient and State Ordering:</b>
*
* \par
* The coefficients are stored in the array <code>pCoeffs</code> in the following order:
* <pre>
* {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
* </pre>
* where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
* <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
* and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
*
* \par
* The <code>pState</code> points to state variables array and size of each state variable is 1.63 format.
* Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
* The state variables are arranged in the state array as:
* <pre>
* {x[n-1], x[n-2], y[n-1], y[n-2]}
* </pre>
* The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
* The state array has a total length of <code>4*numStages</code> values.
* The state variables are updated after each block of data is processed; the coefficients are untouched.
*/
void arm_biquad_cas_df1_32x64_init_q31(
arm_biquad_cas_df1_32x64_ins_q31 * S,
uint8_t numStages,
q31_t * pCoeffs,
q63_t * pState,
uint8_t postShift)
{
/* Assign filter stages */
S->numStages = numStages;
/* Assign postShift to be applied to the output */
S->postShift = postShift;
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Clear state buffer and size is always 4 * numStages */
memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q63_t));
/* Assign state pointer */
S->pState = pState;
}
/**
* @} end of BiquadCascadeDF1_32x64 group
*/

476
source/firmware/arch/stm32f4xx/lib/stdperiph/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
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@@ -1,476 +0,0 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date: 15. July 2011
* $Revision: V1.0.10
*
* Project: CMSIS DSP Library
* Title: arm_biquad_cascade_df1_32x64_q31.c
*
* Description: High precision Q31 Biquad cascade filter processing function
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Version 1.0.10 2011/7/15
* Big Endian support added and Merged M0 and M3/M4 Source code.
*
* Version 1.0.3 2010/11/29
* Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.2 2010/11/11
* Documentation updated.
*
* Version 1.0.1 2010/10/05
* Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20
* Production release and review comments incorporated.
*
* Version 0.0.7 2010/06/10
* Misra-C changes done
* -------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @defgroup BiquadCascadeDF1_32x64 High Precision Q31 Biquad Cascade Filter
*
* This function implements a high precision Biquad cascade filter which operates on
* Q31 data values. The filter coefficients are in 1.31 format and the state variables
* are in 1.63 format. The double precision state variables reduce quantization noise
* in the filter and provide a cleaner output.
* These filters are particularly useful when implementing filters in which the
* singularities are close to the unit circle. This is common for low pass or high
* pass filters with very low cutoff frequencies.
*
* The function operates on blocks of input and output data
* and each call to the function processes <code>blockSize</code> samples through
* the filter. <code>pSrc</code> and <code>pDst</code> points to input and output arrays
* containing <code>blockSize</code> Q31 values.
*
* \par Algorithm
* Each Biquad stage implements a second order filter using the difference equation:
* <pre>
* y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
* </pre>
* A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
* \image html Biquad.gif "Single Biquad filter stage"
* Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
* Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
* Pay careful attention to the sign of the feedback coefficients.
* Some design tools use the difference equation
* <pre>
* y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
* </pre>
* In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
*
* \par
* Higher order filters are realized as a cascade of second order sections.
* <code>numStages</code> refers to the number of second order stages used.
* For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
* \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"
* A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
*
* \par
* The <code>pState</code> points to state variables array .
* Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code> and each state variable in 1.63 format to improve precision.
* The state variables are arranged in the array as:
* <pre>
* {x[n-1], x[n-2], y[n-1], y[n-2]}
* </pre>
*
* \par
* The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
* The state array has a total length of <code>4*numStages</code> values of data in 1.63 format.
* The state variables are updated after each block of data is processed; the coefficients are untouched.
*
* \par Instance Structure
* The coefficients and state variables for a filter are stored together in an instance data structure.
* A separate instance structure must be defined for each filter.
* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
*
* \par Init Function
* There is also an associated initialization function which performs the following operations:
* - Sets the values of the internal structure fields.
* - Zeros out the values in the state buffer.
* \par
* Use of the initialization function is optional.
* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
* To place an instance structure into a const data section, the instance structure must be manually initialized.
* Set the values in the state buffer to zeros before static initialization.
* For example, to statically initialize the filter instance structure use
* <pre>
* arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages, pState, pCoeffs, postShift};
* </pre>
* where <code>numStages</code> is the number of Biquad stages in the filter; <code>pState</code> is the address of the state buffer;
* <code>pCoeffs</code> is the address of the coefficient buffer; <code>postShift</code> shift to be applied which is described in detail below.
* \par Fixed-Point Behavior
* Care must be taken while using Biquad Cascade 32x64 filter function.
* Following issues must be considered:
* - Scaling of coefficients
* - Filter gain
* - Overflow and saturation
*
* \par
* Filter coefficients are represented as fractional values and
* restricted to lie in the range <code>[-1 +1)</code>.
* The processing function has an additional scaling parameter <code>postShift</code>
* which allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
* At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
* \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"
* This essentially scales the filter coefficients by <code>2^postShift</code>.
* For example, to realize the coefficients
* <pre>
* {1.5, -0.8, 1.2, 1.6, -0.9}
* </pre>
* set the Coefficient array to:
* <pre>
* {0.75, -0.4, 0.6, 0.8, -0.45}
* </pre>
* and set <code>postShift=1</code>
*
* \par
* The second thing to keep in mind is the gain through the filter.
* The frequency response of a Biquad filter is a function of its coefficients.
* It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.
* This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.
* To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
*
* \par
* The third item to consider is the overflow and saturation behavior of the fixed-point Q31 version.
* This is described in the function specific documentation below.
*/
/**
* @addtogroup BiquadCascadeDF1_32x64
* @{
*/
/**
* @details
* @param[in] *S points to an instance of the high precision Q31 Biquad cascade filter.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*
* \par
* The function is implemented using an internal 64-bit accumulator.
* The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
* Thus, if the accumulator result overflows it wraps around rather than clip.
* In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).
* After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to
* 1.31 format by discarding the low 32 bits.
*
* \par
* Two related functions are provided in the CMSIS DSP library.
* <code>arm_biquad_cascade_df1_q31()</code> implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator.
* <code>arm_biquad_cascade_df1_fast_q31()</code> implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator.
*/
void arm_biquad_cas_df1_32x64_q31(
const arm_biquad_cas_df1_32x64_ins_q31 * S,
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize)
{
q31_t *pIn = pSrc; /* input pointer initialization */
q31_t *pOut = pDst; /* output pointer initialization */
q63_t *pState = S->pState; /* state pointer initialization */
q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */
q63_t acc; /* accumulator */
q63_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */
q31_t b0, b1, b2, a1, a2; /* Filter coefficients */
q63_t Xn; /* temporary input */
int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */
uint32_t sample, stage = S->numStages; /* loop counters */
#ifndef ARM_MATH_CM0
/* Run the below code for Cortex-M4 and Cortex-M3 */
do
{
/* Reading the coefficients */
b0 = *pCoeffs++;
b1 = *pCoeffs++;
b2 = *pCoeffs++;
a1 = *pCoeffs++;
a2 = *pCoeffs++;
/* Reading the state values */
Xn1 = pState[0];
Xn2 = pState[1];
Yn1 = pState[2];
Yn2 = pState[3];
/* Apply loop unrolling and compute 4 output values simultaneously. */
/* The variable acc hold output value that is being computed and
* stored in the destination buffer
* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
*/
sample = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(sample > 0u)
{
/* Read the input */
Xn = *pIn++;
/* The value is shifted to the MSB to perform 32x64 multiplication */
Xn = Xn << 32;
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
/* acc = b0 * x[n] */
acc = mult32x64(Xn, b0);
/* acc += b1 * x[n-1] */
acc += mult32x64(Xn1, b1);
/* acc += b[2] * x[n-2] */
acc += mult32x64(Xn2, b2);
/* acc += a1 * y[n-1] */
acc += mult32x64(Yn1, a1);
/* acc += a2 * y[n-2] */
acc += mult32x64(Yn2, a2);
/* The result is converted to 1.63 , Yn2 variable is reused */
Yn2 = acc << shift;
/* Store the output in the destination buffer in 1.31 format. */
*pOut++ = (q31_t) (acc >> (32 - shift));
/* Read the second input into Xn2, to reuse the value */
Xn2 = *pIn++;
/* The value is shifted to the MSB to perform 32x64 multiplication */
Xn2 = Xn2 << 32;
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
/* acc = b0 * x[n] */
acc = mult32x64(Xn2, b0);
/* acc += b1 * x[n-1] */
acc += mult32x64(Xn, b1);
/* acc += b[2] * x[n-2] */
acc += mult32x64(Xn1, b2);
/* acc += a1 * y[n-1] */
acc += mult32x64(Yn2, a1);
/* acc += a2 * y[n-2] */
acc += mult32x64(Yn1, a2);
/* The result is converted to 1.63, Yn1 variable is reused */
Yn1 = acc << shift;
/* The result is converted to 1.31 */
/* Store the output in the destination buffer. */
*pOut++ = (q31_t) (acc >> (32 - shift));
/* Read the third input into Xn1, to reuse the value */
Xn1 = *pIn++;
/* The value is shifted to the MSB to perform 32x64 multiplication */
Xn1 = Xn1 << 32;
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
/* acc = b0 * x[n] */
acc = mult32x64(Xn1, b0);
/* acc += b1 * x[n-1] */
acc += mult32x64(Xn2, b1);
/* acc += b[2] * x[n-2] */
acc += mult32x64(Xn, b2);
/* acc += a1 * y[n-1] */
acc += mult32x64(Yn1, a1);
/* acc += a2 * y[n-2] */
acc += mult32x64(Yn2, a2);
/* The result is converted to 1.63, Yn2 variable is reused */
Yn2 = acc << shift;
/* Store the output in the destination buffer in 1.31 format. */
*pOut++ = (q31_t) (acc >> (32 - shift));
/* Read the fourth input into Xn, to reuse the value */
Xn = *pIn++;
/* The value is shifted to the MSB to perform 32x64 multiplication */
Xn = Xn << 32;
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
/* acc = b0 * x[n] */
acc = mult32x64(Xn, b0);
/* acc += b1 * x[n-1] */
acc += mult32x64(Xn1, b1);
/* acc += b[2] * x[n-2] */
acc += mult32x64(Xn2, b2);
/* acc += a1 * y[n-1] */
acc += mult32x64(Yn2, a1);
/* acc += a2 * y[n-2] */
acc += mult32x64(Yn1, a2);
/* The result is converted to 1.63, Yn1 variable is reused */
Yn1 = acc << shift;
/* Every time after the output is computed state should be updated. */
/* The states should be updated as: */
/* Xn2 = Xn1 */
/* Xn1 = Xn */
/* Yn2 = Yn1 */
/* Yn1 = acc */
Xn2 = Xn1;
Xn1 = Xn;
/* Store the output in the destination buffer in 1.31 format. */
*pOut++ = (q31_t) (acc >> (32 - shift));
/* decrement the loop counter */
sample--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
sample = (blockSize & 0x3u);
while(sample > 0u)
{
/* Read the input */
Xn = *pIn++;
/* The value is shifted to the MSB to perform 32x64 multiplication */
Xn = Xn << 32;
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
/* acc = b0 * x[n] */
acc = mult32x64(Xn, b0);
/* acc += b1 * x[n-1] */
acc += mult32x64(Xn1, b1);
/* acc += b[2] * x[n-2] */
acc += mult32x64(Xn2, b2);
/* acc += a1 * y[n-1] */
acc += mult32x64(Yn1, a1);
/* acc += a2 * y[n-2] */
acc += mult32x64(Yn2, a2);
/* Every time after the output is computed state should be updated. */
/* The states should be updated as: */
/* Xn2 = Xn1 */
/* Xn1 = Xn */
/* Yn2 = Yn1 */
/* Yn1 = acc */
Xn2 = Xn1;
Xn1 = Xn;
Yn2 = Yn1;
Yn1 = acc << shift;
/* Store the output in the destination buffer in 1.31 format. */
*pOut++ = (q31_t) (acc >> (32 - shift));
/* decrement the loop counter */
sample--;
}
/* The first stage output is given as input to the second stage. */
pIn = pDst;
/* Reset to destination buffer working pointer */
pOut = pDst;
/* Store the updated state variables back into the pState array */
*pState++ = Xn1;
*pState++ = Xn2;
*pState++ = Yn1;
*pState++ = Yn2;
} while(--stage);
#else
/* Run the below code for Cortex-M0 */
do
{
/* Reading the coefficients */
b0 = *pCoeffs++;
b1 = *pCoeffs++;
b2 = *pCoeffs++;
a1 = *pCoeffs++;
a2 = *pCoeffs++;
/* Reading the state values */
Xn1 = pState[0];
Xn2 = pState[1];
Yn1 = pState[2];
Yn2 = pState[3];
/* The variable acc hold output value that is being computed and
* stored in the destination buffer
* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
*/
sample = blockSize;
while(sample > 0u)
{
/* Read the input */
Xn = *pIn++;
/* The value is shifted to the MSB to perform 32x64 multiplication */
Xn = Xn << 32;
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
/* acc = b0 * x[n] */
acc = mult32x64(Xn, b0);
/* acc += b1 * x[n-1] */
acc += mult32x64(Xn1, b1);
/* acc += b[2] * x[n-2] */
acc += mult32x64(Xn2, b2);
/* acc += a1 * y[n-1] */
acc += mult32x64(Yn1, a1);
/* acc += a2 * y[n-2] */
acc += mult32x64(Yn2, a2);
/* Every time after the output is computed state should be updated. */
/* The states should be updated as: */
/* Xn2 = Xn1 */
/* Xn1 = Xn */
/* Yn2 = Yn1 */
/* Yn1 = acc */
Xn2 = Xn1;
Xn1 = Xn;
Yn2 = Yn1;
Yn1 = acc << shift;
/* Store the output in the destination buffer in 1.31 format. */
*pOut++ = (q31_t) (acc >> (32 - shift));
/* decrement the loop counter */
sample--;
}
/* The first stage output is given as input to the second stage. */
pIn = pDst;
/* Reset to destination buffer working pointer */
pOut = pDst;
/* Store the updated state variables back into the pState array */
*pState++ = Xn1;
*pState++ = Xn2;
*pState++ = Yn1;
*pState++ = Yn2;
} while(--stage);
#endif /* #ifndef ARM_MATH_CM0 */
}
/**
* @} end of BiquadCascadeDF1_32x64 group
*/

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