From c44104b301330df42b0e9eb39e882fd78ddb7bf6 Mon Sep 17 00:00:00 2001 From: tkl Date: Tue, 9 Aug 2016 11:20:33 +0200 Subject: [PATCH] wip --- source/test/pwm/main.c | 133 ++++++++++++++++------------------------- 1 file changed, 52 insertions(+), 81 deletions(-) diff --git a/source/test/pwm/main.c b/source/test/pwm/main.c index 6e381a3..fde0061 100644 --- a/source/test/pwm/main.c +++ b/source/test/pwm/main.c @@ -18,6 +18,13 @@ #include "stm32f4xx.h" +enum stm32f4_pwm_channel { + channel_1 = 1, + channel_2, + channel_3, + channel_4 +}; + struct stm32f4_pwm { TIM_TypeDef *timer; const TIM_TimeBaseInitTypeDef *timer_cfg; @@ -26,14 +33,18 @@ struct stm32f4_pwm { GPIO_TypeDef *port; uint8_t pin_src; const GPIO_InitTypeDef *port_cfg; + enum stm32f4_pwm_channel channel; }; +/* apb1 clock = 84MHz */ +/* period_reg = src_clk / presc / cnt_clk */ +/* 4199 = 84MHZ / (0 + 1) / 20kHz - 1 */ static const TIM_TimeBaseInitTypeDef timer_4_cfg = { .TIM_RepetitionCounter = 0x0000, - .TIM_Prescaler = ((168000000 / 2 ) / 1000000) - 1, + .TIM_Prescaler = 0, .TIM_ClockDivision = TIM_CKD_DIV1, .TIM_CounterMode = TIM_CounterMode_Up, - .TIM_Period = 20000 + .TIM_Period = 4199 }; static const TIM_OCInitTypeDef t4_output_compare_cfg = { @@ -44,109 +55,69 @@ static const TIM_OCInitTypeDef t4_output_compare_cfg = { .TIM_OCMode = TIM_OCMode_PWM1, .TIM_OCPolarity = TIM_OCPolarity_High, .TIM_OutputState = TIM_OutputState_Enable, - .TIM_Pulse = 1500 // Initiale Pulsweite in Millisekunden -}; - -static const TIM_BDTRInitTypeDef t4_bdtr_cfg = { - .TIM_OSSRState = TIM_OSSRState_Disable, - .TIM_OSSIState = TIM_OSSIState_Disable, - .TIM_LOCKLevel = TIM_LOCKLevel_OFF, - .TIM_DeadTime = 0x00, - .TIM_Break = TIM_Break_Disable, - .TIM_BreakPolarity = TIM_BreakPolarity_Low, - .TIM_AutomaticOutput = TIM_AutomaticOutput_Disable, - - - .TIM_AutomaticOutput = TIM_AutomaticOutput_Enable, + .TIM_Pulse = 0 // Initiale Pulsweite in Millisekunden }; static const GPIO_InitTypeDef port_cfg = { - .GPIO_Pin = GPIO_Pin_12, + .GPIO_Pin = GPIO_Pin_15, .GPIO_Mode = GPIO_Mode_AF, .GPIO_OType = GPIO_OType_PP, .GPIO_PuPd = GPIO_PuPd_UP, - .GPIO_Speed = GPIO_Speed_50MHz, + .GPIO_Speed = GPIO_Speed_100MHz, }; static struct stm32f4_pwm str32f4_pwm = { .timer = TIM4, .timer_cfg = &timer_4_cfg, .output_compare_cfg = &t4_output_compare_cfg, - .bdtr_cfg = &t4_bdtr_cfg, .port = GPIOD, - .pin_src = GPIO_PinSource12, + .pin_src = GPIO_PinSource15, .port_cfg = &port_cfg, + .channel = channel_4, }; extern uint32_t SystemCoreClock; void pwm_open(struct stm32f4_pwm *pwm) { - TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; - TIM_OCInitTypeDef TIM_OCInitStructure; - - /* TIM config */ - GPIO_InitTypeDef GPIO_InitStructure; - - /* TIM4 clock enable */ - RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE); + uint32_t clk_ahb_timer = 0, clk_ahb_gpio = 0; + uint8_t gpio_af_timer = 0; + if(pwm->timer == TIM4) { + clk_ahb_timer = RCC_APB1Periph_TIM4; + gpio_af_timer = GPIO_AF_TIM4; + } + RCC_APB1PeriphClockCmd(clk_ahb_timer, ENABLE); + if(pwm->port == GPIOD) { + clk_ahb_gpio = RCC_AHB1Periph_GPIOD; + } /* LEDs are on GPIOD */ - RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; - GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; - GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP ; - GPIO_Init(GPIOD, &GPIO_InitStructure); - GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_TIM4); - GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_TIM4); - GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_TIM4); - GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_TIM4); - - /* pwm set up */ - /* Compute the prescaler value */ - uint16_t PrescalerValue = (uint16_t) ((SystemCoreClock /2) / 21000000) - 1; - - /* apb1 clock = 84MHz */ - /* period_reg = src_clk / presc / cnt_clk */ - /* 4199 = 84MHZ / (0 + 1) / 20kHz - 1 */ + RCC_AHB1PeriphClockCmd(clk_ahb_gpio, ENABLE); + GPIO_Init(pwm->port, (GPIO_InitTypeDef *)pwm->port_cfg); + GPIO_PinAFConfig(pwm->port, pwm->pin_src, gpio_af_timer); /* Time base configuration */ - TIM_TimeBaseStructure.TIM_Period = 4199;//665; - TIM_TimeBaseStructure.TIM_Prescaler = 0;//PrescalerValue; - TIM_TimeBaseStructure.TIM_ClockDivision = 1; - TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; - TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure); + TIM_TimeBaseInit(pwm->timer, (TIM_TimeBaseInitTypeDef *)pwm->timer_cfg); - /* PWM1 Mode configuration: Channel1 */ - TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; - TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; - TIM_OCInitStructure.TIM_Pulse = 0; - TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; - TIM_OC1Init(TIM4, &TIM_OCInitStructure); - TIM_OC1PreloadConfig(TIM4, TIM_OCPreload_Enable); - - /* PWM1 Mode configuration: Channel2 */ - TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; - TIM_OCInitStructure.TIM_Pulse = 0; - TIM_OC2Init(TIM4, &TIM_OCInitStructure); - TIM_OC2PreloadConfig(TIM4, TIM_OCPreload_Enable); - - /* PWM1 Mode configuration: Channel3 */ - TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; - TIM_OCInitStructure.TIM_Pulse = 0; - TIM_OC3Init(TIM4, &TIM_OCInitStructure); - TIM_OC3PreloadConfig(TIM4, TIM_OCPreload_Enable); - - /* PWM1 Mode configuration: Channel4 */ - TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; - TIM_OCInitStructure.TIM_Pulse = 0; - TIM_OC4Init(TIM4, &TIM_OCInitStructure); - TIM_OC4PreloadConfig(TIM4, TIM_OCPreload_Enable); - TIM_ARRPreloadConfig(TIM4, ENABLE); - - /* TIM4 enable counter */ - TIM_Cmd(TIM4, ENABLE); + switch(pwm->channel) { + case channel_1: + TIM_OC1Init(pwm->timer, (TIM_OCInitTypeDef *)pwm->output_compare_cfg); + TIM_OC1PreloadConfig(pwm->timer, TIM_OCPreload_Enable); + break; + case channel_2: + TIM_OC2Init(pwm->timer, (TIM_OCInitTypeDef *)pwm->output_compare_cfg); + TIM_OC2PreloadConfig(pwm->timer, TIM_OCPreload_Enable); + break; + case channel_3: + TIM_OC3Init(pwm->timer, (TIM_OCInitTypeDef *)pwm->output_compare_cfg); + TIM_OC3PreloadConfig(pwm->timer, TIM_OCPreload_Enable); + break; + case channel_4: + TIM_OC4Init(pwm->timer, (TIM_OCInitTypeDef *)pwm->output_compare_cfg); + TIM_OC4PreloadConfig(pwm->timer, TIM_OCPreload_Enable); + break; + } + TIM_ARRPreloadConfig(pwm->timer, ENABLE); + TIM_Cmd(pwm->timer, ENABLE); } #define TH_STACK_SIZE 256