/*
 * stm32f4_pwm.h
 *
 *  Created on: Aug 9, 2016
 *      Author: tkl
 */

#ifndef SOURCE_FIRMWARE_ARCH_STM32F4XX_DRIVER_INCLUDE_STM32F4_PWM_H_
#define SOURCE_FIRMWARE_ARCH_STM32F4XX_DRIVER_INCLUDE_STM32F4_PWM_H_

enum stm32f4_pwm_channel {
	channel_1 = 1,
	channel_2,
	channel_3,
	channel_4
};

struct stm32f4_pwm {
	TIM_TypeDef *timer;
	const TIM_TimeBaseInitTypeDef *timer_cfg;
	const TIM_OCInitTypeDef *output_compare_cfg;
	const TIM_BDTRInitTypeDef *bdtr_cfg;
	GPIO_TypeDef *port;
	uint8_t pin_src;
	const GPIO_InitTypeDef *port_cfg;
	enum stm32f4_pwm_channel channel;
};


int stm32f4_pwm_open(struct stm32f4_pwm *pwm);
int stm32f4_pwm_close(struct stm32f4_pwm *pwm);
int stm32f4_pwm_set_duty_cycle(struct stm32f4_pwm *pwm, unsigned int duty_cycle_percent);

#endif /* SOURCE_FIRMWARE_ARCH_STM32F4XX_DRIVER_INCLUDE_STM32F4_PWM_H_ */