kosmos/source/test/pwm/main.c
2016-08-09 11:20:33 +02:00

153 lines
3.8 KiB
C

/*
* main.c
*
* Created on: Aug 2, 2016
* Author: tkl
*/
#include <stdbool.h>
#include "driver.h"
#include "board.h"
#include "stack.h"
#include "queue.h"
#include "kernel.h"
#include "driver.h"
#include "list.h"
#include "shell.h"
#include "stm32f4xx.h"
enum stm32f4_pwm_channel {
channel_1 = 1,
channel_2,
channel_3,
channel_4
};
struct stm32f4_pwm {
TIM_TypeDef *timer;
const TIM_TimeBaseInitTypeDef *timer_cfg;
const TIM_OCInitTypeDef *output_compare_cfg;
const TIM_BDTRInitTypeDef *bdtr_cfg;
GPIO_TypeDef *port;
uint8_t pin_src;
const GPIO_InitTypeDef *port_cfg;
enum stm32f4_pwm_channel channel;
};
/* apb1 clock = 84MHz */
/* period_reg = src_clk / presc / cnt_clk */
/* 4199 = 84MHZ / (0 + 1) / 20kHz - 1 */
static const TIM_TimeBaseInitTypeDef timer_4_cfg = {
.TIM_RepetitionCounter = 0x0000,
.TIM_Prescaler = 0,
.TIM_ClockDivision = TIM_CKD_DIV1,
.TIM_CounterMode = TIM_CounterMode_Up,
.TIM_Period = 4199
};
static const TIM_OCInitTypeDef t4_output_compare_cfg = {
.TIM_OutputNState = TIM_OutputNState_Disable,
.TIM_OCNPolarity = TIM_OCPolarity_High,
.TIM_OCIdleState = TIM_OCIdleState_Reset,
.TIM_OCNIdleState = TIM_OCNIdleState_Set,
.TIM_OCMode = TIM_OCMode_PWM1,
.TIM_OCPolarity = TIM_OCPolarity_High,
.TIM_OutputState = TIM_OutputState_Enable,
.TIM_Pulse = 0 // Initiale Pulsweite in Millisekunden
};
static const GPIO_InitTypeDef port_cfg = {
.GPIO_Pin = GPIO_Pin_15,
.GPIO_Mode = GPIO_Mode_AF,
.GPIO_OType = GPIO_OType_PP,
.GPIO_PuPd = GPIO_PuPd_UP,
.GPIO_Speed = GPIO_Speed_100MHz,
};
static struct stm32f4_pwm str32f4_pwm = {
.timer = TIM4,
.timer_cfg = &timer_4_cfg,
.output_compare_cfg = &t4_output_compare_cfg,
.port = GPIOD,
.pin_src = GPIO_PinSource15,
.port_cfg = &port_cfg,
.channel = channel_4,
};
extern uint32_t SystemCoreClock;
void pwm_open(struct stm32f4_pwm *pwm)
{
uint32_t clk_ahb_timer = 0, clk_ahb_gpio = 0;
uint8_t gpio_af_timer = 0;
if(pwm->timer == TIM4) {
clk_ahb_timer = RCC_APB1Periph_TIM4;
gpio_af_timer = GPIO_AF_TIM4;
}
RCC_APB1PeriphClockCmd(clk_ahb_timer, ENABLE);
if(pwm->port == GPIOD) {
clk_ahb_gpio = RCC_AHB1Periph_GPIOD;
}
/* LEDs are on GPIOD */
RCC_AHB1PeriphClockCmd(clk_ahb_gpio, ENABLE);
GPIO_Init(pwm->port, (GPIO_InitTypeDef *)pwm->port_cfg);
GPIO_PinAFConfig(pwm->port, pwm->pin_src, gpio_af_timer);
/* Time base configuration */
TIM_TimeBaseInit(pwm->timer, (TIM_TimeBaseInitTypeDef *)pwm->timer_cfg);
switch(pwm->channel) {
case channel_1:
TIM_OC1Init(pwm->timer, (TIM_OCInitTypeDef *)pwm->output_compare_cfg);
TIM_OC1PreloadConfig(pwm->timer, TIM_OCPreload_Enable);
break;
case channel_2:
TIM_OC2Init(pwm->timer, (TIM_OCInitTypeDef *)pwm->output_compare_cfg);
TIM_OC2PreloadConfig(pwm->timer, TIM_OCPreload_Enable);
break;
case channel_3:
TIM_OC3Init(pwm->timer, (TIM_OCInitTypeDef *)pwm->output_compare_cfg);
TIM_OC3PreloadConfig(pwm->timer, TIM_OCPreload_Enable);
break;
case channel_4:
TIM_OC4Init(pwm->timer, (TIM_OCInitTypeDef *)pwm->output_compare_cfg);
TIM_OC4PreloadConfig(pwm->timer, TIM_OCPreload_Enable);
break;
}
TIM_ARRPreloadConfig(pwm->timer, ENABLE);
TIM_Cmd(pwm->timer, ENABLE);
}
#define TH_STACK_SIZE 256
stack_t th_stack[TH_STACK_SIZE];
struct thread_context th_ctx;
static void th_func(void *arg)
{
uint32_t brightness = 4200 / 2;
TIM4->CCR4 = brightness;
while(1) {
brightness++;
if(brightness == UINT32_MAX)
brightness = 0;
#if 0
TIM4->CCR3 = 333 - (brightness + 0) % 333; // set brightness
TIM4->CCR4 = 333 - (brightness + 166/2) % 333; // set brightness
TIM4->CCR1 = 333 - (brightness + 333/2) % 333; // set brightness
TIM4->CCR2 = 333 - (brightness + 499/2) % 333; // set brightness
#endif
sleep_ms(1);
}
}
int main(void)
{
pwm_open(&str32f4_pwm);
thread_create(&th_ctx, th_stack, TH_STACK_SIZE, th_func, NULL, THREAD_PRIO_LOW);
schedule_start();
return 0;
}