multi-app based on nrf52sdk
This commit is contained in:
Thomas Klaehn
parent
2bea1ae46a
commit
0b5e799aae
7
Makefile
7
Makefile
@ -1,8 +1,8 @@
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.DEFAULT_GOAL := all
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APPLICATION ?= button
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APPLICATION ?= blinky
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PLATFORM ?= posix
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PLATFORM ?= nrf52
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TARGET_FILE ?= $(APPLICATION).elf
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CC = $(CROSS_COMPILE)gcc
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@ -27,6 +27,7 @@ TARGET_PACKAGE = $(patsubst %.hex,%.zip,$(TARGET_HEX))
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THIS_MAKEFILE := $(lastword $(MAKEFILE_LIST))
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INCLUDES += include/
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INCLUDES += include/application/$(APPLICATION)
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OPT = 3
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C_FLAGS += -O$(OPT) -g$(OPT)
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@ -35,7 +36,7 @@ C_FLAGS += -ffunction-sections -fdata-sections -fno-strict-aliasing
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LIBS += c nosys m
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include Makefile.$(PLATFORM)
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include config/build/$(PLATFORM)/$(APPLICATION)/Makefile.$(APPLICATION)
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.PHONY: all install uninstall clean distclean debug
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all: $(TARGET)
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@ -26,6 +26,32 @@ INCLUDES += $(NRF_PATH)components/libraries/memobj/
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INCLUDES += $(NRF_PATH)components/softdevice/common/
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INCLUDES += $(NRF_PATH)external/fprintf/
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INCLUDES += $(NRF_PATH)components/libraries/log/src/
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INCLUDES += $(NRF_PATH)components/libraries/bootloader/
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INCLUDES += $(NRF_PATH)components/libraries/bootloader/dfu/
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INCLUDES += $(NRF_PATH)components/libraries/scheduler/
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INCLUDES += $(NRF_PATH)external/nano-pb/
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INCLUDES += $(NRF_PATH)components/libraries/crc32/
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INCLUDES += $(NRF_PATH)components/libraries/fstorage/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/cc310/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/cc310_bl/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/mbedtls/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/oberon/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/micro_ecc/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/optiga/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/nrf_sw/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/nrf_hw/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/cifra/
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INCLUDES += $(NRF_PATH)components/libraries/sha256/
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INCLUDES += $(NRF_PATH)components/ble/ble_services/ble_escs/
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INCLUDES += $(NRF_PATH)components/ble/common/
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INCLUDES += $(NRF_PATH)components/ble/ble_services/eddystone/
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INCLUDES += $(NRF_PATH)components/libraries/timer/
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INCLUDES += $(NRF_PATH)examples/ble_peripheral/ble_app_eddystone/
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INCLUDES += $(NRF_PATH)components/libraries/fds/
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INCLUDES += $(NRF_PATH)external/cifra_AES128-EAX/
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INCLUDES += $(NRF_PATH)external/micro-ecc/micro-ecc/
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NRF_C_SRCS += $(NRF_PATH)components/boards/boards.c
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NRF_C_SRCS += $(NRF_PATH)modules/nrfx/mdk/system_nrf52.c
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@ -73,7 +99,8 @@ A_FLAGS += -DSOFTDEVICE_PRESENT
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A_FLAGS += -D__HEAP_SIZE=8192
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A_FLAGS += -D__HEAP_SIZE=8192
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LINKER_SCRIPT = blinky_gcc_nrf52.ld
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LINKER_SCRIPT = config/build/$(PLATFORM)/$(APPLICATION)/linker.ld
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# Linker flags
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LD_FLAGS += -O$(OPT) -g$(OPT)
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LD_FLAGS += -mthumb -mabi=aapcs -L$(NRF_PATH)modules/nrfx/mdk -T$(LINKER_SCRIPT)
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141
config/build/nrf52/button/Makefile.button
Normal file
141
config/build/nrf52/button/Makefile.button
Normal file
@ -0,0 +1,141 @@
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CPU = cortex-m4
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CROSS_COMPILE ?= arm-none-eabi-
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NRF_PATH := nrf5sdk/
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INCLUDES += $(NRF_PATH)components/
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INCLUDES += $(NRF_PATH)modules/nrfx/mdk/
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INCLUDES += $(NRF_PATH)components/libraries/strerror/
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INCLUDES += $(NRF_PATH)components/softdevice/s132/headers/nrf52/
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INCLUDES += $(NRF_PATH)components/toolchain/cmsis/include/
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INCLUDES += $(NRF_PATH)components/libraries/util/
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INCLUDES += $(NRF_PATH)components/libraries/balloc/
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INCLUDES += $(NRF_PATH)components/libraries/ringbuf/
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INCLUDES += $(NRF_PATH)modules/nrfx/hal/
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INCLUDES += $(NRF_PATH)components/libraries/bsp/
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INCLUDES += $(NRF_PATH)components/libraries/log/
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INCLUDES += $(NRF_PATH)modules/nrfx/
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INCLUDES += $(NRF_PATH)modules/nrfx/drivers/include/
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INCLUDES += $(NRF_PATH)components/libraries/experimental_section_vars/
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INCLUDES += $(NRF_PATH)components/softdevice/s132/headers/
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INCLUDES += $(NRF_PATH)components/libraries/delay/
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INCLUDES += $(NRF_PATH)integration/nrfx/
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INCLUDES += $(NRF_PATH)integration/nrfx/legacy/
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INCLUDES += $(NRF_PATH)components/libraries/atomic/
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INCLUDES += $(NRF_PATH)components/boards/
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INCLUDES += $(NRF_PATH)components/libraries/memobj/
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INCLUDES += $(NRF_PATH)components/softdevice/common/
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INCLUDES += $(NRF_PATH)external/fprintf/
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INCLUDES += $(NRF_PATH)components/libraries/log/src/
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INCLUDES += $(NRF_PATH)components/libraries/bootloader/
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INCLUDES += $(NRF_PATH)components/libraries/bootloader/dfu/
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INCLUDES += $(NRF_PATH)components/libraries/scheduler/
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INCLUDES += $(NRF_PATH)external/nano-pb/
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INCLUDES += $(NRF_PATH)components/libraries/crc32/
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INCLUDES += $(NRF_PATH)components/libraries/fstorage/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/cc310/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/cc310_bl/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/mbedtls/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/oberon/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/micro_ecc/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/optiga/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/nrf_sw/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/nrf_hw/
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INCLUDES += $(NRF_PATH)components/libraries/crypto/backend/cifra/
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INCLUDES += $(NRF_PATH)components/libraries/sha256/
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INCLUDES += $(NRF_PATH)components/ble/ble_services/ble_escs/
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INCLUDES += $(NRF_PATH)components/ble/common/
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INCLUDES += $(NRF_PATH)components/ble/ble_services/eddystone/
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INCLUDES += $(NRF_PATH)components/libraries/timer/
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INCLUDES += $(NRF_PATH)examples/ble_peripheral/ble_app_eddystone/
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INCLUDES += $(NRF_PATH)components/libraries/fds/
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INCLUDES += $(NRF_PATH)external/cifra_AES128-EAX/
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INCLUDES += $(NRF_PATH)external/micro-ecc/micro-ecc/
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NRF_C_SRCS += $(NRF_PATH)components/boards/boards.c
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NRF_C_SRCS += $(NRF_PATH)modules/nrfx/mdk/system_nrf52.c
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NRF_C_SRCS += $(NRF_PATH)modules/nrfx/drivers/src/nrfx_gpiote.c
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NRF_C_SRCS += $(NRF_PATH)components/libraries/util/app_error.c
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NRF_C_SRCS += $(NRF_PATH)components/libraries/util/app_error_weak.c
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NRF_C_OBJS = $(patsubst $(NRF_PATH)%,$(OBJ_DIR)/%,$(patsubst %.c,%.o,$(NRF_C_SRCS)))
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NRF_A_SRCS = $(NRF_PATH)modules/nrfx/mdk/gcc_startup_nrf52.S
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NRF_A_OBJS = $(patsubst $(NRF_PATH)%,$(OBJ_DIR)/%,$(patsubst %.S,%.o,$(NRF_A_SRCS)))
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C_FLAGS += -DBOARD_PCA10040
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C_FLAGS += -DBSP_DEFINES_ONLY
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C_FLAGS += -DCONFIG_GPIO_AS_PINRESET
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C_FLAGS += -DFLOAT_ABI_HARD
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C_FLAGS += -DNRF52
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C_FLAGS += -DNRF52832_XXAA
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C_FLAGS += -DNRF52_PAN_74
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C_FLAGS += -DNRF_SD_BLE_API_VERSION=7
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C_FLAGS += -DS132
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C_FLAGS += -DSOFTDEVICE_PRESENT
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C_FLAGS += -mcpu=$(CPU)
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C_FLAGS += -mthumb -mabi=aapcs
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C_FLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16
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C_FLAGS += -fno-builtin -fshort-enums
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C_FLAGS += -D__HEAP_SIZE=8192
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C_FLAGS += -D__HEAP_SIZE=8192
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# Assembler flags common to all targets
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A_FLAGS += -g$(OPT)
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A_FLAGS += -mcpu=$(CPU)
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A_FLAGS += -mthumb -mabi=aapcs
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A_FLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16
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A_FLAGS += -DBOARD_PCA10040
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A_FLAGS += -DBSP_DEFINES_ONLY
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A_FLAGS += -DCONFIG_GPIO_AS_PINRESET
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A_FLAGS += -DFLOAT_ABI_HARD
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A_FLAGS += -DNRF52
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A_FLAGS += -DNRF52832_XXAA
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A_FLAGS += -DNRF52_PAN_74
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A_FLAGS += -DNRF_SD_BLE_API_VERSION=7
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A_FLAGS += -DS132
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A_FLAGS += -DSOFTDEVICE_PRESENT
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A_FLAGS += -D__HEAP_SIZE=8192
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A_FLAGS += -D__HEAP_SIZE=8192
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LINKER_SCRIPT = config/build/$(PLATFORM)/$(APPLICATION)/linker.ld
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# Linker flags
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LD_FLAGS += -O$(OPT) -g$(OPT)
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LD_FLAGS += -mthumb -mabi=aapcs -L$(NRF_PATH)modules/nrfx/mdk -T$(LINKER_SCRIPT)
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LD_FLAGS += -mcpu=$(CPU)
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LD_FLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16
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LD_FLAGS += -Wl,--gc-sections
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LD_FLAGS += --specs=nano.specs
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.PHONY: package flash flash_softdevice erase
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package: $(TARGET_HEX)
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nrfutil pkg generate --hw-version 52 --application-version 1 --application $(TARGET_HEX) --sd-req 0xCB --sd-id 0xCB --key-file keys/private.key $(TARGET_PACKAGE)
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flash: $(TARGET_HEX)
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@echo Flashing: $(TARGET_HEX)
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nrfjprog -f nrf52 --program $(TARGET_HEX) --sectorerase
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nrfjprog -f nrf52 --reset
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flash_softdevice: $(THIS_MAKEFILE)
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@echo Flashing: $(NRF_PATH)/components/softdevice/s132/hex/s132_nrf52_7.0.1_softdevice.hex
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nrfjprog -f nrf52 --program $(NRF_PATH)/components/softdevice/s132/hex/s132_nrf52_7.0.1_softdevice.hex --sectorerase
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nrfjprog -f nrf52 --reset
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erase:
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nrfjprog -f nrf52 --eraseall
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$(OBJ_DIR)/%.d: $(NRF_PATH)/%.S $(THIS_MAKEFILE)
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@mkdir -p $(dir $@)
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$(CPP) -MM -MF $@ -MP -MT $(patsubst %.d,%.o,$@) $(C_FLAGS) $(CPP_FLAGS) $(patsubst $(OBJ_DIR)/%.d,$(NRF_PATH)/%.S,$@)
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$(OBJ_DIR)/%.o: $(NRF_PATH)/%.c $(THIS_MAKEFILE)
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@mkdir -p $(dir $@)
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$(CC) -std=c99 -MP -MD -c -o $@ $< $(C_FLAGS) $(CPP_FLAGS)
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$(OBJ_DIR)/%.o: $(NRF_PATH)/%.S $(THIS_MAKEFILE)
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@mkdir -p $(dir $@)
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$(CC) -c $(ASMFLAGS) $< -o $@
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64
config/build/nrf52/button/linker.ld
Normal file
64
config/build/nrf52/button/linker.ld
Normal file
@ -0,0 +1,64 @@
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/* Linker script to configure memory regions. */
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SEARCH_DIR(.)
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GROUP(-lgcc -lc -lnosys)
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x80000
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RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x10000
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}
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SECTIONS
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{
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}
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SECTIONS
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{
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. = ALIGN(4);
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.mem_section_dummy_ram :
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{
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}
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.log_dynamic_data :
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{
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PROVIDE(__start_log_dynamic_data = .);
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KEEP(*(SORT(.log_dynamic_data*)))
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PROVIDE(__stop_log_dynamic_data = .);
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} > RAM
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.log_filter_data :
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{
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PROVIDE(__start_log_filter_data = .);
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KEEP(*(SORT(.log_filter_data*)))
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PROVIDE(__stop_log_filter_data = .);
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} > RAM
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} INSERT AFTER .data;
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SECTIONS
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{
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.mem_section_dummy_rom :
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{
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}
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.log_const_data :
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{
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PROVIDE(__start_log_const_data = .);
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KEEP(*(SORT(.log_const_data*)))
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PROVIDE(__stop_log_const_data = .);
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} > FLASH
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.log_backends :
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{
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PROVIDE(__start_log_backends = .);
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KEEP(*(SORT(.log_backends*)))
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PROVIDE(__stop_log_backends = .);
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} > FLASH
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.nrf_balloc :
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{
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PROVIDE(__start_nrf_balloc = .);
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KEEP(*(.nrf_balloc))
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PROVIDE(__stop_nrf_balloc = .);
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} > FLASH
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} INSERT AFTER .text
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INCLUDE "nrf_common.ld"
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@ -46,119 +46,6 @@
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#ifdef USE_APP_CONFIG
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#include "app_config.h"
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#endif
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// <h> nRF_Drivers
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//==========================================================
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// <e> GPIOTE_ENABLED - nrf_drv_gpiote - GPIOTE peripheral driver - legacy layer
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//==========================================================
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#ifndef GPIOTE_ENABLED
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#define GPIOTE_ENABLED 1
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#endif
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// <o> GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins
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#ifndef GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS
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#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
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#endif
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// <o> GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority
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// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
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// <0=> 0 (highest)
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// <1=> 1
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// <2=> 2
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// <3=> 3
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// <4=> 4
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// <5=> 5
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// <6=> 6
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// <7=> 7
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#ifndef GPIOTE_CONFIG_IRQ_PRIORITY
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#define GPIOTE_CONFIG_IRQ_PRIORITY 6
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#endif
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// </e>
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// <e> NRFX_GPIOTE_ENABLED - nrfx_gpiote - GPIOTE peripheral driver
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//==========================================================
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#ifndef NRFX_GPIOTE_ENABLED
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#define NRFX_GPIOTE_ENABLED 1
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#endif
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// <o> NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins
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#ifndef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS
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#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
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#endif
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// <o> NRFX_GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority
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// <0=> 0 (highest)
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// <1=> 1
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// <2=> 2
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// <3=> 3
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// <4=> 4
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// <5=> 5
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// <6=> 6
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// <7=> 7
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#ifndef NRFX_GPIOTE_CONFIG_IRQ_PRIORITY
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#define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY 6
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#endif
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// <e> NRFX_GPIOTE_CONFIG_LOG_ENABLED - Enables logging in the module.
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//==========================================================
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#ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED
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#define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0
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#endif
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// <o> NRFX_GPIOTE_CONFIG_LOG_LEVEL - Default Severity level
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// <0=> Off
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// <1=> Error
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// <2=> Warning
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// <3=> Info
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// <4=> Debug
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#ifndef NRFX_GPIOTE_CONFIG_LOG_LEVEL
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#define NRFX_GPIOTE_CONFIG_LOG_LEVEL 3
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#endif
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// <o> NRFX_GPIOTE_CONFIG_INFO_COLOR - ANSI escape code prefix.
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// <0=> Default
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// <1=> Black
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// <2=> Red
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// <3=> Green
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// <4=> Yellow
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// <5=> Blue
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// <6=> Magenta
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// <7=> Cyan
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// <8=> White
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#ifndef NRFX_GPIOTE_CONFIG_INFO_COLOR
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#define NRFX_GPIOTE_CONFIG_INFO_COLOR 0
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#endif
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// <o> NRFX_GPIOTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
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// <0=> Default
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// <1=> Black
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// <2=> Red
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// <3=> Green
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// <4=> Yellow
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// <5=> Blue
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// <6=> Magenta
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// <7=> Cyan
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// <8=> White
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#ifndef NRFX_GPIOTE_CONFIG_DEBUG_COLOR
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#define NRFX_GPIOTE_CONFIG_DEBUG_COLOR 0
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#endif
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// </e>
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// </e>
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// </h>
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//==========================================================
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// <h> nRF_Libraries
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|
||||
//==========================================================
|
||||
3230
include/application/button/sdk_config.h
Normal file
3230
include/application/button/sdk_config.h
Normal file
File diff suppressed because it is too large
Load Diff
@ -1,8 +0,0 @@
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#ifdef BOARD_PCA10040
|
||||
#include "platform/narf52/narf52_dk.h"
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@ -1,34 +0,0 @@
|
||||
#ifndef __DRIVER_H__
|
||||
#define __DRIVER_H__
|
||||
|
||||
#include <stdarg.h>
|
||||
|
||||
struct driver;
|
||||
|
||||
typedef int (*fp_open_t)(const struct driver *);
|
||||
typedef int (*fp_close_t)(const struct driver *);
|
||||
typedef int (*fp_read_t)(const struct driver *, char *, unsigned int);
|
||||
typedef int (*fp_write_t)(const struct driver *, const char *, unsigned int);
|
||||
typedef int (*fp_ioctl_t)(const struct driver *, unsigned int, unsigned int argc, va_list);
|
||||
|
||||
struct driver_fp {
|
||||
fp_open_t open;
|
||||
fp_close_t close;
|
||||
fp_read_t read;
|
||||
fp_write_t write;
|
||||
fp_ioctl_t ioctl;
|
||||
};
|
||||
|
||||
struct driver {
|
||||
const char *name;
|
||||
const struct driver_fp *fp;
|
||||
const void *dev;
|
||||
};
|
||||
|
||||
int drv_open(const struct driver *drv);
|
||||
int drv_close(const struct driver *drv);
|
||||
int drv_read(const struct driver *drv, char *buffer, unsigned int length);
|
||||
int drv_write(const struct driver *drv, const char *buffer, unsigned int length);
|
||||
int drv_ioctl(const struct driver *drv, unsigned int cmd, unsigned int argc, ...);
|
||||
|
||||
#endif
|
||||
@ -1,23 +0,0 @@
|
||||
#ifndef __GPIO_H__
|
||||
#define __GPIO_H__
|
||||
|
||||
#include <stdarg.h>
|
||||
|
||||
#include "driver.h"
|
||||
|
||||
int gpio_open(const struct driver *drv);
|
||||
int gpio_close(const struct driver *drv);
|
||||
|
||||
int gpio_read(const struct driver *drv, char *buffer, unsigned int len);
|
||||
int gpio_write(const struct driver *drv, const char *buffer, unsigned int len);
|
||||
int gpio_ioctl(const struct driver *drv, unsigned int cmd, unsigned int argc, va_list args);
|
||||
|
||||
static const struct driver_fp gpio_fp = {
|
||||
.open = gpio_open,
|
||||
.close = gpio_close,
|
||||
.read = gpio_read,
|
||||
.write = gpio_write,
|
||||
.ioctl = gpio_ioctl
|
||||
};
|
||||
|
||||
#endif
|
||||
@ -1,100 +0,0 @@
|
||||
#ifndef __PLATFORM_NARF52_NARF52_H__
|
||||
#define __PLATFORM_NARF52_NARF52_H__
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
typedef enum {
|
||||
/* ======================================= ARM Cortex-M4 Specific Interrupt Numbers ======================================== */
|
||||
Reset_IRQn = -15, /*!< -15 Reset Vector, invoked on Power up and warm reset */
|
||||
NonMaskableInt_IRQn = -14, /*!< -14 Non maskable Interrupt, cannot be stopped or preempted */
|
||||
HardFault_IRQn = -13, /*!< -13 Hard Fault, all classes of Fault */
|
||||
MemoryManagement_IRQn = -12, /*!< -12 Memory Management, MPU mismatch, including Access Violation
|
||||
and No Match */
|
||||
BusFault_IRQn = -11, /*!< -11 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory
|
||||
related Fault */
|
||||
UsageFault_IRQn = -10, /*!< -10 Usage Fault, i.e. Undef Instruction, Illegal State Transition */
|
||||
SVCall_IRQn = -5, /*!< -5 System Service Call via SVC instruction */
|
||||
DebugMonitor_IRQn = -4, /*!< -4 Debug Monitor */
|
||||
PendSV_IRQn = -2, /*!< -2 Pendable request for system service */
|
||||
SysTick_IRQn = -1, /*!< -1 System Tick Timer */
|
||||
/* =========================================== nrf52 Specific Interrupt Numbers ============================================ */
|
||||
POWER_CLOCK_IRQn = 0, /*!< 0 POWER_CLOCK */
|
||||
RADIO_IRQn = 1, /*!< 1 RADIO */
|
||||
UARTE0_UART0_IRQn = 2, /*!< 2 UARTE0_UART0 */
|
||||
SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn= 3, /*!< 3 SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0 */
|
||||
SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn= 4, /*!< 4 SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1 */
|
||||
NFCT_IRQn = 5, /*!< 5 NFCT */
|
||||
GPIOTE_IRQn = 6, /*!< 6 GPIOTE */
|
||||
SAADC_IRQn = 7, /*!< 7 SAADC */
|
||||
TIMER0_IRQn = 8, /*!< 8 TIMER0 */
|
||||
TIMER1_IRQn = 9, /*!< 9 TIMER1 */
|
||||
TIMER2_IRQn = 10, /*!< 10 TIMER2 */
|
||||
RTC0_IRQn = 11, /*!< 11 RTC0 */
|
||||
TEMP_IRQn = 12, /*!< 12 TEMP */
|
||||
RNG_IRQn = 13, /*!< 13 RNG */
|
||||
ECB_IRQn = 14, /*!< 14 ECB */
|
||||
CCM_AAR_IRQn = 15, /*!< 15 CCM_AAR */
|
||||
WDT_IRQn = 16, /*!< 16 WDT */
|
||||
RTC1_IRQn = 17, /*!< 17 RTC1 */
|
||||
QDEC_IRQn = 18, /*!< 18 QDEC */
|
||||
COMP_LPCOMP_IRQn = 19, /*!< 19 COMP_LPCOMP */
|
||||
SWI0_EGU0_IRQn = 20, /*!< 20 SWI0_EGU0 */
|
||||
SWI1_EGU1_IRQn = 21, /*!< 21 SWI1_EGU1 */
|
||||
SWI2_EGU2_IRQn = 22, /*!< 22 SWI2_EGU2 */
|
||||
SWI3_EGU3_IRQn = 23, /*!< 23 SWI3_EGU3 */
|
||||
SWI4_EGU4_IRQn = 24, /*!< 24 SWI4_EGU4 */
|
||||
SWI5_EGU5_IRQn = 25, /*!< 25 SWI5_EGU5 */
|
||||
TIMER3_IRQn = 26, /*!< 26 TIMER3 */
|
||||
TIMER4_IRQn = 27, /*!< 27 TIMER4 */
|
||||
PWM0_IRQn = 28, /*!< 28 PWM0 */
|
||||
PDM_IRQn = 29, /*!< 29 PDM */
|
||||
MWU_IRQn = 32, /*!< 32 MWU */
|
||||
PWM1_IRQn = 33, /*!< 33 PWM1 */
|
||||
PWM2_IRQn = 34, /*!< 34 PWM2 */
|
||||
SPIM2_SPIS2_SPI2_IRQn = 35, /*!< 35 SPIM2_SPIS2_SPI2 */
|
||||
RTC2_IRQn = 36, /*!< 36 RTC2 */
|
||||
I2S_IRQn = 37, /*!< 37 I2S */
|
||||
FPU_IRQn = 38 /*!< 38 FPU */
|
||||
} IRQn_Type;
|
||||
|
||||
|
||||
/* =========================================================================================================================== */
|
||||
/* ================ Processor and Core Peripheral Section ================ */
|
||||
/* =========================================================================================================================== */
|
||||
|
||||
/* =========================== Configuration of the ARM Cortex-M4 Processor and Core Peripherals =========================== */
|
||||
#define __CM4_REV 0x0001U /*!< CM4 Core Revision */
|
||||
#define __DSP_PRESENT 0 /*!< DSP present or not */
|
||||
#define __VTOR_PRESENT 1 /*!< Set to 1 if CPU supports Vector Table Offset Register */
|
||||
#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */
|
||||
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
|
||||
#define __MPU_PRESENT 1 /*!< MPU present */
|
||||
#define __FPU_PRESENT 1 /*!< FPU present */
|
||||
|
||||
#include "core_cm4.h"
|
||||
|
||||
struct narf52_gpio_type { /*!< (@ 0x50000000) P0 Structure */
|
||||
__IM uint32_t RESERVED[321];
|
||||
__IOM uint32_t OUT; /*!< (@ 0x00000504) Write GPIO port */
|
||||
__IOM uint32_t OUTSET; /*!< (@ 0x00000508) Set individual bits in GPIO port */
|
||||
__IOM uint32_t OUTCLR; /*!< (@ 0x0000050C) Clear individual bits in GPIO port */
|
||||
__IM uint32_t IN; /*!< (@ 0x00000510) Read GPIO port */
|
||||
__IOM uint32_t DIR; /*!< (@ 0x00000514) Direction of GPIO pins */
|
||||
__IOM uint32_t DIRSET; /*!< (@ 0x00000518) DIR set register */
|
||||
__IOM uint32_t DIRCLR; /*!< (@ 0x0000051C) DIR clear register */
|
||||
__IOM uint32_t LATCH; /*!< (@ 0x00000520) Latch register indicating what GPIO pins that
|
||||
have met the criteria set in the PIN_CNF[n].SENSE
|
||||
registers */
|
||||
__IOM uint32_t DETECTMODE; /*!< (@ 0x00000524) Select between default DETECT signal behaviour
|
||||
and LDETECT mode */
|
||||
__IM uint32_t RESERVED1[118];
|
||||
__IOM uint32_t PIN_CNF[32]; /*!< (@ 0x00000700) Description collection[0]: Configuration of GPIO
|
||||
pins */
|
||||
}; /*!< Size = 1920 (0x780) */
|
||||
|
||||
|
||||
|
||||
#define NARF_P0_BASE 0x50000000UL
|
||||
|
||||
|
||||
#endif
|
||||
@ -1,131 +0,0 @@
|
||||
#ifndef __PLATFORM_NARF52_NARF52_DK_H
|
||||
#define __PLATFORM_NARF52_NARF52_DK_H
|
||||
|
||||
#include "gpio.h"
|
||||
#include "narf52_gpio.h"
|
||||
|
||||
#include "driver.h"
|
||||
|
||||
// LEDs
|
||||
const struct narf52_gpio narf_led_1 = {
|
||||
.pin_number = 17,
|
||||
.dir = NARF_GPIO_DIR_OUT,
|
||||
.input = NARF_GPIO_PIN_INPUT_DISCONNECT,
|
||||
.pull = NARF_GPIO_PIN_NOPULL,
|
||||
.drive = NARF_GPIO_PIN_S0S1,
|
||||
.sense = NARF_GPIO_PIN_NOSENSE,
|
||||
};
|
||||
|
||||
const struct driver led_1 = {
|
||||
.name = "LED_1",
|
||||
.fp = &gpio_fp,
|
||||
.dev = (void *)&narf_led_1,
|
||||
};
|
||||
|
||||
const struct narf52_gpio narf_led_2 = {
|
||||
.pin_number = 18,
|
||||
.dir = NARF_GPIO_DIR_OUT,
|
||||
.input = NARF_GPIO_PIN_INPUT_DISCONNECT,
|
||||
.pull = NARF_GPIO_PIN_NOPULL,
|
||||
.drive = NARF_GPIO_PIN_S0S1,
|
||||
.sense = NARF_GPIO_PIN_NOSENSE,
|
||||
};
|
||||
|
||||
const struct driver led_2 = {
|
||||
.name = "LED_2",
|
||||
.fp = &gpio_fp,
|
||||
.dev = (void *)&narf_led_2,
|
||||
};
|
||||
|
||||
const struct narf52_gpio narf_led_3 = {
|
||||
.pin_number = 19,
|
||||
.dir = NARF_GPIO_DIR_OUT,
|
||||
.input = NARF_GPIO_PIN_INPUT_DISCONNECT,
|
||||
.pull = NARF_GPIO_PIN_NOPULL,
|
||||
.drive = NARF_GPIO_PIN_S0S1,
|
||||
.sense = NARF_GPIO_PIN_NOSENSE,
|
||||
};
|
||||
|
||||
const struct driver led_3 = {
|
||||
.name = "LED_3",
|
||||
.fp = &gpio_fp,
|
||||
.dev = (void *)&narf_led_3,
|
||||
};
|
||||
|
||||
const struct narf52_gpio narf_led_4 = {
|
||||
.pin_number = 20,
|
||||
.dir = NARF_GPIO_DIR_OUT,
|
||||
.input = NARF_GPIO_PIN_INPUT_DISCONNECT,
|
||||
.pull = NARF_GPIO_PIN_NOPULL,
|
||||
.drive = NARF_GPIO_PIN_S0S1,
|
||||
.sense = NARF_GPIO_PIN_NOSENSE,
|
||||
};
|
||||
|
||||
const struct driver led_4 = {
|
||||
.name = "LED_4",
|
||||
.fp = &gpio_fp,
|
||||
.dev = (void *)&narf_led_4,
|
||||
};
|
||||
|
||||
// BUTTONs
|
||||
const struct narf52_gpio narf_button_1 = {
|
||||
.pin_number = 13,
|
||||
.dir = NARF_GPIO_DIR_IN,
|
||||
.input = NARF_GPIO_PIN_INPUT_CONNECT,
|
||||
.pull = NARF_GPIO_PIN_PULLUP,
|
||||
.drive = NARF_GPIO_PIN_S0S1,
|
||||
.sense = NARF_GPIO_PIN_NOSENSE,
|
||||
};
|
||||
|
||||
const struct driver button_1 = {
|
||||
.name = "BUTTON_1",
|
||||
.fp = &gpio_fp,
|
||||
.dev = (void *)&narf_button_1,
|
||||
};
|
||||
|
||||
const struct narf52_gpio narf_button_2 = {
|
||||
.pin_number = 14,
|
||||
.dir = NARF_GPIO_DIR_IN,
|
||||
.input = NARF_GPIO_PIN_INPUT_CONNECT,
|
||||
.pull = NARF_GPIO_PIN_PULLUP,
|
||||
.drive = NARF_GPIO_PIN_S0S1,
|
||||
.sense = NARF_GPIO_PIN_NOSENSE,
|
||||
};
|
||||
|
||||
const struct driver button_2 = {
|
||||
.name = "BUTTON_2",
|
||||
.fp = &gpio_fp,
|
||||
.dev = (void *)&narf_button_2,
|
||||
};
|
||||
|
||||
const struct narf52_gpio narf_button_3 = {
|
||||
.pin_number = 15,
|
||||
.dir = NARF_GPIO_DIR_IN,
|
||||
.input = NARF_GPIO_PIN_INPUT_CONNECT,
|
||||
.pull = NARF_GPIO_PIN_PULLUP,
|
||||
.drive = NARF_GPIO_PIN_S0S1,
|
||||
.sense = NARF_GPIO_PIN_NOSENSE,
|
||||
};
|
||||
|
||||
const struct driver button_3 = {
|
||||
.name = "BUTTON_3",
|
||||
.fp = &gpio_fp,
|
||||
.dev = (void *)&narf_button_3,
|
||||
};
|
||||
|
||||
const struct narf52_gpio narf_button_4 = {
|
||||
.pin_number = 16,
|
||||
.dir = NARF_GPIO_DIR_IN,
|
||||
.input = NARF_GPIO_PIN_INPUT_CONNECT,
|
||||
.pull = NARF_GPIO_PIN_PULLUP,
|
||||
.drive = NARF_GPIO_PIN_S0S1,
|
||||
.sense = NARF_GPIO_PIN_NOSENSE,
|
||||
};
|
||||
|
||||
const struct driver button_4 = {
|
||||
.name = "BUTTON_4",
|
||||
.fp = &gpio_fp,
|
||||
.dev = (void *)&narf_button_4,
|
||||
};
|
||||
|
||||
#endif
|
||||
@ -1,48 +0,0 @@
|
||||
#ifndef __PLATFORM_NARF52_NARF52_GPIO_H__
|
||||
#define __PLATFORM_NARF52_NARF52_GPIO_H__
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
enum narf52_gpio_direction {
|
||||
NARF_GPIO_DIR_IN = 0,
|
||||
NARF_GPIO_DIR_OUT
|
||||
};
|
||||
|
||||
enum narf52_gpio_pin_input {
|
||||
NARF_GPIO_PIN_INPUT_CONNECT = 0, ///< Connect input buffer.
|
||||
NARF_GPIO_PIN_INPUT_DISCONNECT ///< Disconnect input buffer.
|
||||
};
|
||||
|
||||
enum narf52_gpio_pin_pull {
|
||||
NARF_GPIO_PIN_NOPULL = 0, ///< Pin pull-up resistor disabled.
|
||||
NARF_GPIO_PIN_PULLDOWN = 1, ///< Pin pull-down resistor enabled.
|
||||
NARF_GPIO_PIN_PULLUP = 3 ///< Pin pull-up resistor enabled.
|
||||
};
|
||||
|
||||
enum narf52_gpio_pin_drive {
|
||||
NARF_GPIO_PIN_S0S1 = 0, ///< !< Standard '0', standard '1'.
|
||||
NARF_GPIO_PIN_H0S1 = 1, ///< !< High-drive '0', standard '1'.
|
||||
NARF_GPIO_PIN_S0H1 = 2, ///< !< Standard '0', high-drive '1'.
|
||||
NARF_GPIO_PIN_H0H1 = 3, ///< !< High drive '0', high-drive '1'.
|
||||
NARF_GPIO_PIN_D0S1 = 4, ///< !< Disconnect '0' standard '1'.
|
||||
NARF_GPIO_PIN_D0H1 = 5, ///< !< Disconnect '0', high-drive '1'.
|
||||
NARF_GPIO_PIN_S0D1 = 6, ///< !< Standard '0', disconnect '1'.
|
||||
NARF_GPIO_PIN_H0D1 = 7 ///< !< High-drive '0', disconnect '1'.
|
||||
};
|
||||
|
||||
enum narf52_gpio_pin_sense {
|
||||
NARF_GPIO_PIN_NOSENSE = 0, ///< Pin sense level disabled.
|
||||
NARF_GPIO_PIN_SENSE_LOW = 1, ///< Pin sense low level.
|
||||
NARF_GPIO_PIN_SENSE_HIGH = 2 ///< Pin sense high level.
|
||||
};
|
||||
|
||||
struct narf52_gpio {
|
||||
uint32_t pin_number;
|
||||
enum narf52_gpio_direction dir;
|
||||
enum narf52_gpio_pin_input input;
|
||||
enum narf52_gpio_pin_pull pull;
|
||||
enum narf52_gpio_pin_drive drive;
|
||||
enum narf52_gpio_pin_sense sense;
|
||||
};
|
||||
|
||||
#endif
|
||||
@ -1,26 +1,77 @@
|
||||
#include <stdbool.h>
|
||||
#include <limits.h>
|
||||
#include "nrf_delay.h"
|
||||
#include "boards.h"
|
||||
#include "platform/narf52/narf52_dk.h"
|
||||
|
||||
#include "driver.h"
|
||||
|
||||
int main(void)
|
||||
{
|
||||
drv_open(&led_1);
|
||||
drv_open(&led_2);
|
||||
drv_open(&led_3);
|
||||
drv_open(&led_4);
|
||||
|
||||
while(true) {
|
||||
for(unsigned int i = 0; i < UINT_MAX; i++) {
|
||||
char x = 0x30 | (char)(1 & i);
|
||||
drv_write(&led_1, &x, 1);
|
||||
drv_write(&led_2, &x, 1);
|
||||
drv_write(&led_3, &x, 1);
|
||||
drv_write(&led_4, &x, 1);
|
||||
nrf_delay_ms(500);
|
||||
}
|
||||
}
|
||||
}
|
||||
/**
|
||||
* Copyright (c) 2014 - 2019, Nordic Semiconductor ASA
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form, except as embedded into a Nordic
|
||||
* Semiconductor ASA integrated circuit in a product or a software update for
|
||||
* such product, must reproduce the above copyright notice, this list of
|
||||
* conditions and the following disclaimer in the documentation and/or other
|
||||
* materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* 4. This software, with or without modification, must only be used with a
|
||||
* Nordic Semiconductor ASA integrated circuit.
|
||||
*
|
||||
* 5. Any software provided in binary form under this license must not be reverse
|
||||
* engineered, decompiled, modified and/or disassembled.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
|
||||
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
|
||||
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
/** @file
|
||||
*
|
||||
* @defgroup blinky_example_main main.c
|
||||
* @{
|
||||
* @ingroup blinky_example
|
||||
* @brief Blinky Example Application main file.
|
||||
*
|
||||
* This file contains the source code for a sample application to blink LEDs.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include "nrf_delay.h"
|
||||
#include "boards.h"
|
||||
|
||||
/**
|
||||
* @brief Function for application main entry.
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
/* Configure board. */
|
||||
bsp_board_init(BSP_INIT_LEDS);
|
||||
|
||||
/* Toggle LEDs. */
|
||||
while (true)
|
||||
{
|
||||
for (int i = 0; i < LEDS_NUMBER; i++)
|
||||
{
|
||||
bsp_board_led_invert(i);
|
||||
nrf_delay_ms(500);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
*@}
|
||||
**/
|
||||
|
||||
@ -1,51 +1,113 @@
|
||||
#include <stdbool.h>
|
||||
#include "nrf.h"
|
||||
#include "nrf_drv_gpiote.h"
|
||||
#include "app_error.h"
|
||||
#include "boards.h"
|
||||
|
||||
#ifdef BSP_BUTTON_0
|
||||
#define PIN_IN BSP_BUTTON_0
|
||||
#endif
|
||||
#ifndef PIN_IN
|
||||
#error "Please indicate input pin"
|
||||
#endif
|
||||
|
||||
#ifdef BSP_LED_0
|
||||
#define PIN_OUT BSP_LED_0
|
||||
#endif
|
||||
#ifndef PIN_OUT
|
||||
#error "Please indicate output pin"
|
||||
#endif
|
||||
|
||||
void in_pin_handler(nrf_drv_gpiote_pin_t pin, nrf_gpiote_polarity_t action)
|
||||
{
|
||||
nrf_drv_gpiote_out_toggle(PIN_OUT);
|
||||
}
|
||||
|
||||
static void gpio_init(void)
|
||||
{
|
||||
ret_code_t err_code;
|
||||
|
||||
err_code = nrf_drv_gpiote_init();
|
||||
APP_ERROR_CHECK(err_code);
|
||||
|
||||
nrf_drv_gpiote_out_config_t out_config = GPIOTE_CONFIG_OUT_SIMPLE(false);
|
||||
|
||||
err_code = nrf_drv_gpiote_out_init(PIN_OUT, &out_config);
|
||||
APP_ERROR_CHECK(err_code);
|
||||
|
||||
nrf_drv_gpiote_in_config_t in_config = GPIOTE_CONFIG_IN_SENSE_TOGGLE(true);
|
||||
in_config.pull = NRF_GPIO_PIN_PULLUP;
|
||||
|
||||
err_code = nrf_drv_gpiote_in_init(PIN_IN, &in_config, in_pin_handler);
|
||||
APP_ERROR_CHECK(err_code);
|
||||
|
||||
nrf_drv_gpiote_in_event_enable(PIN_IN, true);
|
||||
}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
gpio_init();
|
||||
while(true) {}
|
||||
}
|
||||
/**
|
||||
* Copyright (c) 2014 - 2019, Nordic Semiconductor ASA
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form, except as embedded into a Nordic
|
||||
* Semiconductor ASA integrated circuit in a product or a software update for
|
||||
* such product, must reproduce the above copyright notice, this list of
|
||||
* conditions and the following disclaimer in the documentation and/or other
|
||||
* materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* 4. This software, with or without modification, must only be used with a
|
||||
* Nordic Semiconductor ASA integrated circuit.
|
||||
*
|
||||
* 5. Any software provided in binary form under this license must not be reverse
|
||||
* engineered, decompiled, modified and/or disassembled.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
|
||||
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
|
||||
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
/** @file
|
||||
* @defgroup pin_change_int_example_main main.c
|
||||
* @{
|
||||
* @ingroup pin_change_int_example
|
||||
* @brief Pin Change Interrupt Example Application main file.
|
||||
*
|
||||
* This file contains the source code for a sample application using interrupts triggered by GPIO pins.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <stdbool.h>
|
||||
#include "nrf.h"
|
||||
#include "nrf_drv_gpiote.h"
|
||||
#include "app_error.h"
|
||||
#include "boards.h"
|
||||
|
||||
#ifdef BSP_BUTTON_0
|
||||
#define PIN_IN BSP_BUTTON_0
|
||||
#endif
|
||||
#ifndef PIN_IN
|
||||
#error "Please indicate input pin"
|
||||
#endif
|
||||
|
||||
#ifdef BSP_LED_0
|
||||
#define PIN_OUT BSP_LED_0
|
||||
#endif
|
||||
#ifndef PIN_OUT
|
||||
#error "Please indicate output pin"
|
||||
#endif
|
||||
|
||||
void in_pin_handler(nrf_drv_gpiote_pin_t pin, nrf_gpiote_polarity_t action)
|
||||
{
|
||||
nrf_drv_gpiote_out_toggle(PIN_OUT);
|
||||
}
|
||||
/**
|
||||
* @brief Function for configuring: PIN_IN pin for input, PIN_OUT pin for output,
|
||||
* and configures GPIOTE to give an interrupt on pin change.
|
||||
*/
|
||||
static void gpio_init(void)
|
||||
{
|
||||
ret_code_t err_code;
|
||||
|
||||
err_code = nrf_drv_gpiote_init();
|
||||
APP_ERROR_CHECK(err_code);
|
||||
|
||||
nrf_drv_gpiote_out_config_t out_config = GPIOTE_CONFIG_OUT_SIMPLE(false);
|
||||
|
||||
err_code = nrf_drv_gpiote_out_init(PIN_OUT, &out_config);
|
||||
APP_ERROR_CHECK(err_code);
|
||||
|
||||
nrf_drv_gpiote_in_config_t in_config = GPIOTE_CONFIG_IN_SENSE_TOGGLE(true);
|
||||
in_config.pull = NRF_GPIO_PIN_PULLUP;
|
||||
|
||||
err_code = nrf_drv_gpiote_in_init(PIN_IN, &in_config, in_pin_handler);
|
||||
APP_ERROR_CHECK(err_code);
|
||||
|
||||
nrf_drv_gpiote_in_event_enable(PIN_IN, true);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Function for application main entry.
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
gpio_init();
|
||||
|
||||
while (true)
|
||||
{
|
||||
// Do nothing.
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/** @} */
|
||||
|
||||
67
src/driver.c
67
src/driver.c
@ -1,67 +0,0 @@
|
||||
#include <stdlib.h>
|
||||
#include <assert.h>
|
||||
|
||||
#include "driver.h"
|
||||
|
||||
int drv_open(const struct driver *drv)
|
||||
{
|
||||
int res = -1;
|
||||
assert(drv != NULL);
|
||||
|
||||
if(drv->fp->open) {
|
||||
res = drv->fp->open(drv);
|
||||
}
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
int drv_close(const struct driver *drv)
|
||||
{
|
||||
int res = -1;
|
||||
assert(drv != NULL);
|
||||
|
||||
if(drv->fp->close) {
|
||||
res = drv->fp->close(drv);
|
||||
}
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
int drv_read(const struct driver *drv, char *buffer, unsigned int length)
|
||||
{
|
||||
int res = -1;
|
||||
assert(drv != NULL);
|
||||
|
||||
if(drv->fp->read) {
|
||||
res = drv->fp->read(drv, buffer, length);
|
||||
}
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
int drv_write(const struct driver *drv, const char *buffer, unsigned int length)
|
||||
{
|
||||
int res = -1;
|
||||
assert(drv != NULL);
|
||||
|
||||
if(drv->fp->write) {
|
||||
res = drv->fp->write(drv, buffer, length);
|
||||
}
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
int drv_ioctl(const struct driver *drv, unsigned int cmd, unsigned int argc, ...)
|
||||
{
|
||||
int res = -1;
|
||||
assert(drv != NULL);
|
||||
|
||||
if(drv->fp->ioctl) {
|
||||
va_list args;
|
||||
va_start(args, argc);
|
||||
res = drv->fp->ioctl(drv, cmd, argc, args);
|
||||
va_end(args);
|
||||
}
|
||||
|
||||
return res;
|
||||
}
|
||||
@ -1,82 +0,0 @@
|
||||
#include <assert.h>
|
||||
#include <fcntl.h>
|
||||
#include <stddef.h>
|
||||
#include <stdio.h>
|
||||
#include <unistd.h>
|
||||
|
||||
#include "platform/narf52/narf52.h"
|
||||
#include "platform/narf52/narf52_gpio.h"
|
||||
|
||||
#include "gpio.h"
|
||||
|
||||
int gpio_open(const struct driver *drv)
|
||||
{
|
||||
assert(NULL != drv);
|
||||
|
||||
int res = -1;
|
||||
struct narf52_gpio *this = (struct narf52_gpio *)(drv->dev);
|
||||
struct narf52_gpio_type *reg = (struct narf52_gpio_type *)NARF_P0_BASE;
|
||||
|
||||
reg->PIN_CNF[this->pin_number] = ((uint32_t)(this->dir) << 0)
|
||||
| ((uint32_t)(this->input) << 1)
|
||||
| ((uint32_t)(this->pull) << 2)
|
||||
| ((uint32_t)(this->drive) << 8)
|
||||
| ((uint32_t)(this->sense) << 16);
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
int gpio_close(const struct driver *drv)
|
||||
{
|
||||
assert(NULL != drv);
|
||||
int res = -1;
|
||||
struct gpio *this = (struct gpio *)(drv->dev);
|
||||
this = this;
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
int gpio_read(const struct driver *drv, char *buffer, unsigned int len)
|
||||
{
|
||||
assert((NULL != drv) && (buffer != NULL));
|
||||
if(len == 0) {
|
||||
return 0;
|
||||
}
|
||||
struct narf52_gpio *this = (struct narf52_gpio *)(drv->dev);
|
||||
struct narf52_gpio_type *reg = (struct narf52_gpio_type *)NARF_P0_BASE;
|
||||
uint32_t state = ((reg->IN) >> (this->pin_number) & 1UL);
|
||||
if(state) {
|
||||
buffer[0] = 0x31;
|
||||
} else {
|
||||
buffer[0] = 0x30;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
int gpio_write(const struct driver *drv, const char *buffer, unsigned int len)
|
||||
{
|
||||
assert((NULL != drv) && (buffer != NULL));
|
||||
if(len == 0) {
|
||||
return 0;
|
||||
}
|
||||
struct narf52_gpio *this = (struct narf52_gpio *)(drv->dev);
|
||||
struct narf52_gpio_type *reg = (struct narf52_gpio_type *)NARF_P0_BASE;
|
||||
if(buffer[0] != 0x30) {
|
||||
reg->OUTSET = 1 << (this->pin_number);
|
||||
} else {
|
||||
reg->OUTCLR = 1 << (this->pin_number);
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
int gpio_ioctl(const struct driver *drv, unsigned int cmd, unsigned int argc, va_list args)
|
||||
{
|
||||
assert(drv != 0);
|
||||
|
||||
int res = -1;
|
||||
struct gpio *this = (struct gpio *)(drv->dev);
|
||||
this = this;
|
||||
|
||||
return res;
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user