Code reorganization

.gitignore

@@ -1 +1 @@
-_build/
+build/

.vscode/launch.json

@@ -6,13 +6,13 @@
             "type": "cppdbg",
             "request": "launch",
             "args": [],
-            "program": "${workspaceFolder}/_build/firmware.elf",
+            "program": "${workspaceFolder}/build/firmware.elf",
             "stopAtEntry": true,
             "cwd": "${workspaceRoot}",
             "environment": [],
             "externalConsole": false,
             "MIMode": "gdb",
-            "miDebuggerPath": "/usr/local/bin/arm-none-eabi-gdb",
+            "miDebuggerPath": "arm-none-eabi-gdb",
             "debugServerPath": "openocd",
             "debugServerArgs": "-f ${workspaceRoot}/openocd.cfg",
             "serverLaunchTimeout": 20000,
@@ -43,7 +43,7 @@
                 },
                 {
                     "description": "Load executable into debugger.",
-                    "text": "file ${workspaceFolder}/_build/firmware.elf",
+                    "text": "file ${workspaceFolder}/build/firmware.elf",
                     "ignoreFailures": false
                 },
                 {

Makefile

@@ -3,19 +3,12 @@ TARGET = firmware
 DEBUG = 1
 OPT = -O0
 
-BUILD_DIR = _build
+BUILD_DIR = build
 
-CC_SOURCES = \
-Core/main.cc \
-platform/stm32g0xx/Gpio.cc \
-platform/stm32g0xx/Uart.cc \
-platform/stm32g0xx/IndependentWatchdog.cc \
-platform/stm32g0xx/low_level_interrupt.cc
-
-C_SOURCES = \
-platform/stm32g0xx/system_stm32g0xx.c \
-platform/stm32g0xx/syscalls.c \
-platform/stm32g0xx/sysmem.c \
+SRC_DIRS := $(shell find src -type d)
+CC_SOURCES = $(foreach folder, $(SRC_DIRS), $(wildcard $(folder)/*.cc))
+C_SOURCES = $(foreach folder, $(SRC_DIRS), $(wildcard $(folder)/*.c))
+ASM_SOURCES = $(foreach folder, $(SRC_DIRS), $(wildcard $(folder)/*.s))
 
 PREFIX = arm-none-eabi-
 CC = $(PREFIX)gcc
@@ -30,31 +23,11 @@ BIN = $(CP) -O binary -S
 CPU = -mcpu=cortex-m0plus
 MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)
 
-ifeq "$(SOC)" "stm32g071"
-
-C_DEFS = -DSTM32G071xx
-LDSCRIPT = platform/stm32g0xx/STM32G071RBTX_FLASH.ld
-ASM_SOURCES = platform/stm32g0xx/startup_stm32g071rbtx.s
-
-else
-ifeq "$(SOC)" "stm32g031"
-
 C_DEFS = -DSTM32G031xx
-LDSCRIPT = platform/stm32g0xx/STM32G031Y8YX_FLASH.ld
-ASM_SOURCES = platform/stm32g0xx/startup_stm32g031y8yx.s
-
-endif
-endif
-
-C_INCLUDES = \
--I. \
--ICore \
--Iarch/CMSIS/Device/ST/STM32G0xx/Include \
--Iarch/CMSIS/Include \
--Iplatform/stm32g0xx
+LDSCRIPT = src/platform/stm32g0xx/STM32G031Y8YX_FLASH.ld
 
 ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
-CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
+CFLAGS = $(MCU) $(C_DEFS) $(addprefix -I,$(SRC_DIRS)) $(OPT) -Wall -fdata-sections -ffunction-sections
 
 ifeq ($(DEBUG), 1)
 CFLAGS += -ggdb3

openocd.cfg

@@ -1,6 +1,2 @@
-# openocd setup for coprocessor using jlink interface and swd
-
-source /usr/local/share/openocd/scripts/interface/jlink.cfg
-transport select swd
-
-source /usr/local/share/openocd/scripts/target/stm32g0x.cfg
+source [find interface/stlink.cfg]
+source [find target/stm32g0x.cfg]

platform/stm32g0xx/STM32G071RBTX_FLASH.ld

@@ -1,177 +0,0 @@
-/**
- ******************************************************************************
- * @file      LinkerScript.ld
- * @author    Auto-generated by STM32CubeIDE
- *  Abstract    : Linker script for NUCLEO-G071RB Board embedding STM32G071RBTx Device from stm32g0 series
- *                      128Kbytes FLASH
- *                      36Kbytes RAM
- *
- *            Set heap size, stack size and stack location according
- *            to application requirements.
- *
- *            Set memory bank area and size if external memory is used
- ******************************************************************************
- * @attention
- *
- * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- *                        opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
-
-_Min_Heap_Size = 0x200 ;	/* required amount of heap  */
-_Min_Stack_Size = 0x400 ;	/* required amount of stack */
-
-/* Memories definition */
-MEMORY
-{
-  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 36K
-  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 128K
-}
-
-/* Sections */
-SECTIONS
-{
-  /* The startup code into "FLASH" Rom type memory */
-  .isr_vector :
-  {
-    . = ALIGN(4);
-    KEEP(*(.isr_vector)) /* Startup code */
-    . = ALIGN(4);
-  } >FLASH
-
-  /* The program code and other data into "FLASH" Rom type memory */
-  .text :
-  {
-    . = ALIGN(4);
-    *(.text)           /* .text sections (code) */
-    *(.text*)          /* .text* sections (code) */
-    *(.glue_7)         /* glue arm to thumb code */
-    *(.glue_7t)        /* glue thumb to arm code */
-    *(.eh_frame)
-
-    KEEP (*(.init))
-    KEEP (*(.fini))
-
-    . = ALIGN(4);
-    _etext = .;        /* define a global symbols at end of code */
-  } >FLASH
-
-  /* Constant data into "FLASH" Rom type memory */
-  .rodata :
-  {
-    . = ALIGN(4);
-    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
-    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
-    . = ALIGN(4);
-  } >FLASH
-
-  .ARM.extab   : {
-    . = ALIGN(4);
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-    . = ALIGN(4);
-  } >FLASH
-
-  .ARM : {
-    . = ALIGN(4);
-    __exidx_start = .;
-    *(.ARM.exidx*)
-    __exidx_end = .;
-    . = ALIGN(4);
-  } >FLASH
-
-  .preinit_array     :
-  {
-    . = ALIGN(4);
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array*))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-    . = ALIGN(4);
-  } >FLASH
-
-  .init_array :
-  {
-    . = ALIGN(4);
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array*))
-    PROVIDE_HIDDEN (__init_array_end = .);
-    . = ALIGN(4);
-  } >FLASH
-
-  .fini_array :
-  {
-    . = ALIGN(4);
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT(.fini_array.*)))
-    KEEP (*(.fini_array*))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-    . = ALIGN(4);
-  } >FLASH
-
-  /* Used by the startup to initialize data */
-  _sidata = LOADADDR(.data);
-
-  /* Initialized data sections into "RAM" Ram type memory */
-  .data :
-  {
-    . = ALIGN(4);
-    _sdata = .;        /* create a global symbol at data start */
-    *(.data)           /* .data sections */
-    *(.data*)          /* .data* sections */
-    *(.RamFunc)        /* .RamFunc sections */
-    *(.RamFunc*)       /* .RamFunc* sections */
-
-    . = ALIGN(4);
-    _edata = .;        /* define a global symbol at data end */
-
-  } >RAM AT> FLASH
-
-  /* Uninitialized data section into "RAM" Ram type memory */
-  . = ALIGN(4);
-  .bss :
-  {
-    /* This is used by the startup in order to initialize the .bss section */
-    _sbss = .;         /* define a global symbol at bss start */
-    __bss_start__ = _sbss;
-    *(.bss)
-    *(.bss*)
-    *(COMMON)
-
-    . = ALIGN(4);
-    _ebss = .;         /* define a global symbol at bss end */
-    __bss_end__ = _ebss;
-  } >RAM
-
-  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
-  ._user_heap_stack :
-  {
-    . = ALIGN(8);
-    PROVIDE ( end = . );
-    PROVIDE ( _end = . );
-    . = . + _Min_Heap_Size;
-    . = . + _Min_Stack_Size;
-    . = ALIGN(8);
-  } >RAM
-
-  /* Remove information from the compiler libraries */
-  /DISCARD/ :
-  {
-    libc.a ( * )
-    libm.a ( * )
-    libgcc.a ( * )
-  }
-
-  .ARM.attributes 0 : { *(.ARM.attributes) }
-}

platform/stm32g0xx/startup_stm32g071rbtx.s

@@ -1,299 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32g071xx.s
-  * @author    MCD Application Team
-  * @brief     STM32G071xx devices vector table GCC toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0+ processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2018 STMicroelectronics. All rights reserved.
-  *
-  * This software component is licensed by ST under Apache License, Version 2.0,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/Apache-2.0
-  *
-  ******************************************************************************
-  */
-
-.syntax unified
-.cpu cortex-m0plus
-.fpu softvfp
-.thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-/**
- * @brief  This is the code that gets called when the processor first
- *          starts execution following a reset event. Only the absolutely
- *          necessary set is performed, after which the application
- *          supplied main() routine is called.
- * @param  None
- * @retval None
-*/
-
-  .section .text.Reset_Handler
-  .weak Reset_Handler
-  .type Reset_Handler, %function
-Reset_Handler:
-  ldr   r0, =_estack
-  mov   sp, r0          /* set stack pointer */
-
-/* Call the clock system initialization function.*/
-  bl  SystemInit
-
-/* Copy the data segment initializers from flash to SRAM */
-  ldr r0, =_sdata
-  ldr r1, =_edata
-  ldr r2, =_sidata
-  movs r3, #0
-  b LoopCopyDataInit
-
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc CopyDataInit
-
-/* Zero fill the bss segment. */
-  ldr r2, =_sbss
-  ldr r4, =_ebss
-  movs r3, #0
-  b LoopFillZerobss
-
-FillZerobss:
-  str  r3, [r2]
-  adds r2, r2, #4
-
-LoopFillZerobss:
-  cmp r2, r4
-  bcc FillZerobss
-
-/* Call static constructors */
-  bl __libc_init_array
-  @ bl system_early_init
-/* Call the application s entry point.*/
-  bl main
-
-LoopForever:
-  b LoopForever
-
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval None
-*/
-  .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b Infinite_Loop
-  .size Default_Handler, .-Default_Handler
-
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-  .section .isr_vector,"a",%progbits
-  .type g_pfnVectors, %object
-  .size g_pfnVectors, .-g_pfnVectors
-
-g_pfnVectors:
-  .word _estack
-  .word Reset_Handler
-  .word NMI_Handler
-  .word HardFault_Handler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word SVC_Handler
-  .word 0
-  .word 0
-  .word PendSV_Handler
-  .word SysTick_Handler
-  .word WWDG_IRQHandler                   /* Window WatchDog              */
-  .word PVD_IRQHandler                    /* PVD through EXTI Line detect */
-  .word RTC_TAMP_IRQHandler               /* RTC through the EXTI line    */
-  .word FLASH_IRQHandler                  /* FLASH                        */
-  .word RCC_IRQHandler                    /* RCC                          */
-  .word EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word UCPD1_2_IRQHandler                /* UCPD1, UCPD2                 */
-  .word DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler /* DMA1 Channel 4 to Channel 7, DMAMUX1 overrun */
-  .word ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2         */
-  .word TIM1_BRK_UP_TRG_COM_IRQHandler    /* TIM1 Break, Update, Trigger and Commutation */
-  .word TIM1_CC_IRQHandler                /* TIM1 Capture Compare         */
-  .word TIM2_IRQHandler                   /* TIM2                         */
-  .word TIM3_IRQHandler                   /* TIM3                         */
-  .word TIM6_DAC_LPTIM1_IRQHandler        /* TIM6, DAC and LPTIM1         */
-  .word TIM7_LPTIM2_IRQHandler            /* TIM7 and LPTIM2              */
-  .word TIM14_IRQHandler                  /* TIM14                        */
-  .word TIM15_IRQHandler                  /* TIM15                        */
-  .word TIM16_IRQHandler                  /* TIM16                        */
-  .word TIM17_IRQHandler                  /* TIM17                        */
-  .word I2C1_IRQHandler                   /* I2C1                         */
-  .word I2C2_IRQHandler                   /* I2C2                         */
-  .word SPI1_IRQHandler                   /* SPI1                         */
-  .word SPI2_IRQHandler                   /* SPI2                         */
-  .word USART1_IRQHandler                 /* USART1                       */
-  .word USART2_IRQHandler                 /* USART2                       */
-  .word USART3_4_LPUART1_IRQHandler       /* USART3, USART4 and LPUART1   */
-  .word CEC_IRQHandler                    /* CEC                          */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-  .weak      NMI_Handler
-  .thumb_set NMI_Handler,Default_Handler
-
-  .weak      HardFault_Handler
-  .thumb_set HardFault_Handler,Default_Handler
-
-  .weak      SVC_Handler
-  .thumb_set SVC_Handler,Default_Handler
-
-  .weak      PendSV_Handler
-  .thumb_set PendSV_Handler,Default_Handler
-
-  .weak      SysTick_Handler
-  .thumb_set SysTick_Handler,Default_Handler
-
-  .weak      WWDG_IRQHandler
-  .thumb_set WWDG_IRQHandler,Default_Handler
-
-  .weak      PVD_IRQHandler
-  .thumb_set PVD_IRQHandler,Default_Handler
-
-  .weak      RTC_TAMP_IRQHandler
-  .thumb_set RTC_TAMP_IRQHandler,Default_Handler
-
-  .weak      FLASH_IRQHandler
-  .thumb_set FLASH_IRQHandler,Default_Handler
-
-  .weak      RCC_IRQHandler
-  .thumb_set RCC_IRQHandler,Default_Handler
-
-  .weak      EXTI0_1_IRQHandler
-  .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-  .weak      EXTI2_3_IRQHandler
-  .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-  .weak      EXTI4_15_IRQHandler
-  .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-  .weak      UCPD1_2_IRQHandler
-  .thumb_set UCPD1_2_IRQHandler,Default_Handler
-
-  .weak      DMA1_Channel1_IRQHandler
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-  .weak      DMA1_Channel2_3_IRQHandler
-  .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-  .weak      DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler
-  .thumb_set DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler,Default_Handler
-
-  .weak      ADC1_COMP_IRQHandler
-  .thumb_set ADC1_COMP_IRQHandler,Default_Handler
-
-  .weak      TIM1_BRK_UP_TRG_COM_IRQHandler
-  .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
-
-  .weak      TIM1_CC_IRQHandler
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
-
-  .weak      TIM2_IRQHandler
-  .thumb_set TIM2_IRQHandler,Default_Handler
-
-  .weak      TIM3_IRQHandler
-  .thumb_set TIM3_IRQHandler,Default_Handler
-
-  .weak      TIM6_DAC_LPTIM1_IRQHandler
-  .thumb_set TIM6_DAC_LPTIM1_IRQHandler,Default_Handler
-
-  .weak      TIM7_LPTIM2_IRQHandler
-  .thumb_set TIM7_LPTIM2_IRQHandler,Default_Handler
-
-  .weak      TIM14_IRQHandler
-  .thumb_set TIM14_IRQHandler,Default_Handler
-
-  .weak      TIM15_IRQHandler
-  .thumb_set TIM15_IRQHandler,Default_Handler
-
-  .weak      TIM16_IRQHandler
-  .thumb_set TIM16_IRQHandler,Default_Handler
-
-  .weak      TIM17_IRQHandler
-  .thumb_set TIM17_IRQHandler,Default_Handler
-
-  .weak      I2C1_IRQHandler
-  .thumb_set I2C1_IRQHandler,Default_Handler
-
-  .weak      I2C2_IRQHandler
-  .thumb_set I2C2_IRQHandler,Default_Handler
-
-  .weak      SPI1_IRQHandler
-  .thumb_set SPI1_IRQHandler,Default_Handler
-
-  .weak      SPI2_IRQHandler
-  .thumb_set SPI2_IRQHandler,Default_Handler
-
-  .weak      USART1_IRQHandler
-  .thumb_set USART1_IRQHandler,Default_Handler
-
-  .weak      USART2_IRQHandler
-  .thumb_set USART2_IRQHandler,Default_Handler
-
-  .weak      USART3_4_LPUART1_IRQHandler
-  .thumb_set USART3_4_LPUART1_IRQHandler,Default_Handler
-
-  .weak      CEC_IRQHandler
-  .thumb_set CEC_IRQHandler,Default_Handler
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-