68 lines
1.3 KiB
Plaintext
68 lines
1.3 KiB
Plaintext
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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ENTRY(reset_vector)
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VECTOR_TABLE_LENGTH = 0x80;
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CONFIG_ULP_COPROC_RESERVE_MEM = 1024 * 16;
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CONFIG_ULP_SHARED_MEM = 0;
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RAM_LENGTH = CONFIG_ULP_COPROC_RESERVE_MEM - VECTOR_TABLE_LENGTH - CONFIG_ULP_SHARED_MEM;
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MEMORY
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{
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/*first 128byte for exception/interrupt vectors*/
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vector_table(RX) : ORIGIN = 0x50000000, LENGTH = VECTOR_TABLE_LENGTH
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ram(RWX) : ORIGIN = 0x50000080, LENGTH = RAM_LENGTH
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}
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SECTIONS
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{
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.vector.text :
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{
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/* Exception/interrupt vectors */
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__mtvec_base = .;
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KEEP (*(.init.vector))
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__mtvec_end = .;
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} > vector_table
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. = ORIGIN(ram);
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.text ALIGN(4):
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{
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*(.text.vectors) /* Default reset vector must link to offset 0x80 */
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KEEP(*(.init));
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KEEP(*(.init.rust));
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*(.text)
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*(.text*)
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} > ram
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.rodata ALIGN(4):
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{
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*(.rodata)
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*(.rodata*)
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} > ram
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.data ALIGN(4):
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{
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*(.data)
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*(.data*)
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*(.sdata)
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*(.sdata*)
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} > ram
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.bss ALIGN(4) :
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{
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*(.bss)
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*(.bss*)
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*(.sbss)
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*(.sbss*)
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PROVIDE(end = .);
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} > ram
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__stack_top = ORIGIN(ram) + LENGTH(ram);
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}
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