smartwatch/narf52
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Add platform nrf52

Browse Source
This commit is contained in:
Thomas Klaehn
2020-03-10 06:56:43 +01:00
parent c31d32ded3
commit 4ed74dad32
15 changed files with 553 additions and 210 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
.vscode/launch.json vendored
View File

@@ -2,7 +2,7 @@
"version": "0.2.0",
"configurations": [
{
"name": "Launch TCM",
"name": "Launch",
"type": "cppdbg",
"request": "launch",
"program": "${workspaceFolder}/bin/nrf.elf",
@@ -11,7 +11,7 @@
"cwd": "${workspaceFolder}",
"environment": [],
"MIMode": "gdb",
"miDebuggerPath": "/opt/gcc-arm-none-eabi-7-2018-q2-update/bin/arm-none-eabi-gdb",
"miDebuggerPath": "arm-none-eabi-gdb",
"debugServerPath": "JLinkGDBServerCLExe",
"debugServerArgs": "-device nrf52832_xxaa -if swd -port 2331",
"serverStarted": "Listening on TCP/IP port 2331",

7
.vscode/settings.json vendored
View File

@@ -6,6 +6,11 @@
"nrfx_config.h": "c",
"nrfx_common.h": "c",
"nrf.h": "c",
"boards.h": "c"
"boards.h": "c",
"gpio.h": "c",
"nrf52.h": "c",
"system_nrf52.h": "c",
"system_nrf.h": "c",
"driver.h": "c"
}
}

3
.vscode/tasks.json vendored
View File

@@ -4,7 +4,8 @@
"version": "2.0.0",
"options": {
"env": {
"ARCH": "posix",
"PLATFORM": "nrf52",
// "PLATFORM": "posix",
},
},
"tasks": [

154
Makefile
View File

@@ -1,6 +1,8 @@
CROSS_COMPILE ?= /opt/gcc-arm-none-eabi-7-2018-q2-update/bin/arm-none-eabi-
.DEFAULT_GOAL := all
TARGET_FILE ?= nrf.elf
PLATFORM ?= posix
TARGET_FILE ?= firmware.elf
CC = $(CROSS_COMPILE)gcc
CPP = $(CROSS_COMPILE)cpp
@@ -10,64 +12,11 @@ SRC_DIR = src
OBJ_DIR = obj
BIN_DIR = bin
NRF_PATH := nrf5sdk/
INCLUDES += include/
INCLUDES += $(NRF_PATH)components/
INCLUDES += $(NRF_PATH)modules/nrfx/mdk/
INCLUDES += $(NRF_PATH)components/libraries/strerror/
INCLUDES += $(NRF_PATH)components/softdevice/s132/headers/nrf52/
INCLUDES += $(NRF_PATH)components/toolchain/cmsis/include/
INCLUDES += $(NRF_PATH)components/libraries/util/
INCLUDES += $(NRF_PATH)components/libraries/balloc/
INCLUDES += $(NRF_PATH)components/libraries/ringbuf/
INCLUDES += $(NRF_PATH)modules/nrfx/hal/
INCLUDES += $(NRF_PATH)components/libraries/bsp/
INCLUDES += $(NRF_PATH)components/libraries/log/
INCLUDES += $(NRF_PATH)modules/nrfx/
INCLUDES += $(NRF_PATH)components/libraries/experimental_section_vars/
INCLUDES += $(NRF_PATH)components/softdevice/s132/headers/
INCLUDES += $(NRF_PATH)components/libraries/delay/
INCLUDES += $(NRF_PATH)integration/nrfx/
INCLUDES += $(NRF_PATH)components/libraries/atomic/
INCLUDES += $(NRF_PATH)components/boards/
INCLUDES += $(NRF_PATH)components/libraries/memobj/
INCLUDES += $(NRF_PATH)components/softdevice/common/
INCLUDES += $(NRF_PATH)external/fprintf/
INCLUDES += $(NRF_PATH)components/libraries/log/src/
CPP_FLAGS += $(addprefix -I, $(INCLUDES))
C_SRCS = $(wildcard $(SRC_DIR)/*.c)
C_SRCS += $(wildcard $(SRC_DIR)/platform/$(PLATFORM)/*.c)
C_OBJS = $(patsubst $(SRC_DIR)%,$(OBJ_DIR)%,$(patsubst %.c,%.o,$(C_SRCS)))
NRF_C_SRCS += $(NRF_PATH)components/libraries/log/src/nrf_log_frontend.c
NRF_C_SRCS += $(NRF_PATH)components/libraries/log/src/nrf_log_str_formatter.c
NRF_C_SRCS += $(NRF_PATH)components/boards/boards.c
NRF_C_SRCS += $(NRF_PATH)components/libraries/util/app_error.c
NRF_C_SRCS += $(NRF_PATH)components/libraries/util/app_error_handler_gcc.c
NRF_C_SRCS += $(NRF_PATH)components/libraries/util/app_error_weak.c
NRF_C_SRCS += $(NRF_PATH)components/libraries/util/app_util_platform.c
NRF_C_SRCS += $(NRF_PATH)components/libraries/util/nrf_assert.c
NRF_C_SRCS += $(NRF_PATH)components/libraries/atomic/nrf_atomic.c
NRF_C_SRCS += $(NRF_PATH)components/libraries/balloc/nrf_balloc.c
NRF_C_SRCS += $(NRF_PATH)external/fprintf/nrf_fprintf.c
NRF_C_SRCS += $(NRF_PATH)external/fprintf/nrf_fprintf_format.c
NRF_C_SRCS += $(NRF_PATH)components/libraries/memobj/nrf_memobj.c
NRF_C_SRCS += $(NRF_PATH)components/libraries/ringbuf/nrf_ringbuf.c
NRF_C_SRCS += $(NRF_PATH)components/libraries/experimental_section_vars/nrf_section_iter.c
NRF_C_SRCS += $(NRF_PATH)components/libraries/strerror/nrf_strerror.c
NRF_C_SRCS += $(NRF_PATH)modules/nrfx/soc/nrfx_atomic.c
NRF_C_SRCS += $(NRF_PATH)modules/nrfx/mdk/system_nrf52.c
NRF_C_SRCS += $(NRF_PATH)components/softdevice/common/nrf_sdh.c
NRF_C_SRCS += $(NRF_PATH)components/softdevice/common/nrf_sdh_soc.c
NRF_C_OBJS = $(patsubst $(NRF_PATH)%,$(OBJ_DIR)/%,$(patsubst %.c,%.o,$(NRF_C_SRCS)))
NRF_A_SRCS = $(NRF_PATH)modules/nrfx/mdk/gcc_startup_nrf52.S
NRF_A_OBJS = $(patsubst $(NRF_PATH)%,$(OBJ_DIR)/%,$(patsubst %.S,%.o,$(NRF_A_SRCS)))
OBJS = $(NRF_A_OBJS) $(NRF_C_OBJS) $(C_OBJS)
TARGET = $(BIN_DIR)/$(TARGET_FILE)
@@ -75,67 +24,18 @@ TARGET_HEX = $(patsubst %.elf,%.hex,$(TARGET))
TARGET_PACKAGE = $(patsubst %.hex,%.zip,$(TARGET_HEX))
THIS_MAKEFILE := $(lastword $(MAKEFILE_LIST))
###################################################
INCLUDES += include/
OPT = 3
# C flags common to all targets
C_FLAGS += -O$(OPT) -g$(OPT)
C_FLAGS += -DBOARD_PCA10040
C_FLAGS += -DBSP_DEFINES_ONLY
C_FLAGS += -DCONFIG_GPIO_AS_PINRESET
C_FLAGS += -DFLOAT_ABI_HARD
C_FLAGS += -DNRF52
C_FLAGS += -DNRF52832_XXAA
C_FLAGS += -DNRF52_PAN_74
C_FLAGS += -DNRF_SD_BLE_API_VERSION=7
C_FLAGS += -DS132
C_FLAGS += -DSOFTDEVICE_PRESENT
C_FLAGS += -mcpu=cortex-m4
C_FLAGS += -mthumb -mabi=aapcs
C_FLAGS += -Wall -Werror
C_FLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16
# keep every function in a separate section, this allows linker to discard unused ones
C_FLAGS += -ffunction-sections -fdata-sections -fno-strict-aliasing
C_FLAGS += -fno-builtin -fshort-enums
# Assembler flags common to all targets
A_FLAGS += -g$(OPT)
A_FLAGS += -mcpu=cortex-m4
A_FLAGS += -mthumb -mabi=aapcs
A_FLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16
A_FLAGS += -DBOARD_PCA10040
A_FLAGS += -DBSP_DEFINES_ONLY
A_FLAGS += -DCONFIG_GPIO_AS_PINRESET
A_FLAGS += -DFLOAT_ABI_HARD
A_FLAGS += -DNRF52
A_FLAGS += -DNRF52832_XXAA
A_FLAGS += -DNRF52_PAN_74
A_FLAGS += -DNRF_SD_BLE_API_VERSION=7
A_FLAGS += -DS132
A_FLAGS += -DSOFTDEVICE_PRESENT
LINKER_SCRIPT = blinky_gcc_nrf52.ld
# Linker flags
LD_FLAGS += -O$(OPT) -g$(OPT)
LD_FLAGS += -mthumb -mabi=aapcs -L$(NRF_PATH)modules/nrfx/mdk -T$(LINKER_SCRIPT)
LD_FLAGS += -mcpu=cortex-m4
LD_FLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16
# let linker dump unused sections
LD_FLAGS += -Wl,--gc-sections
# use newlib in nano version
LD_FLAGS += --specs=nano.specs
C_FLAGS += -D__HEAP_SIZE=8192
C_FLAGS += -D__HEAP_SIZE=8192
A_FLAGS += -D__HEAP_SIZE=8192
A_FLAGS += -D__HEAP_SIZE=8192
# Add standard libraries at the very end of the linker input, after all objects
# that may need symbols provided by these libraries.
LIBS += c nosys m
###################################################
.PHONY: all install uninstall clean distclean debug package flash
include Makefile.$(PLATFORM)
.PHONY: all install uninstall clean distclean debug
all: $(TARGET)
debug:
@@ -148,49 +48,21 @@ clean:
distclean:
rm -rf $(OBJ_DIR) $(BIN_DIR)
package: $(TARGET_HEX) $(THIS_MAKEFILE)
nrfutil pkg generate --hw-version 52 --application-version 1 --application $(TARGET_HEX) --sd-req 0xCB --sd-id 0xCB --key-file keys/private.key $(TARGET_PACKAGE)
flash: $(TARGET_HEX) $(THIS_MAKEFILE)
@echo Flashing: $(TARGET_HEX)
nrfjprog -f nrf52 --program $(TARGET_HEX) --sectorerase
nrfjprog -f nrf52 --reset
flash_softdevice:
@echo Flashing: $(NRF_PATH)/components/softdevice/s132/hex/s132_nrf52_7.0.1_softdevice.hex
nrfjprog -f nrf52 --program $(NRF_PATH)/components/softdevice/s132/hex/s132_nrf52_7.0.1_softdevice.hex --sectorerase
nrfjprog -f nrf52 --reset
erase:
nrfjprog -f nrf52 --eraseall
$(TARGET): $(OBJS) $(THIS_MAKEFILE)
@mkdir -p $(BIN_DIR)
@mkdir -p $(dir $@)
$(CC) $(CC_FLAGS) $(LD_FLAGS) $(OBJS) $(addprefix -l,$(LIBS)) -o $@
$(TARGET_HEX): $(TARGET) $(THIS_MAKEFILE)
$(OBJCOPY) -O ihex $(TARGET) $(TARGET_HEX)
$(OBJ_DIR)/%.d: $(SRC_DIR)/%.c
@mkdir -p $(OBJ_DIR)/
@mkdir -p $(dir $@)
$(CPP) -MM -MF $@ -MP -MT $(patsubst %.d,%.o,$@) $(C_FLAGS) $(CPP_FLAGS) $(patsubst $(OBJ_DIR)/%.d,$(SRC_DIR)/%.c,$@)
$(OBJ_DIR)/%.d: $(NRF_PATH)/%.S
@mkdir -p $(OBJ_DIR)/
$(CPP) -MM -MF $@ -MP -MT $(patsubst %.d,%.o,$@) $(C_FLAGS) $(CPP_FLAGS) $(patsubst $(OBJ_DIR)/%.d,$(NRF_PATH)/%.S,$@)
$(OBJ_DIR)/%.o: $(SRC_DIR)/%.c
@mkdir -p $(OBJ_DIR)/
@mkdir -p $(dir $@)
$(CC) -c $(CPP_FLAGS) $(C_FLAGS) $< -o $@
$(OBJ_DIR)/%.o: $(NRF_PATH)/%.c
@mkdir -p $(dir $@)
$(CC) -std=c99 -MP -MD -c -o $@ $< $(C_FLAGS) $(CPP_FLAGS)
$(OBJ_DIR)/%.o: $(NRF_PATH)/%.S
@mkdir -p $(dir $@)
$(CC) -c $(ASMFLAGS) $< -o $@
ifneq ($(MAKECMDGOALS),clean)
-include $(patsubst %.o,%.d,$(OBJS))
endif

108
Makefile.nrf52 Normal file
View File

@@ -0,0 +1,108 @@
CPU = cortex-m4
CROSS_COMPILE ?= arm-none-eabi-
NRF_PATH := nrf5sdk/
INCLUDES += $(NRF_PATH)components/
INCLUDES += $(NRF_PATH)modules/nrfx/mdk/
INCLUDES += $(NRF_PATH)components/libraries/strerror/
INCLUDES += $(NRF_PATH)components/softdevice/s132/headers/nrf52/
INCLUDES += $(NRF_PATH)components/toolchain/cmsis/include/
INCLUDES += $(NRF_PATH)components/libraries/util/
INCLUDES += $(NRF_PATH)components/libraries/balloc/
INCLUDES += $(NRF_PATH)components/libraries/ringbuf/
INCLUDES += $(NRF_PATH)modules/nrfx/hal/
INCLUDES += $(NRF_PATH)components/libraries/bsp/
INCLUDES += $(NRF_PATH)components/libraries/log/
INCLUDES += $(NRF_PATH)modules/nrfx/
INCLUDES += $(NRF_PATH)components/libraries/experimental_section_vars/
INCLUDES += $(NRF_PATH)components/softdevice/s132/headers/
INCLUDES += $(NRF_PATH)components/libraries/delay/
INCLUDES += $(NRF_PATH)integration/nrfx/
INCLUDES += $(NRF_PATH)components/libraries/atomic/
INCLUDES += $(NRF_PATH)components/boards/
INCLUDES += $(NRF_PATH)components/libraries/memobj/
INCLUDES += $(NRF_PATH)components/softdevice/common/
INCLUDES += $(NRF_PATH)external/fprintf/
INCLUDES += $(NRF_PATH)components/libraries/log/src/
NRF_C_SRCS += $(NRF_PATH)components/boards/boards.c
NRF_C_SRCS += $(NRF_PATH)modules/nrfx/mdk/system_nrf52.c
NRF_C_OBJS = $(patsubst $(NRF_PATH)%,$(OBJ_DIR)/%,$(patsubst %.c,%.o,$(NRF_C_SRCS)))
NRF_A_SRCS = $(NRF_PATH)modules/nrfx/mdk/gcc_startup_nrf52.S
NRF_A_OBJS = $(patsubst $(NRF_PATH)%,$(OBJ_DIR)/%,$(patsubst %.S,%.o,$(NRF_A_SRCS)))
C_FLAGS += -DBOARD_PCA10040
C_FLAGS += -DBSP_DEFINES_ONLY
C_FLAGS += -DCONFIG_GPIO_AS_PINRESET
C_FLAGS += -DFLOAT_ABI_HARD
C_FLAGS += -DNRF52
C_FLAGS += -DNRF52832_XXAA
C_FLAGS += -DNRF52_PAN_74
C_FLAGS += -DNRF_SD_BLE_API_VERSION=7
C_FLAGS += -DS132
C_FLAGS += -DSOFTDEVICE_PRESENT
C_FLAGS += -mcpu=$(CPU)
C_FLAGS += -mthumb -mabi=aapcs
C_FLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16
C_FLAGS += -fno-builtin -fshort-enums
C_FLAGS += -D__HEAP_SIZE=8192
C_FLAGS += -D__HEAP_SIZE=8192
# Assembler flags common to all targets
A_FLAGS += -g$(OPT)
A_FLAGS += -mcpu=$(CPU)
A_FLAGS += -mthumb -mabi=aapcs
A_FLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16
A_FLAGS += -DBOARD_PCA10040
A_FLAGS += -DBSP_DEFINES_ONLY
A_FLAGS += -DCONFIG_GPIO_AS_PINRESET
A_FLAGS += -DFLOAT_ABI_HARD
A_FLAGS += -DNRF52
A_FLAGS += -DNRF52832_XXAA
A_FLAGS += -DNRF52_PAN_74
A_FLAGS += -DNRF_SD_BLE_API_VERSION=7
A_FLAGS += -DS132
A_FLAGS += -DSOFTDEVICE_PRESENT
A_FLAGS += -D__HEAP_SIZE=8192
A_FLAGS += -D__HEAP_SIZE=8192
LINKER_SCRIPT = blinky_gcc_nrf52.ld
# Linker flags
LD_FLAGS += -O$(OPT) -g$(OPT)
LD_FLAGS += -mthumb -mabi=aapcs -L$(NRF_PATH)modules/nrfx/mdk -T$(LINKER_SCRIPT)
LD_FLAGS += -mcpu=$(CPU)
LD_FLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16
LD_FLAGS += -Wl,--gc-sections
LD_FLAGS += --specs=nano.specs
.PHONY: package flash flash_softdevice erase
package: $(TARGET_HEX) $(THIS_MAKEFILE)
nrfutil pkg generate --hw-version 52 --application-version 1 --application $(TARGET_HEX) --sd-req 0xCB --sd-id 0xCB --key-file keys/private.key $(TARGET_PACKAGE)
flash: $(TARGET_HEX) $(THIS_MAKEFILE)
@echo Flashing: $(TARGET_HEX)
nrfjprog -f nrf52 --program $(TARGET_HEX) --sectorerase
nrfjprog -f nrf52 --reset
flash_softdevice:
@echo Flashing: $(NRF_PATH)/components/softdevice/s132/hex/s132_nrf52_7.0.1_softdevice.hex
nrfjprog -f nrf52 --program $(NRF_PATH)/components/softdevice/s132/hex/s132_nrf52_7.0.1_softdevice.hex --sectorerase
nrfjprog -f nrf52 --reset
erase:
nrfjprog -f nrf52 --eraseall
$(OBJ_DIR)/%.d: $(NRF_PATH)/%.S
@mkdir -p $(dir $@)
$(CPP) -MM -MF $@ -MP -MT $(patsubst %.d,%.o,$@) $(C_FLAGS) $(CPP_FLAGS) $(patsubst $(OBJ_DIR)/%.d,$(NRF_PATH)/%.S,$@)
$(OBJ_DIR)/%.o: $(NRF_PATH)/%.c
@mkdir -p $(dir $@)
$(CC) -std=c99 -MP -MD -c -o $@ $< $(C_FLAGS) $(CPP_FLAGS)
$(OBJ_DIR)/%.o: $(NRF_PATH)/%.S
@mkdir -p $(dir $@)
$(CC) -c $(ASMFLAGS) $< -o $@

0
interface/driver.h → include/driver.h
View File

23
include/gpio.h Normal file
View File

@@ -0,0 +1,23 @@
#ifndef __GPIO_H__
#define __GPIO_H__
#include <stdarg.h>
#include "driver.h"
int gpio_open(const struct driver *drv);
int gpio_close(const struct driver *drv);
int gpio_read(const struct driver *drv, char *buffer, unsigned int len);
int gpio_write(const struct driver *drv, const char *buffer, unsigned int len);
int gpio_ioctl(const struct driver *drv, unsigned int cmd, unsigned int argc, va_list args);
static const struct driver_fp gpio_fp = {
.open = gpio_open,
.close = gpio_close,
.read = gpio_read,
.write = gpio_write,
.ioctl = gpio_ioctl
};
#endif

100
include/platform/narf52/narf52.h Normal file
View File

@@ -0,0 +1,100 @@
#ifndef __PLATFORM_NARF52_NARF52_H__
#define __PLATFORM_NARF52_NARF52_H__
#include <stdint.h>
typedef enum {
/* ======================================= ARM Cortex-M4 Specific Interrupt Numbers ======================================== */
Reset_IRQn = -15, /*!< -15 Reset Vector, invoked on Power up and warm reset */
NonMaskableInt_IRQn = -14, /*!< -14 Non maskable Interrupt, cannot be stopped or preempted */
HardFault_IRQn = -13, /*!< -13 Hard Fault, all classes of Fault */
MemoryManagement_IRQn = -12, /*!< -12 Memory Management, MPU mismatch, including Access Violation
and No Match */
BusFault_IRQn = -11, /*!< -11 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory
related Fault */
UsageFault_IRQn = -10, /*!< -10 Usage Fault, i.e. Undef Instruction, Illegal State Transition */
SVCall_IRQn = -5, /*!< -5 System Service Call via SVC instruction */
DebugMonitor_IRQn = -4, /*!< -4 Debug Monitor */
PendSV_IRQn = -2, /*!< -2 Pendable request for system service */
SysTick_IRQn = -1, /*!< -1 System Tick Timer */
/* =========================================== nrf52 Specific Interrupt Numbers ============================================ */
POWER_CLOCK_IRQn = 0, /*!< 0 POWER_CLOCK */
RADIO_IRQn = 1, /*!< 1 RADIO */
UARTE0_UART0_IRQn = 2, /*!< 2 UARTE0_UART0 */
SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn= 3, /*!< 3 SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0 */
SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn= 4, /*!< 4 SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1 */
NFCT_IRQn = 5, /*!< 5 NFCT */
GPIOTE_IRQn = 6, /*!< 6 GPIOTE */
SAADC_IRQn = 7, /*!< 7 SAADC */
TIMER0_IRQn = 8, /*!< 8 TIMER0 */
TIMER1_IRQn = 9, /*!< 9 TIMER1 */
TIMER2_IRQn = 10, /*!< 10 TIMER2 */
RTC0_IRQn = 11, /*!< 11 RTC0 */
TEMP_IRQn = 12, /*!< 12 TEMP */
RNG_IRQn = 13, /*!< 13 RNG */
ECB_IRQn = 14, /*!< 14 ECB */
CCM_AAR_IRQn = 15, /*!< 15 CCM_AAR */
WDT_IRQn = 16, /*!< 16 WDT */
RTC1_IRQn = 17, /*!< 17 RTC1 */
QDEC_IRQn = 18, /*!< 18 QDEC */
COMP_LPCOMP_IRQn = 19, /*!< 19 COMP_LPCOMP */
SWI0_EGU0_IRQn = 20, /*!< 20 SWI0_EGU0 */
SWI1_EGU1_IRQn = 21, /*!< 21 SWI1_EGU1 */
SWI2_EGU2_IRQn = 22, /*!< 22 SWI2_EGU2 */
SWI3_EGU3_IRQn = 23, /*!< 23 SWI3_EGU3 */
SWI4_EGU4_IRQn = 24, /*!< 24 SWI4_EGU4 */
SWI5_EGU5_IRQn = 25, /*!< 25 SWI5_EGU5 */
TIMER3_IRQn = 26, /*!< 26 TIMER3 */
TIMER4_IRQn = 27, /*!< 27 TIMER4 */
PWM0_IRQn = 28, /*!< 28 PWM0 */
PDM_IRQn = 29, /*!< 29 PDM */
MWU_IRQn = 32, /*!< 32 MWU */
PWM1_IRQn = 33, /*!< 33 PWM1 */
PWM2_IRQn = 34, /*!< 34 PWM2 */
SPIM2_SPIS2_SPI2_IRQn = 35, /*!< 35 SPIM2_SPIS2_SPI2 */
RTC2_IRQn = 36, /*!< 36 RTC2 */
I2S_IRQn = 37, /*!< 37 I2S */
FPU_IRQn = 38 /*!< 38 FPU */
} IRQn_Type;
/* =========================================================================================================================== */
/* ================ Processor and Core Peripheral Section ================ */
/* =========================================================================================================================== */
/* =========================== Configuration of the ARM Cortex-M4 Processor and Core Peripherals =========================== */
#define __CM4_REV 0x0001U /*!< CM4 Core Revision */
#define __DSP_PRESENT 0 /*!< DSP present or not */
#define __VTOR_PRESENT 1 /*!< Set to 1 if CPU supports Vector Table Offset Register */
#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
#define __MPU_PRESENT 1 /*!< MPU present */
#define __FPU_PRESENT 1 /*!< FPU present */
#include "core_cm4.h"
struct narf52_gpio_type { /*!< (@ 0x50000000) P0 Structure */
__IM uint32_t RESERVED[321];
__IOM uint32_t OUT; /*!< (@ 0x00000504) Write GPIO port */
__IOM uint32_t OUTSET; /*!< (@ 0x00000508) Set individual bits in GPIO port */
__IOM uint32_t OUTCLR; /*!< (@ 0x0000050C) Clear individual bits in GPIO port */
__IM uint32_t IN; /*!< (@ 0x00000510) Read GPIO port */
__IOM uint32_t DIR; /*!< (@ 0x00000514) Direction of GPIO pins */
__IOM uint32_t DIRSET; /*!< (@ 0x00000518) DIR set register */
__IOM uint32_t DIRCLR; /*!< (@ 0x0000051C) DIR clear register */
__IOM uint32_t LATCH; /*!< (@ 0x00000520) Latch register indicating what GPIO pins that
have met the criteria set in the PIN_CNF[n].SENSE
registers */
__IOM uint32_t DETECTMODE; /*!< (@ 0x00000524) Select between default DETECT signal behaviour
and LDETECT mode */
__IM uint32_t RESERVED1[118];
__IOM uint32_t PIN_CNF[32]; /*!< (@ 0x00000700) Description collection[0]: Configuration of GPIO
pins */
}; /*!< Size = 1920 (0x780) */
#define NARF_P0_BASE 0x50000000UL
#endif

69
include/platform/narf52/narf52_dk.h Normal file
View File

@@ -0,0 +1,69 @@
#ifndef __PLATFORM_NARF52_NARF52_DK_H
#define __PLATFORM_NARF52_NARF52_DK_H
#include "gpio.h"
#include "narf52_gpio.h"
#include "driver.h"
struct narf52_gpio narf_led_1 = {
.pin_number = 17,
.dir = NARF_GPIO_DIR_OUT,
.input = NARF_GPIO_PIN_INPUT_DISCONNECT,
.pull = NARF_GPIO_PIN_NOPULL,
.drive = NARF_GPIO_PIN_S0S1,
.sense = NARF_GPIO_PIN_NOSENSE,
};
struct driver led_1 = {
.name = "LED_1",
.fp = &gpio_fp,
.dev = (void *)&narf_led_1,
};
struct narf52_gpio narf_led_2 = {
.pin_number = 18,
.dir = NARF_GPIO_DIR_OUT,
.input = NARF_GPIO_PIN_INPUT_DISCONNECT,
.pull = NARF_GPIO_PIN_NOPULL,
.drive = NARF_GPIO_PIN_S0S1,
.sense = NARF_GPIO_PIN_NOSENSE,
};
struct driver led_2 = {
.name = "LED_2",
.fp = &gpio_fp,
.dev = (void *)&narf_led_2,
};
struct narf52_gpio narf_led_3 = {
.pin_number = 19,
.dir = NARF_GPIO_DIR_OUT,
.input = NARF_GPIO_PIN_INPUT_DISCONNECT,
.pull = NARF_GPIO_PIN_NOPULL,
.drive = NARF_GPIO_PIN_S0S1,
.sense = NARF_GPIO_PIN_NOSENSE,
};
struct driver led_3 = {
.name = "LED_3",
.fp = &gpio_fp,
.dev = (void *)&narf_led_3,
};
struct narf52_gpio narf_led_4 = {
.pin_number = 20,
.dir = NARF_GPIO_DIR_OUT,
.input = NARF_GPIO_PIN_INPUT_DISCONNECT,
.pull = NARF_GPIO_PIN_NOPULL,
.drive = NARF_GPIO_PIN_S0S1,
.sense = NARF_GPIO_PIN_NOSENSE,
};
struct driver led_4 = {
.name = "LED_4",
.fp = &gpio_fp,
.dev = (void *)&narf_led_4,
};
#endif

48
include/platform/narf52/narf52_gpio.h Normal file
View File

@@ -0,0 +1,48 @@
#ifndef __PLATFORM_NARF52_NARF52_GPIO_H__
#define __PLATFORM_NARF52_NARF52_GPIO_H__
#include <stdint.h>
enum narf52_gpio_direction {
NARF_GPIO_DIR_IN = 0,
NARF_GPIO_DIR_OUT
};
enum narf52_gpio_pin_input {
NARF_GPIO_PIN_INPUT_CONNECT = 0, ///< Connect input buffer.
NARF_GPIO_PIN_INPUT_DISCONNECT ///< Disconnect input buffer.
};
enum narf52_gpio_pin_pull {
NARF_GPIO_PIN_NOPULL = 0, ///< Pin pull-up resistor disabled.
NARF_GPIO_PIN_PULLDOWN = 1, ///< Pin pull-down resistor enabled.
NARF_GPIO_PIN_PULLUP = 3 ///< Pin pull-up resistor enabled.
};
enum narf52_gpio_pin_drive {
NARF_GPIO_PIN_S0S1 = 0, ///< !< Standard '0', standard '1'.
NARF_GPIO_PIN_H0S1 = 1, ///< !< High-drive '0', standard '1'.
NARF_GPIO_PIN_S0H1 = 2, ///< !< Standard '0', high-drive '1'.
NARF_GPIO_PIN_H0H1 = 3, ///< !< High drive '0', high-drive '1'.
NARF_GPIO_PIN_D0S1 = 4, ///< !< Disconnect '0' standard '1'.
NARF_GPIO_PIN_D0H1 = 5, ///< !< Disconnect '0', high-drive '1'.
NARF_GPIO_PIN_S0D1 = 6, ///< !< Standard '0', disconnect '1'.
NARF_GPIO_PIN_H0D1 = 7 ///< !< High-drive '0', disconnect '1'.
};
enum narf52_gpio_pin_sense {
NARF_GPIO_PIN_NOSENSE = 0, ///< Pin sense level disabled.
NARF_GPIO_PIN_SENSE_LOW = 1, ///< Pin sense low level.
NARF_GPIO_PIN_SENSE_HIGH = 2 ///< Pin sense high level.
};
struct narf52_gpio {
uint32_t pin_number;
enum narf52_gpio_direction dir;
enum narf52_gpio_pin_input input;
enum narf52_gpio_pin_pull pull;
enum narf52_gpio_pin_drive drive;
enum narf52_gpio_pin_sense sense;
};
#endif

5
keys/private.key Normal file
View File

@@ -0,0 +1,5 @@
-----BEGIN EC PRIVATE KEY-----
MHcCAQEEIBUF6jhwRdnSh5iTLMSY2mPOvL52av2OLFpWwM5rRWdNoAoGCCqGSM49
AwEHoUQDQgAEIEvRCGx7wLpz5zRcxyw3VaDDucLFQyhW9EgV6jxDROFuw+pDfhVg
7BUeI6Ng0CqBxAaJbIlAImXkm/dVCUpfWA==
-----END EC PRIVATE KEY-----

12
keys/public_key.c Normal file
View File

@@ -0,0 +1,12 @@
/* This file was automatically generated by nrfutil on 2020-03-02 (YY-MM-DD) at 21:49:55 */
#include "stdint.h"
#include "compiler_abstraction.h"
/** @brief Public key used to verify DFU images */
__ALIGN(4) const uint8_t pk[64] =
{
0xe1, 0x44, 0x43, 0x3c, 0xea, 0x15, 0x48, 0xf4, 0x56, 0x28, 0x43, 0xc5, 0xc2, 0xb9, 0xc3, 0xa0, 0x55, 0x37, 0x2c, 0xc7, 0x5c, 0x34, 0xe7, 0x73, 0xba, 0xc0, 0x7b, 0x6c, 0x08, 0xd1, 0x4b, 0x20,
0x58, 0x5f, 0x4a, 0x09, 0x55, 0xf7, 0x9b, 0xe4, 0x65, 0x22, 0x40, 0x89, 0x6c, 0x89, 0x06, 0xc4, 0x81, 0x2a, 0xd0, 0x60, 0xa3, 0x23, 0x1e, 0x15, 0xec, 0x60, 0x15, 0x7e, 0x43, 0xea, 0xc3, 0x6e
};

67
src/driver.c Normal file
View File

@@ -0,0 +1,67 @@
#include <stdlib.h>
#include <assert.h>
#include "driver.h"
int drv_open(const struct driver *drv)
{
int res = -1;
assert(drv != NULL);
if(drv->fp->open) {
res = drv->fp->open(drv);
}
return res;
}
int drv_close(const struct driver *drv)
{
int res = -1;
assert(drv != NULL);
if(drv->fp->close) {
res = drv->fp->close(drv);
}
return res;
}
int drv_read(const struct driver *drv, char *buffer, unsigned int length)
{
int res = -1;
assert(drv != NULL);
if(drv->fp->read) {
res = drv->fp->read(drv, buffer, length);
}
return res;
}
int drv_write(const struct driver *drv, const char *buffer, unsigned int length)
{
int res = -1;
assert(drv != NULL);
if(drv->fp->write) {
res = drv->fp->write(drv, buffer, length);
}
return res;
}
int drv_ioctl(const struct driver *drv, unsigned int cmd, unsigned int argc, ...)
{
int res = -1;
assert(drv != NULL);
if(drv->fp->ioctl) {
va_list args;
va_start(args, argc);
res = drv->fp->ioctl(drv, cmd, argc, args);
va_end(args);
}
return res;
}

81
src/main.c
View File

@@ -1,77 +1,28 @@
/**
* Copyright (c) 2014 - 2019, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/** @file
*
* @defgroup blinky_example_main main.c
* @{
* @ingroup blinky_example
* @brief Blinky Example Application main file.
*
* This file contains the source code for a sample application to blink LEDs.
*
*/
#include <stdbool.h>
#include <stdint.h>
#include "nrf_delay.h"
#include "boards.h"
/**
* @brief Function for application main entry.
*/
#include "platform/narf52/narf52_dk.h"
#include "driver.h"
int main(void)
{
/* Configure board. */
bsp_board_init(BSP_INIT_LEDS);
// bsp_board_init(BSP_INIT_LEDS);
drv_open(&led_1);
drv_open(&led_2);
drv_open(&led_3);
drv_open(&led_4);
/* Toggle LEDs. */
while (true)
{
for (int i = 0; i < 4; i++)
{
bsp_board_led_invert(i);
while(true) {
for(uint32_t i = 0; i < UINT32_MAX; i++) {
char x = 0x30 | (char)(1 & i);
drv_write(&led_1, &x, 1);
drv_write(&led_2, &x, 1);
drv_write(&led_3, &x, 1);
drv_write(&led_4, &x, 1);
nrf_delay_ms(500);
}
}
}
/**
*@}
**/

82
src/platform/nrf52/gpio.c Normal file
View File

@@ -0,0 +1,82 @@
#include <assert.h>
#include <fcntl.h>
#include <stddef.h>
#include <stdio.h>
#include <unistd.h>
#include "platform/narf52/narf52.h"
#include "platform/narf52/narf52_gpio.h"
#include "gpio.h"
int gpio_open(const struct driver *drv)
{
assert(NULL != drv);
int res = -1;
struct narf52_gpio *this = (struct narf52_gpio *)(drv->dev);
struct narf52_gpio_type *reg = (struct narf52_gpio_type *)NARF_P0_BASE;
reg->PIN_CNF[this->pin_number] = ((uint32_t)(this->dir) << 0)
| ((uint32_t)(this->input) << 1)
| ((uint32_t)(this->pull) << 2)
| ((uint32_t)(this->drive) << 8)
| ((uint32_t)(this->sense) << 16);
return res;
}
int gpio_close(const struct driver *drv)
{
assert(NULL != drv);
int res = -1;
struct gpio *this = (struct gpio *)(drv->dev);
this = this;
return res;
}
int gpio_read(const struct driver *drv, char *buffer, unsigned int len)
{
assert((NULL != drv) && (buffer != NULL));
if(len == 0) {
return 0;
}
struct narf52_gpio *this = (struct narf52_gpio *)(drv->dev);
struct narf52_gpio_type *reg = (struct narf52_gpio_type *)NARF_P0_BASE;
uint32_t state = ((reg->IN) >> (this->pin_number) & 1UL);
if(state) {
buffer[0] = 0x31;
} else {
buffer[0] = 0x30;
}
return 1;
}
int gpio_write(const struct driver *drv, const char *buffer, unsigned int len)
{
assert((NULL != drv) && (buffer != NULL));
if(len == 0) {
return 0;
}
struct narf52_gpio *this = (struct narf52_gpio *)(drv->dev);
struct narf52_gpio_type *reg = (struct narf52_gpio_type *)NARF_P0_BASE;
if(buffer[0] != 0x30) {
reg->OUTSET = 1 << (this->pin_number);
} else {
reg->OUTCLR = 1 << (this->pin_number);
}
return 1;
}
int gpio_ioctl(const struct driver *drv, unsigned int cmd, unsigned int argc, va_list args)
{
assert(drv != 0);
int res = -1;
struct gpio *this = (struct gpio *)(drv->dev);
this = this;
return res;
}