97 lines
3.5 KiB
C
97 lines
3.5 KiB
C
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#include "stm32g0xx.h"
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#if !defined (HSE_VALUE)
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#define HSE_VALUE (8000000UL) /*!< Value of the External oscillator in Hz */
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#endif /* HSE_VALUE */
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#if !defined (HSI_VALUE)
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#define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
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#endif /* HSI_VALUE */
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#if !defined (LSI_VALUE)
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#define LSI_VALUE (32000UL) /*!< Value of LSI in Hz*/
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#endif /* LSI_VALUE */
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#if !defined (LSE_VALUE)
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#define LSE_VALUE (32768UL) /*!< Value of LSE in Hz*/
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#endif /* LSE_VALUE */
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/*!< Uncomment the following line if you need to relocate your vector Table in
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Internal SRAM. */
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/* #define VECT_TAB_SRAM */
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#define VECT_TAB_OFFSET 0x0U /*!< Vector Table base offset field.
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This value must be a multiple of 0x100. */
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/* The SystemCoreClock variable is updated in three ways:
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1) by calling CMSIS function SystemCoreClockUpdate()
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2) by calling HAL API function HAL_RCC_GetHCLKFreq()
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3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
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Note: If you use this function to configure the system clock; then there
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is no need to call the 2 first functions listed above, since SystemCoreClock
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variable is updated automatically.
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*/
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uint32_t SystemCoreClock = 16000000UL;
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const uint32_t AHBPrescTable[16UL] = {0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL, 6UL, 7UL, 8UL, 9UL};
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const uint32_t APBPrescTable[8UL] = {0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL};
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void SystemInit(void)
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{
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#ifdef VECT_TAB_SRAM
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SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
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#else
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SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
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#endif
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}
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void SystemCoreClockUpdate(void)
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{
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uint32_t tmp;
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uint32_t pllvco;
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uint32_t pllr;
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uint32_t pllsource;
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uint32_t pllm;
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uint32_t hsidiv;
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switch (RCC->CFGR & RCC_CFGR_SWS)
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{
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case RCC_CFGR_SWS_0: /* HSE used as system clock */
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SystemCoreClock = HSE_VALUE;
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break;
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case (RCC_CFGR_SWS_1 | RCC_CFGR_SWS_0): /* LSI used as system clock */
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SystemCoreClock = LSI_VALUE;
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break;
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case RCC_CFGR_SWS_2: /* LSE used as system clock */
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SystemCoreClock = LSE_VALUE;
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break;
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case RCC_CFGR_SWS_1: /* PLL used as system clock */
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/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
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SYSCLK = PLL_VCO / PLLR */
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pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
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pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1UL;
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if(pllsource == 0x03UL) {
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/* HSE used as PLL clock source */
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pllvco = (HSE_VALUE / pllm);
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}
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else {
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/* HSI used as PLL clock source */
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pllvco = (HSI_VALUE / pllm);
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}
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pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos);
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pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1UL);
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SystemCoreClock = pllvco/pllr;
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break;
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case 0x00000000U: /* HSI used as system clock */
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default: /* HSI used as system clock */
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hsidiv = (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV))>> RCC_CR_HSIDIV_Pos));
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SystemCoreClock = (HSI_VALUE/hsidiv);
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break;
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}
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/* Compute HCLK clock frequency --------------------------------------------*/
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/* Get HCLK prescaler */
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tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];
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/* HCLK clock frequency */
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SystemCoreClock >>= tmp;
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}
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