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Use nucleo-stm32G031K8

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This commit is contained in:
Thomas Klaehn 2021-07-05 15:08:37 +02:00
parent d38bd4ae27
commit a22139568c
4 changed files with 303 additions and 339 deletions
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12
Core/Inc/main.h
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@ -58,18 +58,12 @@ void Error_Handler(void);
/* USER CODE END EFP */ /* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/ /* Private defines -----------------------------------------------------------*/
#define MCO_Pin GPIO_PIN_0
#define MCO_GPIO_Port GPIOF
#define USART2_TX_Pin GPIO_PIN_2 #define USART2_TX_Pin GPIO_PIN_2
#define USART2_TX_GPIO_Port GPIOA #define USART2_TX_GPIO_Port GPIOA
#define USART2_RX_Pin GPIO_PIN_3 #define USART2_RX_Pin GPIO_PIN_15
#define USART2_RX_GPIO_Port GPIOA #define USART2_RX_GPIO_Port GPIOA
#define LED_GREEN_Pin GPIO_PIN_5 #define LED_GREEN_Pin GPIO_PIN_6
#define LED_GREEN_GPIO_Port GPIOA #define LED_GREEN_GPIO_Port GPIOC
#define TMS_Pin GPIO_PIN_13
#define TMS_GPIO_Port GPIOA
#define TCK_Pin GPIO_PIN_14
#define TCK_GPIO_Port GPIOA
/* USER CODE BEGIN Private defines */ /* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */ /* USER CODE END Private defines */

51
Core/Startup/startup_stm32g071rbtx.s → Core/Startup/startup_stm32g031y8yx.s
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@ -1,8 +1,8 @@
/** /**
****************************************************************************** ******************************************************************************
* @file startup_stm32g071xx.s * @file startup_stm32g031xx.s
* @author MCD Application Team * @author MCD Application Team
* @brief STM32G071xx devices vector table GCC toolchain. * @brief STM32G031xx devices vector table GCC toolchain.
* This module performs: * This module performs:
* - Set the initial SP * - Set the initial SP
* - Set the initial PC == Reset_Handler, * - Set the initial PC == Reset_Handler,
@ -14,7 +14,7 @@
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* Copyright (c) 2018 STMicroelectronics. All rights reserved. * Copyright (c) 2019 STMicroelectronics. All rights reserved.
* *
* This software component is licensed by ST under Apache License, Version 2.0, * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the * the "License"; You may not use this file except in compliance with the
@ -154,19 +154,19 @@ g_pfnVectors:
.word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */ .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
.word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */ .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
.word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */ .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
.word UCPD1_2_IRQHandler /* UCPD1, UCPD2 */ .word 0 /* reserved */
.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
.word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */ .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
.word DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler /* DMA1 Channel 4 to Channel 7, DMAMUX1 overrun */ .word DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler /* DMA1 Channel 4 to Channel 5, DMAMUX1 overrun */
.word ADC1_COMP_IRQHandler /* ADC1, COMP1 and COMP2 */ .word ADC1_IRQHandler /* ADC1 */
.word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */ .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
.word TIM2_IRQHandler /* TIM2 */ .word TIM2_IRQHandler /* TIM2 */
.word TIM3_IRQHandler /* TIM3 */ .word TIM3_IRQHandler /* TIM3 */
.word TIM6_DAC_LPTIM1_IRQHandler /* TIM6, DAC and LPTIM1 */ .word LPTIM1_IRQHandler /* LPTIM1 */
.word TIM7_LPTIM2_IRQHandler /* TIM7 and LPTIM2 */ .word LPTIM2_IRQHandler /* LPTIM2 */
.word TIM14_IRQHandler /* TIM14 */ .word TIM14_IRQHandler /* TIM14 */
.word TIM15_IRQHandler /* TIM15 */ .word 0 /* reserved */
.word TIM16_IRQHandler /* TIM16 */ .word TIM16_IRQHandler /* TIM16 */
.word TIM17_IRQHandler /* TIM17 */ .word TIM17_IRQHandler /* TIM17 */
.word I2C1_IRQHandler /* I2C1 */ .word I2C1_IRQHandler /* I2C1 */
@ -175,8 +175,8 @@ g_pfnVectors:
.word SPI2_IRQHandler /* SPI2 */ .word SPI2_IRQHandler /* SPI2 */
.word USART1_IRQHandler /* USART1 */ .word USART1_IRQHandler /* USART1 */
.word USART2_IRQHandler /* USART2 */ .word USART2_IRQHandler /* USART2 */
.word USART3_4_LPUART1_IRQHandler /* USART3, USART4 and LPUART1 */ .word LPUART1_IRQHandler /* LPUART1 */
.word CEC_IRQHandler /* CEC */ .word 0 /* reserved */
/******************************************************************************* /*******************************************************************************
* *
@ -225,20 +225,17 @@ g_pfnVectors:
.weak EXTI4_15_IRQHandler .weak EXTI4_15_IRQHandler
.thumb_set EXTI4_15_IRQHandler,Default_Handler .thumb_set EXTI4_15_IRQHandler,Default_Handler
.weak UCPD1_2_IRQHandler
.thumb_set UCPD1_2_IRQHandler,Default_Handler
.weak DMA1_Channel1_IRQHandler .weak DMA1_Channel1_IRQHandler
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
.weak DMA1_Channel2_3_IRQHandler .weak DMA1_Channel2_3_IRQHandler
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
.weak DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler .weak DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler
.thumb_set DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler,Default_Handler .thumb_set DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler,Default_Handler
.weak ADC1_COMP_IRQHandler .weak ADC1_IRQHandler
.thumb_set ADC1_COMP_IRQHandler,Default_Handler .thumb_set ADC1_IRQHandler,Default_Handler
.weak TIM1_BRK_UP_TRG_COM_IRQHandler .weak TIM1_BRK_UP_TRG_COM_IRQHandler
.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
@ -252,18 +249,15 @@ g_pfnVectors:
.weak TIM3_IRQHandler .weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler .thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM6_DAC_LPTIM1_IRQHandler .weak LPTIM1_IRQHandler
.thumb_set TIM6_DAC_LPTIM1_IRQHandler,Default_Handler .thumb_set LPTIM1_IRQHandler,Default_Handler
.weak TIM7_LPTIM2_IRQHandler .weak LPTIM2_IRQHandler
.thumb_set TIM7_LPTIM2_IRQHandler,Default_Handler .thumb_set LPTIM2_IRQHandler,Default_Handler
.weak TIM14_IRQHandler .weak TIM14_IRQHandler
.thumb_set TIM14_IRQHandler,Default_Handler .thumb_set TIM14_IRQHandler,Default_Handler
.weak TIM15_IRQHandler
.thumb_set TIM15_IRQHandler,Default_Handler
.weak TIM16_IRQHandler .weak TIM16_IRQHandler
.thumb_set TIM16_IRQHandler,Default_Handler .thumb_set TIM16_IRQHandler,Default_Handler
@ -288,11 +282,8 @@ g_pfnVectors:
.weak USART2_IRQHandler .weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler .thumb_set USART2_IRQHandler,Default_Handler
.weak USART3_4_LPUART1_IRQHandler .weak LPUART1_IRQHandler
.thumb_set USART3_4_LPUART1_IRQHandler,Default_Handler .thumb_set LPUART1_IRQHandler,Default_Handler
.weak CEC_IRQHandler
.thumb_set CEC_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

33
Makefile
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@ -21,19 +21,12 @@ Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.c \
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_iwdg.c \ Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_iwdg.c \
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c \ Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c \
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c \ Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c \
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c \
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.c \ Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.c \
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.c \ Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c_ex.c
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.c \
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.c \
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.c \
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.c \
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.c \
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_exti.c
ASM_SOURCES = \ ASM_SOURCES = \
Core/Startup/startup_stm32g071rbtx.s Core/Startup/startup_stm32g031y8yx.s
PREFIX = arm-none-eabi- PREFIX = arm-none-eabi-
CC = $(PREFIX)gcc CC = $(PREFIX)gcc
@ -41,21 +34,13 @@ AS = $(PREFIX)gcc -x assembler-with-cpp
CP = $(PREFIX)objcopy CP = $(PREFIX)objcopy
SZ = $(PREFIX)size SZ = $(PREFIX)size
HEX = $(CP) -O ihex
BIN = $(CP) -O binary -S
CPU = -mcpu=cortex-m0plus CPU = -mcpu=cortex-m0plus
MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI) MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)
AS_DEFS =
C_DEFS = \ C_DEFS = \
-DUSE_HAL_DRIVER \ -DUSE_HAL_DRIVER \
-DSTM32G071xx -DSTM32G071xx
AS_INCLUDES =
C_INCLUDES = \ C_INCLUDES = \
-ICore/Inc \ -ICore/Inc \
-IDrivers/STM32G0xx_HAL_Driver/Inc \ -IDrivers/STM32G0xx_HAL_Driver/Inc \
@ -73,7 +58,7 @@ endif
CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)" CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)"
LDSCRIPT = STM32G071RBTX_FLASH.ld LDSCRIPT = STM32G031Y8YX_Flash.ld
LIBS = -lc -lm -lnosys LIBS = -lc -lm -lnosys
LIBDIR = LIBDIR =
@ -97,16 +82,10 @@ $(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile
$(CC) $(OBJECTS) $(LDFLAGS) -o $@ $(CC) $(OBJECTS) $(LDFLAGS) -o $@
$(SZ) $@ $(SZ) $@
$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
$(HEX) $< $@
$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
$(BIN) $< $@
$(BUILD_DIR): $(BUILD_DIR):
mkdir $@ mkdir $@
clean: clean:
-rm -fR $(BUILD_DIR) -rm -rf $(BUILD_DIR)
-include $(wildcard $(BUILD_DIR)/*.d) -include $(wildcard $(BUILD_DIR)/*.d)

10
STM32G071RBTX_FLASH.ld → STM32G031Y8YX_Flash.ld
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@ -2,9 +2,9 @@
****************************************************************************** ******************************************************************************
* @file LinkerScript.ld * @file LinkerScript.ld
* @author Auto-generated by STM32CubeIDE * @author Auto-generated by STM32CubeIDE
* Abstract : Linker script for NUCLEO-G071RB Board embedding STM32G071RBTx Device from stm32g0 series * @brief Linker script for STM32G031Y8Yx Device from STM32G0 series
* 128Kbytes FLASH * 64Kbytes FLASH
* 36Kbytes RAM * 8Kbytes RAM
* *
* Set heap size, stack size and stack location according * Set heap size, stack size and stack location according
* to application requirements. * to application requirements.
@ -36,8 +36,8 @@ _Min_Stack_Size = 0x400 ; /* required amount of stack */
/* Memories definition */ /* Memories definition */
MEMORY MEMORY
{ {
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 36K RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 8K
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 64K
} }
/* Sections */ /* Sections */