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This commit is contained in:
Thomas Klaehn 2021-07-05 15:08:37 +02:00
parent d38bd4ae27
commit a22139568c
4 changed files with 303 additions and 339 deletions
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12
Core/Inc/main.h
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@ -58,18 +58,12 @@ void Error_Handler(void);
/* USER CODE END EFP */ /* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/ /* Private defines -----------------------------------------------------------*/
#define MCO_Pin GPIO_PIN_0
#define MCO_GPIO_Port GPIOF
#define USART2_TX_Pin GPIO_PIN_2 #define USART2_TX_Pin GPIO_PIN_2
#define USART2_TX_GPIO_Port GPIOA #define USART2_TX_GPIO_Port GPIOA
#define USART2_RX_Pin GPIO_PIN_3 #define USART2_RX_Pin GPIO_PIN_15
#define USART2_RX_GPIO_Port GPIOA #define USART2_RX_GPIO_Port GPIOA
#define LED_GREEN_Pin GPIO_PIN_5 #define LED_GREEN_Pin GPIO_PIN_6
#define LED_GREEN_GPIO_Port GPIOA #define LED_GREEN_GPIO_Port GPIOC
#define TMS_Pin GPIO_PIN_13
#define TMS_GPIO_Port GPIOA
#define TCK_Pin GPIO_PIN_14
#define TCK_GPIO_Port GPIOA
/* USER CODE BEGIN Private defines */ /* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */ /* USER CODE END Private defines */

587
Core/Startup/startup_stm32g071rbtx.s → Core/Startup/startup_stm32g031y8yx.s
View File

@ -1,298 +1,289 @@
/** /**
****************************************************************************** ******************************************************************************
* @file startup_stm32g071xx.s * @file startup_stm32g031xx.s
* @author MCD Application Team * @author MCD Application Team
* @brief STM32G071xx devices vector table GCC toolchain. * @brief STM32G031xx devices vector table GCC toolchain.
* This module performs: * This module performs:
* - Set the initial SP * - Set the initial SP
* - Set the initial PC == Reset_Handler, * - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address * - Set the vector table entries with the exceptions ISR address
* - Branches to main in the C library (which eventually * - Branches to main in the C library (which eventually
* calls main()). * calls main()).
* After Reset the Cortex-M0+ processor is in Thread mode, * After Reset the Cortex-M0+ processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main. * priority is Privileged, and the Stack is set to Main.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* Copyright (c) 2018 STMicroelectronics. All rights reserved. * Copyright (c) 2019 STMicroelectronics. All rights reserved.
* *
* This software component is licensed by ST under Apache License, Version 2.0, * This software component is licensed by ST under Apache License, Version 2.0,
* the "License"; You may not use this file except in compliance with the * the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at: * License. You may obtain a copy of the License at:
* opensource.org/licenses/Apache-2.0 * opensource.org/licenses/Apache-2.0
* *
****************************************************************************** ******************************************************************************
*/ */
.syntax unified .syntax unified
.cpu cortex-m0plus .cpu cortex-m0plus
.fpu softvfp .fpu softvfp
.thumb .thumb
.global g_pfnVectors .global g_pfnVectors
.global Default_Handler .global Default_Handler
/* start address for the initialization values of the .data section. /* start address for the initialization values of the .data section.
defined in linker script */ defined in linker script */
.word _sidata .word _sidata
/* start address for the .data section. defined in linker script */ /* start address for the .data section. defined in linker script */
.word _sdata .word _sdata
/* end address for the .data section. defined in linker script */ /* end address for the .data section. defined in linker script */
.word _edata .word _edata
/* start address for the .bss section. defined in linker script */ /* start address for the .bss section. defined in linker script */
.word _sbss .word _sbss
/* end address for the .bss section. defined in linker script */ /* end address for the .bss section. defined in linker script */
.word _ebss .word _ebss
/** /**
* @brief This is the code that gets called when the processor first * @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely * starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application * necessary set is performed, after which the application
* supplied main() routine is called. * supplied main() routine is called.
* @param None * @param None
* @retval None * @retval None
*/ */
.section .text.Reset_Handler .section .text.Reset_Handler
.weak Reset_Handler .weak Reset_Handler
.type Reset_Handler, %function .type Reset_Handler, %function
Reset_Handler: Reset_Handler:
ldr r0, =_estack ldr r0, =_estack
mov sp, r0 /* set stack pointer */ mov sp, r0 /* set stack pointer */
/* Call the clock system initialization function.*/ /* Call the clock system initialization function.*/
bl SystemInit bl SystemInit
/* Copy the data segment initializers from flash to SRAM */ /* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata ldr r0, =_sdata
ldr r1, =_edata ldr r1, =_edata
ldr r2, =_sidata ldr r2, =_sidata
movs r3, #0 movs r3, #0
b LoopCopyDataInit b LoopCopyDataInit
CopyDataInit: CopyDataInit:
ldr r4, [r2, r3] ldr r4, [r2, r3]
str r4, [r0, r3] str r4, [r0, r3]
adds r3, r3, #4 adds r3, r3, #4
LoopCopyDataInit: LoopCopyDataInit:
adds r4, r0, r3 adds r4, r0, r3
cmp r4, r1 cmp r4, r1
bcc CopyDataInit bcc CopyDataInit
/* Zero fill the bss segment. */ /* Zero fill the bss segment. */
ldr r2, =_sbss ldr r2, =_sbss
ldr r4, =_ebss ldr r4, =_ebss
movs r3, #0 movs r3, #0
b LoopFillZerobss b LoopFillZerobss
FillZerobss: FillZerobss:
str r3, [r2] str r3, [r2]
adds r2, r2, #4 adds r2, r2, #4
LoopFillZerobss: LoopFillZerobss:
cmp r2, r4 cmp r2, r4
bcc FillZerobss bcc FillZerobss
/* Call static constructors */ /* Call static constructors */
bl __libc_init_array bl __libc_init_array
/* Call the application s entry point.*/ /* Call the application s entry point.*/
bl main bl main
LoopForever: LoopForever:
b LoopForever b LoopForever
.size Reset_Handler, .-Reset_Handler .size Reset_Handler, .-Reset_Handler
/** /**
* @brief This is the code that gets called when the processor receives an * @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving * unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger. * the system state for examination by a debugger.
* *
* @param None * @param None
* @retval None * @retval None
*/ */
.section .text.Default_Handler,"ax",%progbits .section .text.Default_Handler,"ax",%progbits
Default_Handler: Default_Handler:
Infinite_Loop: Infinite_Loop:
b Infinite_Loop b Infinite_Loop
.size Default_Handler, .-Default_Handler .size Default_Handler, .-Default_Handler
/****************************************************************************** /******************************************************************************
* *
* The minimal vector table for a Cortex M0. Note that the proper constructs * The minimal vector table for a Cortex M0. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address * must be placed on this to ensure that it ends up at physical address
* 0x0000.0000. * 0x0000.0000.
* *
******************************************************************************/ ******************************************************************************/
.section .isr_vector,"a",%progbits .section .isr_vector,"a",%progbits
.type g_pfnVectors, %object .type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors .size g_pfnVectors, .-g_pfnVectors
g_pfnVectors: g_pfnVectors:
.word _estack .word _estack
.word Reset_Handler .word Reset_Handler
.word NMI_Handler .word NMI_Handler
.word HardFault_Handler .word HardFault_Handler
.word 0 .word 0
.word 0 .word 0
.word 0 .word 0
.word 0 .word 0
.word 0 .word 0
.word 0 .word 0
.word 0 .word 0
.word SVC_Handler .word SVC_Handler
.word 0 .word 0
.word 0 .word 0
.word PendSV_Handler .word PendSV_Handler
.word SysTick_Handler .word SysTick_Handler
.word WWDG_IRQHandler /* Window WatchDog */ .word WWDG_IRQHandler /* Window WatchDog */
.word PVD_IRQHandler /* PVD through EXTI Line detect */ .word PVD_IRQHandler /* PVD through EXTI Line detect */
.word RTC_TAMP_IRQHandler /* RTC through the EXTI line */ .word RTC_TAMP_IRQHandler /* RTC through the EXTI line */
.word FLASH_IRQHandler /* FLASH */ .word FLASH_IRQHandler /* FLASH */
.word RCC_IRQHandler /* RCC */ .word RCC_IRQHandler /* RCC */
.word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */ .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
.word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */ .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
.word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */ .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
.word UCPD1_2_IRQHandler /* UCPD1, UCPD2 */ .word 0 /* reserved */
.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
.word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */ .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
.word DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler /* DMA1 Channel 4 to Channel 7, DMAMUX1 overrun */ .word DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler /* DMA1 Channel 4 to Channel 5, DMAMUX1 overrun */
.word ADC1_COMP_IRQHandler /* ADC1, COMP1 and COMP2 */ .word ADC1_IRQHandler /* ADC1 */
.word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */ .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
.word TIM2_IRQHandler /* TIM2 */ .word TIM2_IRQHandler /* TIM2 */
.word TIM3_IRQHandler /* TIM3 */ .word TIM3_IRQHandler /* TIM3 */
.word TIM6_DAC_LPTIM1_IRQHandler /* TIM6, DAC and LPTIM1 */ .word LPTIM1_IRQHandler /* LPTIM1 */
.word TIM7_LPTIM2_IRQHandler /* TIM7 and LPTIM2 */ .word LPTIM2_IRQHandler /* LPTIM2 */
.word TIM14_IRQHandler /* TIM14 */ .word TIM14_IRQHandler /* TIM14 */
.word TIM15_IRQHandler /* TIM15 */ .word 0 /* reserved */
.word TIM16_IRQHandler /* TIM16 */ .word TIM16_IRQHandler /* TIM16 */
.word TIM17_IRQHandler /* TIM17 */ .word TIM17_IRQHandler /* TIM17 */
.word I2C1_IRQHandler /* I2C1 */ .word I2C1_IRQHandler /* I2C1 */
.word I2C2_IRQHandler /* I2C2 */ .word I2C2_IRQHandler /* I2C2 */
.word SPI1_IRQHandler /* SPI1 */ .word SPI1_IRQHandler /* SPI1 */
.word SPI2_IRQHandler /* SPI2 */ .word SPI2_IRQHandler /* SPI2 */
.word USART1_IRQHandler /* USART1 */ .word USART1_IRQHandler /* USART1 */
.word USART2_IRQHandler /* USART2 */ .word USART2_IRQHandler /* USART2 */
.word USART3_4_LPUART1_IRQHandler /* USART3, USART4 and LPUART1 */ .word LPUART1_IRQHandler /* LPUART1 */
.word CEC_IRQHandler /* CEC */ .word 0 /* reserved */
/******************************************************************************* /*******************************************************************************
* *
* Provide weak aliases for each Exception handler to the Default_Handler. * Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override * As they are weak aliases, any function with the same name will override
* this definition. * this definition.
* *
*******************************************************************************/ *******************************************************************************/
.weak NMI_Handler .weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler .thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler .weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler .thumb_set HardFault_Handler,Default_Handler
.weak SVC_Handler .weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler .thumb_set SVC_Handler,Default_Handler
.weak PendSV_Handler .weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler .thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler .weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler .thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler .weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler .thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_IRQHandler .weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler .thumb_set PVD_IRQHandler,Default_Handler
.weak RTC_TAMP_IRQHandler .weak RTC_TAMP_IRQHandler
.thumb_set RTC_TAMP_IRQHandler,Default_Handler .thumb_set RTC_TAMP_IRQHandler,Default_Handler
.weak FLASH_IRQHandler .weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler .thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_IRQHandler .weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler .thumb_set RCC_IRQHandler,Default_Handler
.weak EXTI0_1_IRQHandler .weak EXTI0_1_IRQHandler
.thumb_set EXTI0_1_IRQHandler,Default_Handler .thumb_set EXTI0_1_IRQHandler,Default_Handler
.weak EXTI2_3_IRQHandler .weak EXTI2_3_IRQHandler
.thumb_set EXTI2_3_IRQHandler,Default_Handler .thumb_set EXTI2_3_IRQHandler,Default_Handler
.weak EXTI4_15_IRQHandler .weak EXTI4_15_IRQHandler
.thumb_set EXTI4_15_IRQHandler,Default_Handler .thumb_set EXTI4_15_IRQHandler,Default_Handler
.weak UCPD1_2_IRQHandler .weak DMA1_Channel1_IRQHandler
.thumb_set UCPD1_2_IRQHandler,Default_Handler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
.weak DMA1_Channel1_IRQHandler .weak DMA1_Channel2_3_IRQHandler
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
.weak DMA1_Channel2_3_IRQHandler .weak DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler .thumb_set DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler,Default_Handler
.weak DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler .weak ADC1_IRQHandler
.thumb_set DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler,Default_Handler .thumb_set ADC1_IRQHandler,Default_Handler
.weak ADC1_COMP_IRQHandler .weak TIM1_BRK_UP_TRG_COM_IRQHandler
.thumb_set ADC1_COMP_IRQHandler,Default_Handler .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
.weak TIM1_BRK_UP_TRG_COM_IRQHandler .weak TIM1_CC_IRQHandler
.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler .thumb_set TIM1_CC_IRQHandler,Default_Handler
.weak TIM1_CC_IRQHandler .weak TIM2_IRQHandler
.thumb_set TIM1_CC_IRQHandler,Default_Handler .thumb_set TIM2_IRQHandler,Default_Handler
.weak TIM2_IRQHandler .weak TIM3_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler .thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM3_IRQHandler .weak LPTIM1_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler .thumb_set LPTIM1_IRQHandler,Default_Handler
.weak TIM6_DAC_LPTIM1_IRQHandler .weak LPTIM2_IRQHandler
.thumb_set TIM6_DAC_LPTIM1_IRQHandler,Default_Handler .thumb_set LPTIM2_IRQHandler,Default_Handler
.weak TIM7_LPTIM2_IRQHandler .weak TIM14_IRQHandler
.thumb_set TIM7_LPTIM2_IRQHandler,Default_Handler .thumb_set TIM14_IRQHandler,Default_Handler
.weak TIM14_IRQHandler .weak TIM16_IRQHandler
.thumb_set TIM14_IRQHandler,Default_Handler .thumb_set TIM16_IRQHandler,Default_Handler
.weak TIM15_IRQHandler .weak TIM17_IRQHandler
.thumb_set TIM15_IRQHandler,Default_Handler .thumb_set TIM17_IRQHandler,Default_Handler
.weak TIM16_IRQHandler .weak I2C1_IRQHandler
.thumb_set TIM16_IRQHandler,Default_Handler .thumb_set I2C1_IRQHandler,Default_Handler
.weak TIM17_IRQHandler .weak I2C2_IRQHandler
.thumb_set TIM17_IRQHandler,Default_Handler .thumb_set I2C2_IRQHandler,Default_Handler
.weak I2C1_IRQHandler .weak SPI1_IRQHandler
.thumb_set I2C1_IRQHandler,Default_Handler .thumb_set SPI1_IRQHandler,Default_Handler
.weak I2C2_IRQHandler .weak SPI2_IRQHandler
.thumb_set I2C2_IRQHandler,Default_Handler .thumb_set SPI2_IRQHandler,Default_Handler
.weak SPI1_IRQHandler .weak USART1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler .thumb_set USART1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler .weak USART2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler .thumb_set USART2_IRQHandler,Default_Handler
.weak USART1_IRQHandler .weak LPUART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler .thumb_set LPUART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
.thumb_set USART2_IRQHandler,Default_Handler
.weak USART3_4_LPUART1_IRQHandler
.thumb_set USART3_4_LPUART1_IRQHandler,Default_Handler
.weak CEC_IRQHandler
.thumb_set CEC_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

33
Makefile
View File

@ -21,19 +21,12 @@ Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.c \
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_iwdg.c \ Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_iwdg.c \
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c \ Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c \
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c \ Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c \
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c \
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.c \ Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.c \
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.c \ Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c_ex.c
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.c \
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.c \
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.c \
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.c \
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.c \
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_exti.c
ASM_SOURCES = \ ASM_SOURCES = \
Core/Startup/startup_stm32g071rbtx.s Core/Startup/startup_stm32g031y8yx.s
PREFIX = arm-none-eabi- PREFIX = arm-none-eabi-
CC = $(PREFIX)gcc CC = $(PREFIX)gcc
@ -41,21 +34,13 @@ AS = $(PREFIX)gcc -x assembler-with-cpp
CP = $(PREFIX)objcopy CP = $(PREFIX)objcopy
SZ = $(PREFIX)size SZ = $(PREFIX)size
HEX = $(CP) -O ihex
BIN = $(CP) -O binary -S
CPU = -mcpu=cortex-m0plus CPU = -mcpu=cortex-m0plus
MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI) MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)
AS_DEFS =
C_DEFS = \ C_DEFS = \
-DUSE_HAL_DRIVER \ -DUSE_HAL_DRIVER \
-DSTM32G071xx -DSTM32G071xx
AS_INCLUDES =
C_INCLUDES = \ C_INCLUDES = \
-ICore/Inc \ -ICore/Inc \
-IDrivers/STM32G0xx_HAL_Driver/Inc \ -IDrivers/STM32G0xx_HAL_Driver/Inc \
@ -73,7 +58,7 @@ endif
CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)" CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)"
LDSCRIPT = STM32G071RBTX_FLASH.ld LDSCRIPT = STM32G031Y8YX_Flash.ld
LIBS = -lc -lm -lnosys LIBS = -lc -lm -lnosys
LIBDIR = LIBDIR =
@ -97,16 +82,10 @@ $(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile
$(CC) $(OBJECTS) $(LDFLAGS) -o $@ $(CC) $(OBJECTS) $(LDFLAGS) -o $@
$(SZ) $@ $(SZ) $@
$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
$(HEX) $< $@
$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
$(BIN) $< $@
$(BUILD_DIR): $(BUILD_DIR):
mkdir $@ mkdir $@
clean: clean:
-rm -fR $(BUILD_DIR) -rm -rf $(BUILD_DIR)
-include $(wildcard $(BUILD_DIR)/*.d) -include $(wildcard $(BUILD_DIR)/*.d)

10
STM32G071RBTX_FLASH.ld → STM32G031Y8YX_Flash.ld
View File

@ -2,9 +2,9 @@
****************************************************************************** ******************************************************************************
* @file LinkerScript.ld * @file LinkerScript.ld
* @author Auto-generated by STM32CubeIDE * @author Auto-generated by STM32CubeIDE
* Abstract : Linker script for NUCLEO-G071RB Board embedding STM32G071RBTx Device from stm32g0 series * @brief Linker script for STM32G031Y8Yx Device from STM32G0 series
* 128Kbytes FLASH * 64Kbytes FLASH
* 36Kbytes RAM * 8Kbytes RAM
* *
* Set heap size, stack size and stack location according * Set heap size, stack size and stack location according
* to application requirements. * to application requirements.
@ -36,8 +36,8 @@ _Min_Stack_Size = 0x400 ; /* required amount of stack */
/* Memories definition */ /* Memories definition */
MEMORY MEMORY
{ {
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 36K RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 8K
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 64K
} }
/* Sections */ /* Sections */