Code reorganization
This commit is contained in:
Thomas Klaehn
parent
1eee0af374
commit
f94eeb5ffe
2
.gitignore
vendored
2
.gitignore
vendored
@ -1 +1 @@
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_build/
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build/
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4
.vscode/launch.json
vendored
4
.vscode/launch.json
vendored
@ -6,7 +6,7 @@
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"type": "cppdbg",
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"request": "launch",
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"args": [],
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"program": "${workspaceFolder}/_build/firmware.elf",
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"program": "${workspaceFolder}/build/firmware.elf",
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"stopAtEntry": true,
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"cwd": "${workspaceRoot}",
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"environment": [],
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@ -43,7 +43,7 @@
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},
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{
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"description": "Load executable into debugger.",
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"text": "file ${workspaceFolder}/_build/firmware.elf",
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"text": "file ${workspaceFolder}/build/firmware.elf",
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"ignoreFailures": false
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},
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{
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41
Makefile
41
Makefile
@ -3,19 +3,12 @@ TARGET = firmware
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DEBUG = 1
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OPT = -O0
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BUILD_DIR = _build
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BUILD_DIR = build
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CC_SOURCES = \
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Core/main.cc \
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platform/stm32g0xx/Gpio.cc \
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platform/stm32g0xx/Uart.cc \
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platform/stm32g0xx/IndependentWatchdog.cc \
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platform/stm32g0xx/low_level_interrupt.cc
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C_SOURCES = \
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platform/stm32g0xx/system_stm32g0xx.c \
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platform/stm32g0xx/syscalls.c \
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platform/stm32g0xx/sysmem.c \
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SRC_DIRS := $(shell find src -type d)
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CC_SOURCES = $(foreach folder, $(SRC_DIRS), $(wildcard $(folder)/*.cc))
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C_SOURCES = $(foreach folder, $(SRC_DIRS), $(wildcard $(folder)/*.c))
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ASM_SOURCES = $(foreach folder, $(SRC_DIRS), $(wildcard $(folder)/*.s))
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PREFIX = arm-none-eabi-
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CC = $(PREFIX)gcc
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@ -30,31 +23,11 @@ BIN = $(CP) -O binary -S
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CPU = -mcpu=cortex-m0plus
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MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)
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ifeq "$(SOC)" "stm32g071"
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C_DEFS = -DSTM32G071xx
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LDSCRIPT = platform/stm32g0xx/STM32G071RBTX_FLASH.ld
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ASM_SOURCES = platform/stm32g0xx/startup_stm32g071rbtx.s
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else
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ifeq "$(SOC)" "stm32g031"
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C_DEFS = -DSTM32G031xx
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LDSCRIPT = platform/stm32g0xx/STM32G031Y8YX_FLASH.ld
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ASM_SOURCES = platform/stm32g0xx/startup_stm32g031y8yx.s
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endif
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endif
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C_INCLUDES = \
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-I. \
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-ICore \
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-Iarch/CMSIS/Device/ST/STM32G0xx/Include \
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-Iarch/CMSIS/Include \
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-Iplatform/stm32g0xx
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LDSCRIPT = src/platform/stm32g0xx/STM32G031Y8YX_FLASH.ld
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ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
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CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
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CFLAGS = $(MCU) $(C_DEFS) $(addprefix -I,$(SRC_DIRS)) $(OPT) -Wall -fdata-sections -ffunction-sections
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ifeq ($(DEBUG), 1)
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CFLAGS += -ggdb3
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File diff suppressed because it is too large
Load Diff
@ -1,177 +0,0 @@
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/**
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******************************************************************************
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* @file LinkerScript.ld
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* @author Auto-generated by STM32CubeIDE
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* Abstract : Linker script for NUCLEO-G071RB Board embedding STM32G071RBTx Device from stm32g0 series
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* 128Kbytes FLASH
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* 36Kbytes RAM
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*
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* Set heap size, stack size and stack location according
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* to application requirements.
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*
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* Set memory bank area and size if external memory is used
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2020 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Entry Point */
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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
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_Min_Heap_Size = 0x200 ; /* required amount of heap */
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_Min_Stack_Size = 0x400 ; /* required amount of stack */
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/* Memories definition */
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MEMORY
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{
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 36K
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FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K
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}
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/* Sections */
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SECTIONS
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{
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/* The startup code into "FLASH" Rom type memory */
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.isr_vector :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} >FLASH
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/* The program code and other data into "FLASH" Rom type memory */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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_etext = .; /* define a global symbols at end of code */
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} >FLASH
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/* Constant data into "FLASH" Rom type memory */
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.rodata :
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{
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. = ALIGN(4);
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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. = ALIGN(4);
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} >FLASH
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.ARM.extab : {
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. = ALIGN(4);
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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. = ALIGN(4);
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} >FLASH
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.ARM : {
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. = ALIGN(4);
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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. = ALIGN(4);
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} >FLASH
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.preinit_array :
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{
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. = ALIGN(4);
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
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} >FLASH
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.init_array :
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{
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. = ALIGN(4);
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
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} >FLASH
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.fini_array :
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{
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. = ALIGN(4);
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(SORT(.fini_array.*)))
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KEEP (*(.fini_array*))
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PROVIDE_HIDDEN (__fini_array_end = .);
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. = ALIGN(4);
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} >FLASH
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/* Used by the startup to initialize data */
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_sidata = LOADADDR(.data);
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/* Initialized data sections into "RAM" Ram type memory */
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.data :
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{
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. = ALIGN(4);
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_sdata = .; /* create a global symbol at data start */
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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*(.RamFunc) /* .RamFunc sections */
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*(.RamFunc*) /* .RamFunc* sections */
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. = ALIGN(4);
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_edata = .; /* define a global symbol at data end */
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} >RAM AT> FLASH
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/* Uninitialized data section into "RAM" Ram type memory */
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. = ALIGN(4);
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.bss :
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{
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/* This is used by the startup in order to initialize the .bss section */
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_sbss = .; /* define a global symbol at bss start */
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__bss_start__ = _sbss;
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .; /* define a global symbol at bss end */
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__bss_end__ = _ebss;
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} >RAM
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/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
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._user_heap_stack :
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{
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. = ALIGN(8);
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PROVIDE ( end = . );
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PROVIDE ( _end = . );
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. = . + _Min_Heap_Size;
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. = . + _Min_Stack_Size;
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. = ALIGN(8);
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} >RAM
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/* Remove information from the compiler libraries */
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/DISCARD/ :
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{
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libc.a ( * )
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libm.a ( * )
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libgcc.a ( * )
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}
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.ARM.attributes 0 : { *(.ARM.attributes) }
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}
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@ -1,299 +0,0 @@
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/**
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******************************************************************************
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* @file startup_stm32g071xx.s
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* @author MCD Application Team
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* @brief STM32G071xx devices vector table GCC toolchain.
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* This module performs:
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* - Set the initial SP
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* - Set the initial PC == Reset_Handler,
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* - Set the vector table entries with the exceptions ISR address
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* - Branches to main in the C library (which eventually
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* calls main()).
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* After Reset the Cortex-M0+ processor is in Thread mode,
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* priority is Privileged, and the Stack is set to Main.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2018 STMicroelectronics. All rights reserved.
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*
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* This software component is licensed by ST under Apache License, Version 2.0,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/Apache-2.0
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*
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******************************************************************************
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*/
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.syntax unified
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.cpu cortex-m0plus
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.fpu softvfp
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.thumb
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.global g_pfnVectors
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.global Default_Handler
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/* start address for the initialization values of the .data section.
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defined in linker script */
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.word _sidata
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/* start address for the .data section. defined in linker script */
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.word _sdata
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/* end address for the .data section. defined in linker script */
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.word _edata
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/* start address for the .bss section. defined in linker script */
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.word _sbss
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/* end address for the .bss section. defined in linker script */
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.word _ebss
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/**
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* @brief This is the code that gets called when the processor first
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* starts execution following a reset event. Only the absolutely
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* necessary set is performed, after which the application
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* supplied main() routine is called.
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* @param None
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* @retval None
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*/
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.section .text.Reset_Handler
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.weak Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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ldr r0, =_estack
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mov sp, r0 /* set stack pointer */
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/* Call the clock system initialization function.*/
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bl SystemInit
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/* Copy the data segment initializers from flash to SRAM */
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ldr r0, =_sdata
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ldr r1, =_edata
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ldr r2, =_sidata
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movs r3, #0
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b LoopCopyDataInit
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CopyDataInit:
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ldr r4, [r2, r3]
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str r4, [r0, r3]
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adds r3, r3, #4
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LoopCopyDataInit:
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adds r4, r0, r3
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cmp r4, r1
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bcc CopyDataInit
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/* Zero fill the bss segment. */
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ldr r2, =_sbss
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ldr r4, =_ebss
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movs r3, #0
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b LoopFillZerobss
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FillZerobss:
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str r3, [r2]
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adds r2, r2, #4
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LoopFillZerobss:
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cmp r2, r4
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bcc FillZerobss
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/* Call static constructors */
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bl __libc_init_array
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@ bl system_early_init
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/* Call the application s entry point.*/
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bl main
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LoopForever:
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b LoopForever
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.size Reset_Handler, .-Reset_Handler
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/**
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* @brief This is the code that gets called when the processor receives an
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* unexpected interrupt. This simply enters an infinite loop, preserving
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* the system state for examination by a debugger.
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*
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* @param None
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* @retval None
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*/
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.section .text.Default_Handler,"ax",%progbits
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Default_Handler:
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Infinite_Loop:
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b Infinite_Loop
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.size Default_Handler, .-Default_Handler
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|
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/******************************************************************************
|
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*
|
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* The minimal vector table for a Cortex M0. Note that the proper constructs
|
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* must be placed on this to ensure that it ends up at physical address
|
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* 0x0000.0000.
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*
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******************************************************************************/
|
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.section .isr_vector,"a",%progbits
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.type g_pfnVectors, %object
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.size g_pfnVectors, .-g_pfnVectors
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g_pfnVectors:
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.word _estack
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.word Reset_Handler
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.word NMI_Handler
|
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.word HardFault_Handler
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.word 0
|
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.word 0
|
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.word 0
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.word 0
|
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.word 0
|
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.word 0
|
||||
.word 0
|
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.word SVC_Handler
|
||||
.word 0
|
||||
.word 0
|
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.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler /* Window WatchDog */
|
||||
.word PVD_IRQHandler /* PVD through EXTI Line detect */
|
||||
.word RTC_TAMP_IRQHandler /* RTC through the EXTI line */
|
||||
.word FLASH_IRQHandler /* FLASH */
|
||||
.word RCC_IRQHandler /* RCC */
|
||||
.word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
|
||||
.word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
|
||||
.word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
|
||||
.word UCPD1_2_IRQHandler /* UCPD1, UCPD2 */
|
||||
.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
|
||||
.word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
|
||||
.word DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler /* DMA1 Channel 4 to Channel 7, DMAMUX1 overrun */
|
||||
.word ADC1_COMP_IRQHandler /* ADC1, COMP1 and COMP2 */
|
||||
.word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */
|
||||
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
|
||||
.word TIM2_IRQHandler /* TIM2 */
|
||||
.word TIM3_IRQHandler /* TIM3 */
|
||||
.word TIM6_DAC_LPTIM1_IRQHandler /* TIM6, DAC and LPTIM1 */
|
||||
.word TIM7_LPTIM2_IRQHandler /* TIM7 and LPTIM2 */
|
||||
.word TIM14_IRQHandler /* TIM14 */
|
||||
.word TIM15_IRQHandler /* TIM15 */
|
||||
.word TIM16_IRQHandler /* TIM16 */
|
||||
.word TIM17_IRQHandler /* TIM17 */
|
||||
.word I2C1_IRQHandler /* I2C1 */
|
||||
.word I2C2_IRQHandler /* I2C2 */
|
||||
.word SPI1_IRQHandler /* SPI1 */
|
||||
.word SPI2_IRQHandler /* SPI2 */
|
||||
.word USART1_IRQHandler /* USART1 */
|
||||
.word USART2_IRQHandler /* USART2 */
|
||||
.word USART3_4_LPUART1_IRQHandler /* USART3, USART4 and LPUART1 */
|
||||
.word CEC_IRQHandler /* CEC */
|
||||
|
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/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
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.thumb_set NMI_Handler,Default_Handler
|
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|
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.weak HardFault_Handler
|
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.thumb_set HardFault_Handler,Default_Handler
|
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|
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.weak SVC_Handler
|
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.thumb_set SVC_Handler,Default_Handler
|
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|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_IRQHandler
|
||||
.thumb_set PVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_TAMP_IRQHandler
|
||||
.thumb_set RTC_TAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_1_IRQHandler
|
||||
.thumb_set EXTI0_1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_3_IRQHandler
|
||||
.thumb_set EXTI2_3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_15_IRQHandler
|
||||
.thumb_set EXTI4_15_IRQHandler,Default_Handler
|
||||
|
||||
.weak UCPD1_2_IRQHandler
|
||||
.thumb_set UCPD1_2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_3_IRQHandler
|
||||
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler
|
||||
.thumb_set DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_COMP_IRQHandler
|
||||
.thumb_set ADC1_COMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_LPTIM1_IRQHandler
|
||||
.thumb_set TIM6_DAC_LPTIM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_LPTIM2_IRQHandler
|
||||
.thumb_set TIM7_LPTIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM14_IRQHandler
|
||||
.thumb_set TIM14_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM15_IRQHandler
|
||||
.thumb_set TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM16_IRQHandler
|
||||
.thumb_set TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM17_IRQHandler
|
||||
.thumb_set TIM17_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_IRQHandler
|
||||
.thumb_set I2C1_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_IRQHandler
|
||||
.thumb_set I2C2_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_4_LPUART1_IRQHandler
|
||||
.thumb_set USART3_4_LPUART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CEC_IRQHandler
|
||||
.thumb_set CEC_IRQHandler,Default_Handler
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
Loading…
Reference in New Issue
Block a user