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ea151c4285
Author | SHA1 | Date | |
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ea151c4285 | ||
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97862f34a6 | ||
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cffedfd6ba | ||
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a22139568c |
5
.vscode/launch.json
vendored
5
.vscode/launch.json
vendored
@ -19,16 +19,13 @@
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|||||||
"environment": [],
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"environment": [],
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"externalConsole": false,
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"externalConsole": false,
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"MIMode": "gdb",
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"MIMode": "gdb",
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"miDebuggerPath": "/usr/bin/arm-none-eabi-gdb",
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"miDebuggerPath": "/usr/local/bin/arm-none-eabi-gdb",
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"debugServerPath": "openocd",
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"debugServerPath": "openocd",
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"debugServerArgs": "-f /usr/local/share/openocd/scripts/interface/stlink.cfg -f /usr/local/share/openocd/scripts/target/stm32g0x.cfg",
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"debugServerArgs": "-f /usr/local/share/openocd/scripts/interface/stlink.cfg -f /usr/local/share/openocd/scripts/target/stm32g0x.cfg",
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"serverLaunchTimeout": 20000,
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"serverLaunchTimeout": 20000,
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"filterStderr": true,
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"filterStderr": true,
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"filterStdout": false,
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"filterStdout": false,
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"serverStarted": "Info : Listening on port 3333 for gdb connections",
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"serverStarted": "Info : Listening on port 3333 for gdb connections",
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// "sourceFileMap": {
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// "/work/":"${workspaceFolder}"
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// },
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"sourceFileMap": {
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"sourceFileMap": {
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"${workspaceRoot}":"${workspaceFolder}"
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"${workspaceRoot}":"${workspaceFolder}"
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},
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},
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@ -58,18 +58,12 @@ void Error_Handler(void);
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/* USER CODE END EFP */
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/* USER CODE END EFP */
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/* Private defines -----------------------------------------------------------*/
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/* Private defines -----------------------------------------------------------*/
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#define MCO_Pin GPIO_PIN_0
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#define MCO_GPIO_Port GPIOF
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#define USART2_TX_Pin GPIO_PIN_2
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#define USART2_TX_Pin GPIO_PIN_2
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#define USART2_TX_GPIO_Port GPIOA
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#define USART2_TX_GPIO_Port GPIOA
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#define USART2_RX_Pin GPIO_PIN_3
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#define USART2_RX_Pin GPIO_PIN_15
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#define USART2_RX_GPIO_Port GPIOA
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#define USART2_RX_GPIO_Port GPIOA
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#define LED_GREEN_Pin GPIO_PIN_5
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#define LED_GREEN_Pin GPIO_PIN_6
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#define LED_GREEN_GPIO_Port GPIOA
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#define LED_GREEN_GPIO_Port GPIOC
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#define TMS_Pin GPIO_PIN_13
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#define TMS_GPIO_Port GPIOA
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#define TCK_Pin GPIO_PIN_14
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#define TCK_GPIO_Port GPIOA
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/* USER CODE BEGIN Private defines */
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/* USER CODE BEGIN Private defines */
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/* USER CODE END Private defines */
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/* USER CODE END Private defines */
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@ -42,9 +42,9 @@ extern "C" {
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/* #define HAL_EXTI_MODULE_ENABLED */
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/* #define HAL_EXTI_MODULE_ENABLED */
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/* #define HAL_FDCAN_MODULE_ENABLED */
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/* #define HAL_FDCAN_MODULE_ENABLED */
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/* #define HAL_HCD_MODULE_ENABLED */
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/* #define HAL_HCD_MODULE_ENABLED */
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/* #define HAL_I2C_MODULE_ENABLED */
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#define HAL_I2C_MODULE_ENABLED
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/* #define HAL_I2S_MODULE_ENABLED */
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/* #define HAL_I2S_MODULE_ENABLED */
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#define HAL_IWDG_MODULE_ENABLED
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/* #define HAL_IWDG_MODULE_ENABLED */
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/* #define HAL_IRDA_MODULE_ENABLED */
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/* #define HAL_IRDA_MODULE_ENABLED */
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/* #define HAL_LPTIM_MODULE_ENABLED */
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/* #define HAL_LPTIM_MODULE_ENABLED */
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/* #define HAL_PCD_MODULE_ENABLED */
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/* #define HAL_PCD_MODULE_ENABLED */
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107
Core/Src/main.c
107
Core/Src/main.c
@ -5,13 +5,16 @@
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#include "main.h"
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#include "main.h"
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IWDG_HandleTypeDef hiwdg;
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UART_HandleTypeDef huart2;
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UART_HandleTypeDef huart2;
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I2C_HandleTypeDef hi2c1;
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uint8_t data[2] = {0};
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void SystemClock_Config(void);
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void SystemClock_Config(void);
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static void MX_GPIO_Init(void);
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static void MX_GPIO_Init(void);
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static void MX_USART2_UART_Init(void);
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static void MX_USART2_UART_Init(void);
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static void MX_IWDG_Init(void);
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static void MX_I2C1_Init(void);
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#ifdef __GNUC__
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#ifdef __GNUC__
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#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
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#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
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@ -28,35 +31,32 @@ PUTCHAR_PROTOTYPE
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|
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int main(void)
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int main(void)
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{
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{
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unsigned int i = 1, j = 40;
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HAL_Init();
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HAL_Init();
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SystemClock_Config();
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SystemClock_Config();
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MX_GPIO_Init();
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MX_GPIO_Init();
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MX_USART2_UART_Init();
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MX_USART2_UART_Init();
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MX_IWDG_Init();
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MX_I2C1_Init();
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while (1) {
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data[0] = 1; // Config register
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if (j < 100) {
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if(HAL_I2C_Master_Transmit_IT(&hi2c1, (uint16_t)(0x48 << 1), data, 1) != HAL_OK) {
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j += 10;
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printf("I2c tx failed.\r\n");
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}
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}
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else if (j < 200) {
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while(1) {};
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j += 20;
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}
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else if (j < 400) {
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j += 40;
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}
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if (j > 800) {
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j = 800;
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}
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}
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printf("%u: Hello World\r\n", i++);
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void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
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HAL_GPIO_TogglePin(LED_GREEN_GPIO_Port, LED_GREEN_Pin);
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{
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HAL_Delay(j);
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if(HAL_I2C_Master_Receive_IT(&hi2c1, (uint16_t)(0x48 << 1), data, 2) != HAL_OK) {
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HAL_IWDG_Refresh(&hiwdg);
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printf("I2c rx failed.\r\n");
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}
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}
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}
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}
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void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
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{
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uint16_t config = (uint16_t)(data[0] << 8) | data[1];
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printf("ADS1115 config register: 0x%04x\r\n", config);
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}
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void SystemClock_Config(void)
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void SystemClock_Config(void)
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{
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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@ -89,24 +89,13 @@ void SystemClock_Config(void)
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Error_Handler();
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Error_Handler();
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}
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}
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2;
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_I2C1;
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PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
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PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
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Error_Handler();
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Error_Handler();
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}
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}
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}
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}
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static void MX_IWDG_Init(void)
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{
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hiwdg.Instance = IWDG;
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hiwdg.Init.Prescaler = IWDG_PRESCALER_4;
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hiwdg.Init.Window = 4095;
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hiwdg.Init.Reload = 4095;
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if (HAL_IWDG_Init(&hiwdg) != HAL_OK) {
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Error_Handler();
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}
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}
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static void MX_USART2_UART_Init(void)
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static void MX_USART2_UART_Init(void)
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{
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{
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huart2.Instance = USART2;
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huart2.Instance = USART2;
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@ -125,6 +114,52 @@ static void MX_USART2_UART_Init(void)
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}
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}
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}
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}
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/**
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* @brief I2C1 Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_I2C1_Init(void)
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{
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/* USER CODE BEGIN I2C1_Init 0 */
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/* USER CODE END I2C1_Init 0 */
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/* USER CODE BEGIN I2C1_Init 1 */
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/* USER CODE END I2C1_Init 1 */
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hi2c1.Instance = I2C1;
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hi2c1.Init.Timing = 0x10707DBC;
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hi2c1.Init.OwnAddress1 = 0;
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hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
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hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
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hi2c1.Init.OwnAddress2 = 0;
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hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
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hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
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hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
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if (HAL_I2C_Init(&hi2c1) != HAL_OK)
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{
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Error_Handler();
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}
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/** Configure Analogue filter
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*/
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if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
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{
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Error_Handler();
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}
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/** Configure Digital filter
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*/
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if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK)
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{
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Error_Handler();
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}
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/* USER CODE BEGIN I2C1_Init 2 */
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||||||
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/* USER CODE END I2C1_Init 2 */
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||||||
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}
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static void MX_GPIO_Init(void)
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static void MX_GPIO_Init(void)
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{
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{
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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@ -148,11 +183,3 @@ void Error_Handler(void)
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while (1) {
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while (1) {
|
||||||
}
|
}
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}
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}
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#ifdef USE_FULL_ASSERT
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|
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void assert_failed(uint8_t *file, uint32_t line)
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|
||||||
{
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|
||||||
/* User can add his own implementation to report the file name and line number,
|
|
||||||
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
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|
||||||
}
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|
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#endif /* USE_FULL_ASSERT */
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@ -32,3 +32,30 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
|
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HAL_GPIO_DeInit(GPIOA, USART2_TX_Pin | USART2_RX_Pin);
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HAL_GPIO_DeInit(GPIOA, USART2_TX_Pin | USART2_RX_Pin);
|
||||||
}
|
}
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||||||
}
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}
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|
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void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
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{
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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if(hi2c->Instance == I2C1) {
|
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__HAL_RCC_GPIOA_CLK_ENABLE();
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GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
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GPIO_InitStruct.Pull = GPIO_PULLUP;
|
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
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GPIO_InitStruct.Alternate = GPIO_AF6_I2C1;
|
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
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__HAL_RCC_I2C1_CLK_ENABLE();
|
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HAL_NVIC_SetPriority(I2C1_IRQn, 0, 0);
|
||||||
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HAL_NVIC_EnableIRQ(I2C1_IRQn);
|
||||||
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}
|
||||||
|
}
|
||||||
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|
||||||
|
void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
|
||||||
|
{
|
||||||
|
if(hi2c->Instance == I2C1) {
|
||||||
|
__HAL_RCC_I2C1_CLK_DISABLE();
|
||||||
|
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9);
|
||||||
|
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_10);
|
||||||
|
HAL_NVIC_DisableIRQ(I2C1_IRQn);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
@ -1,16 +1,16 @@
|
|||||||
#include "main.h"
|
#include "main.h"
|
||||||
#include "stm32g0xx_it.h"
|
#include "stm32g0xx_it.h"
|
||||||
|
|
||||||
|
extern I2C_HandleTypeDef hi2c1;
|
||||||
|
|
||||||
void NMI_Handler(void)
|
void NMI_Handler(void)
|
||||||
{
|
{
|
||||||
while (1) {
|
while (1) {}
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void HardFault_Handler(void)
|
void HardFault_Handler(void)
|
||||||
{
|
{
|
||||||
while (1) {
|
while (1) {}
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void SVC_Handler(void)
|
void SVC_Handler(void)
|
||||||
@ -25,3 +25,12 @@ void SysTick_Handler(void)
|
|||||||
{
|
{
|
||||||
HAL_IncTick();
|
HAL_IncTick();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void I2C1_IRQHandler(void)
|
||||||
|
{
|
||||||
|
if(hi2c1.Instance->ISR & (I2C_FLAG_BERR | I2C_FLAG_ARLO | I2C_FLAG_OVR)) {
|
||||||
|
HAL_I2C_ER_IRQHandler(&hi2c1);
|
||||||
|
} else {
|
||||||
|
HAL_I2C_EV_IRQHandler(&hi2c1);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
@ -1,8 +1,8 @@
|
|||||||
/**
|
/**
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file startup_stm32g071xx.s
|
* @file startup_stm32g031xx.s
|
||||||
* @author MCD Application Team
|
* @author MCD Application Team
|
||||||
* @brief STM32G071xx devices vector table GCC toolchain.
|
* @brief STM32G031xx devices vector table GCC toolchain.
|
||||||
* This module performs:
|
* This module performs:
|
||||||
* - Set the initial SP
|
* - Set the initial SP
|
||||||
* - Set the initial PC == Reset_Handler,
|
* - Set the initial PC == Reset_Handler,
|
||||||
@ -14,7 +14,7 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
* Copyright (c) 2018 STMicroelectronics. All rights reserved.
|
* Copyright (c) 2019 STMicroelectronics. All rights reserved.
|
||||||
*
|
*
|
||||||
* This software component is licensed by ST under Apache License, Version 2.0,
|
* This software component is licensed by ST under Apache License, Version 2.0,
|
||||||
* the "License"; You may not use this file except in compliance with the
|
* the "License"; You may not use this file except in compliance with the
|
||||||
@ -154,19 +154,19 @@ g_pfnVectors:
|
|||||||
.word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
|
.word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
|
||||||
.word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
|
.word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
|
||||||
.word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
|
.word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
|
||||||
.word UCPD1_2_IRQHandler /* UCPD1, UCPD2 */
|
.word 0 /* reserved */
|
||||||
.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
|
.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
|
||||||
.word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
|
.word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
|
||||||
.word DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler /* DMA1 Channel 4 to Channel 7, DMAMUX1 overrun */
|
.word DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler /* DMA1 Channel 4 to Channel 5, DMAMUX1 overrun */
|
||||||
.word ADC1_COMP_IRQHandler /* ADC1, COMP1 and COMP2 */
|
.word ADC1_IRQHandler /* ADC1 */
|
||||||
.word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */
|
.word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */
|
||||||
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
|
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
|
||||||
.word TIM2_IRQHandler /* TIM2 */
|
.word TIM2_IRQHandler /* TIM2 */
|
||||||
.word TIM3_IRQHandler /* TIM3 */
|
.word TIM3_IRQHandler /* TIM3 */
|
||||||
.word TIM6_DAC_LPTIM1_IRQHandler /* TIM6, DAC and LPTIM1 */
|
.word LPTIM1_IRQHandler /* LPTIM1 */
|
||||||
.word TIM7_LPTIM2_IRQHandler /* TIM7 and LPTIM2 */
|
.word LPTIM2_IRQHandler /* LPTIM2 */
|
||||||
.word TIM14_IRQHandler /* TIM14 */
|
.word TIM14_IRQHandler /* TIM14 */
|
||||||
.word TIM15_IRQHandler /* TIM15 */
|
.word 0 /* reserved */
|
||||||
.word TIM16_IRQHandler /* TIM16 */
|
.word TIM16_IRQHandler /* TIM16 */
|
||||||
.word TIM17_IRQHandler /* TIM17 */
|
.word TIM17_IRQHandler /* TIM17 */
|
||||||
.word I2C1_IRQHandler /* I2C1 */
|
.word I2C1_IRQHandler /* I2C1 */
|
||||||
@ -175,8 +175,8 @@ g_pfnVectors:
|
|||||||
.word SPI2_IRQHandler /* SPI2 */
|
.word SPI2_IRQHandler /* SPI2 */
|
||||||
.word USART1_IRQHandler /* USART1 */
|
.word USART1_IRQHandler /* USART1 */
|
||||||
.word USART2_IRQHandler /* USART2 */
|
.word USART2_IRQHandler /* USART2 */
|
||||||
.word USART3_4_LPUART1_IRQHandler /* USART3, USART4 and LPUART1 */
|
.word LPUART1_IRQHandler /* LPUART1 */
|
||||||
.word CEC_IRQHandler /* CEC */
|
.word 0 /* reserved */
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
*
|
*
|
||||||
@ -225,20 +225,17 @@ g_pfnVectors:
|
|||||||
.weak EXTI4_15_IRQHandler
|
.weak EXTI4_15_IRQHandler
|
||||||
.thumb_set EXTI4_15_IRQHandler,Default_Handler
|
.thumb_set EXTI4_15_IRQHandler,Default_Handler
|
||||||
|
|
||||||
.weak UCPD1_2_IRQHandler
|
|
||||||
.thumb_set UCPD1_2_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak DMA1_Channel1_IRQHandler
|
.weak DMA1_Channel1_IRQHandler
|
||||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
.weak DMA1_Channel2_3_IRQHandler
|
.weak DMA1_Channel2_3_IRQHandler
|
||||||
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
|
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
.weak DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler
|
.weak DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler
|
||||||
.thumb_set DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler,Default_Handler
|
.thumb_set DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler,Default_Handler
|
||||||
|
|
||||||
.weak ADC1_COMP_IRQHandler
|
.weak ADC1_IRQHandler
|
||||||
.thumb_set ADC1_COMP_IRQHandler,Default_Handler
|
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
.weak TIM1_BRK_UP_TRG_COM_IRQHandler
|
.weak TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||||
.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
|
.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
|
||||||
@ -252,18 +249,15 @@ g_pfnVectors:
|
|||||||
.weak TIM3_IRQHandler
|
.weak TIM3_IRQHandler
|
||||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
.weak TIM6_DAC_LPTIM1_IRQHandler
|
.weak LPTIM1_IRQHandler
|
||||||
.thumb_set TIM6_DAC_LPTIM1_IRQHandler,Default_Handler
|
.thumb_set LPTIM1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
.weak TIM7_LPTIM2_IRQHandler
|
.weak LPTIM2_IRQHandler
|
||||||
.thumb_set TIM7_LPTIM2_IRQHandler,Default_Handler
|
.thumb_set LPTIM2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
.weak TIM14_IRQHandler
|
.weak TIM14_IRQHandler
|
||||||
.thumb_set TIM14_IRQHandler,Default_Handler
|
.thumb_set TIM14_IRQHandler,Default_Handler
|
||||||
|
|
||||||
.weak TIM15_IRQHandler
|
|
||||||
.thumb_set TIM15_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak TIM16_IRQHandler
|
.weak TIM16_IRQHandler
|
||||||
.thumb_set TIM16_IRQHandler,Default_Handler
|
.thumb_set TIM16_IRQHandler,Default_Handler
|
||||||
|
|
||||||
@ -288,11 +282,8 @@ g_pfnVectors:
|
|||||||
.weak USART2_IRQHandler
|
.weak USART2_IRQHandler
|
||||||
.thumb_set USART2_IRQHandler,Default_Handler
|
.thumb_set USART2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
.weak USART3_4_LPUART1_IRQHandler
|
.weak LPUART1_IRQHandler
|
||||||
.thumb_set USART3_4_LPUART1_IRQHandler,Default_Handler
|
.thumb_set LPUART1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
.weak CEC_IRQHandler
|
|
||||||
.thumb_set CEC_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
782
Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_i2c.h
Normal file
782
Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_i2c.h
Normal file
@ -0,0 +1,782 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32g0xx_hal_i2c.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief Header file of I2C HAL module.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© Copyright (c) 2018 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef STM32G0xx_HAL_I2C_H
|
||||||
|
#define STM32G0xx_HAL_I2C_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32g0xx_hal_def.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32G0xx_HAL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup I2C
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/** @defgroup I2C_Exported_Types I2C Exported Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
|
||||||
|
* @brief I2C Configuration Structure definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value.
|
||||||
|
This parameter calculated by referring to I2C initialization
|
||||||
|
section in Reference manual */
|
||||||
|
|
||||||
|
uint32_t OwnAddress1; /*!< Specifies the first device own address.
|
||||||
|
This parameter can be a 7-bit or 10-bit address. */
|
||||||
|
|
||||||
|
uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
|
||||||
|
This parameter can be a value of @ref I2C_ADDRESSING_MODE */
|
||||||
|
|
||||||
|
uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
|
||||||
|
This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */
|
||||||
|
|
||||||
|
uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
|
||||||
|
This parameter can be a 7-bit address. */
|
||||||
|
|
||||||
|
uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected
|
||||||
|
This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */
|
||||||
|
|
||||||
|
uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
|
||||||
|
This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */
|
||||||
|
|
||||||
|
uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
|
||||||
|
This parameter can be a value of @ref I2C_NOSTRETCH_MODE */
|
||||||
|
|
||||||
|
} I2C_InitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup HAL_state_structure_definition HAL state structure definition
|
||||||
|
* @brief HAL State structure definition
|
||||||
|
* @note HAL I2C State value coding follow below described bitmap :\n
|
||||||
|
* b7-b6 Error information\n
|
||||||
|
* 00 : No Error\n
|
||||||
|
* 01 : Abort (Abort user request on going)\n
|
||||||
|
* 10 : Timeout\n
|
||||||
|
* 11 : Error\n
|
||||||
|
* b5 Peripheral initialization status\n
|
||||||
|
* 0 : Reset (peripheral not initialized)\n
|
||||||
|
* 1 : Init done (peripheral initialized and ready to use. HAL I2C Init function called)\n
|
||||||
|
* b4 (not used)\n
|
||||||
|
* x : Should be set to 0\n
|
||||||
|
* b3\n
|
||||||
|
* 0 : Ready or Busy (No Listen mode ongoing)\n
|
||||||
|
* 1 : Listen (peripheral in Address Listen Mode)\n
|
||||||
|
* b2 Intrinsic process state\n
|
||||||
|
* 0 : Ready\n
|
||||||
|
* 1 : Busy (peripheral busy with some configuration or internal operations)\n
|
||||||
|
* b1 Rx state\n
|
||||||
|
* 0 : Ready (no Rx operation ongoing)\n
|
||||||
|
* 1 : Busy (Rx operation ongoing)\n
|
||||||
|
* b0 Tx state\n
|
||||||
|
* 0 : Ready (no Tx operation ongoing)\n
|
||||||
|
* 1 : Busy (Tx operation ongoing)
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
|
||||||
|
HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
|
||||||
|
HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
|
||||||
|
HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
|
||||||
|
HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
|
||||||
|
HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
|
||||||
|
HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
|
||||||
|
process is ongoing */
|
||||||
|
HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
|
||||||
|
process is ongoing */
|
||||||
|
HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
|
||||||
|
HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
|
||||||
|
HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
|
||||||
|
|
||||||
|
} HAL_I2C_StateTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup HAL_mode_structure_definition HAL mode structure definition
|
||||||
|
* @brief HAL Mode structure definition
|
||||||
|
* @note HAL I2C Mode value coding follow below described bitmap :\n
|
||||||
|
* b7 (not used)\n
|
||||||
|
* x : Should be set to 0\n
|
||||||
|
* b6\n
|
||||||
|
* 0 : None\n
|
||||||
|
* 1 : Memory (HAL I2C communication is in Memory Mode)\n
|
||||||
|
* b5\n
|
||||||
|
* 0 : None\n
|
||||||
|
* 1 : Slave (HAL I2C communication is in Slave Mode)\n
|
||||||
|
* b4\n
|
||||||
|
* 0 : None\n
|
||||||
|
* 1 : Master (HAL I2C communication is in Master Mode)\n
|
||||||
|
* b3-b2-b1-b0 (not used)\n
|
||||||
|
* xxxx : Should be set to 0000
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */
|
||||||
|
HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */
|
||||||
|
HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
|
||||||
|
HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
|
||||||
|
|
||||||
|
} HAL_I2C_ModeTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_Error_Code_definition I2C Error Code definition
|
||||||
|
* @brief I2C Error Code definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */
|
||||||
|
#define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */
|
||||||
|
#define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */
|
||||||
|
#define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */
|
||||||
|
#define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */
|
||||||
|
#define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
|
||||||
|
#define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */
|
||||||
|
#define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */
|
||||||
|
#define HAL_I2C_ERROR_DMA_PARAM (0x00000080U) /*!< DMA Parameter Error */
|
||||||
|
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||||
|
#define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */
|
||||||
|
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||||||
|
#define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U) /*!< Invalid Parameters error */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
|
||||||
|
* @brief I2C handle Structure definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
typedef struct __I2C_HandleTypeDef
|
||||||
|
{
|
||||||
|
I2C_TypeDef *Instance; /*!< I2C registers base address */
|
||||||
|
|
||||||
|
I2C_InitTypeDef Init; /*!< I2C communication parameters */
|
||||||
|
|
||||||
|
uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
|
||||||
|
|
||||||
|
uint16_t XferSize; /*!< I2C transfer size */
|
||||||
|
|
||||||
|
__IO uint16_t XferCount; /*!< I2C transfer counter */
|
||||||
|
|
||||||
|
__IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can
|
||||||
|
be a value of @ref I2C_XFEROPTIONS */
|
||||||
|
|
||||||
|
__IO uint32_t PreviousState; /*!< I2C communication Previous state */
|
||||||
|
|
||||||
|
HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */
|
||||||
|
|
||||||
|
DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
|
||||||
|
|
||||||
|
DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
|
||||||
|
|
||||||
|
HAL_LockTypeDef Lock; /*!< I2C locking object */
|
||||||
|
|
||||||
|
__IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
|
||||||
|
|
||||||
|
__IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */
|
||||||
|
|
||||||
|
__IO uint32_t ErrorCode; /*!< I2C Error code */
|
||||||
|
|
||||||
|
__IO uint32_t AddrEventCount; /*!< I2C Address Event counter */
|
||||||
|
|
||||||
|
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||||
|
void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Tx Transfer completed callback */
|
||||||
|
void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Rx Transfer completed callback */
|
||||||
|
void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Tx Transfer completed callback */
|
||||||
|
void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Rx Transfer completed callback */
|
||||||
|
void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Listen Complete callback */
|
||||||
|
void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Tx Transfer completed callback */
|
||||||
|
void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Rx Transfer completed callback */
|
||||||
|
void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Error callback */
|
||||||
|
void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Abort callback */
|
||||||
|
|
||||||
|
void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< I2C Slave Address Match callback */
|
||||||
|
|
||||||
|
void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp Init callback */
|
||||||
|
void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp DeInit callback */
|
||||||
|
|
||||||
|
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||||||
|
} I2C_HandleTypeDef;
|
||||||
|
|
||||||
|
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||||
|
/**
|
||||||
|
* @brief HAL I2C Callback ID enumeration definition
|
||||||
|
*/
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */
|
||||||
|
HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */
|
||||||
|
HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */
|
||||||
|
HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */
|
||||||
|
HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */
|
||||||
|
HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */
|
||||||
|
HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */
|
||||||
|
HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */
|
||||||
|
HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */
|
||||||
|
|
||||||
|
HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */
|
||||||
|
HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */
|
||||||
|
|
||||||
|
} HAL_I2C_CallbackIDTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief HAL I2C Callback pointer definition
|
||||||
|
*/
|
||||||
|
typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); /*!< pointer to an I2C callback function */
|
||||||
|
typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */
|
||||||
|
|
||||||
|
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_Exported_Constants I2C Exported Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
|
||||||
|
#define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
|
||||||
|
#define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
|
||||||
|
#define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
|
||||||
|
#define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
|
||||||
|
#define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE)
|
||||||
|
|
||||||
|
/* List of XferOptions in usage of :
|
||||||
|
* 1- Restart condition in all use cases (direction change or not)
|
||||||
|
*/
|
||||||
|
#define I2C_OTHER_FRAME (0x000000AAU)
|
||||||
|
#define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define I2C_ADDRESSINGMODE_7BIT (0x00000001U)
|
||||||
|
#define I2C_ADDRESSINGMODE_10BIT (0x00000002U)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define I2C_DUALADDRESS_DISABLE (0x00000000U)
|
||||||
|
#define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define I2C_OA2_NOMASK ((uint8_t)0x00U)
|
||||||
|
#define I2C_OA2_MASK01 ((uint8_t)0x01U)
|
||||||
|
#define I2C_OA2_MASK02 ((uint8_t)0x02U)
|
||||||
|
#define I2C_OA2_MASK03 ((uint8_t)0x03U)
|
||||||
|
#define I2C_OA2_MASK04 ((uint8_t)0x04U)
|
||||||
|
#define I2C_OA2_MASK05 ((uint8_t)0x05U)
|
||||||
|
#define I2C_OA2_MASK06 ((uint8_t)0x06U)
|
||||||
|
#define I2C_OA2_MASK07 ((uint8_t)0x07U)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define I2C_GENERALCALL_DISABLE (0x00000000U)
|
||||||
|
#define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define I2C_NOSTRETCH_DISABLE (0x00000000U)
|
||||||
|
#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define I2C_MEMADD_SIZE_8BIT (0x00000001U)
|
||||||
|
#define I2C_MEMADD_SIZE_16BIT (0x00000002U)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define I2C_DIRECTION_TRANSMIT (0x00000000U)
|
||||||
|
#define I2C_DIRECTION_RECEIVE (0x00000001U)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define I2C_RELOAD_MODE I2C_CR2_RELOAD
|
||||||
|
#define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
|
||||||
|
#define I2C_SOFTEND_MODE (0x00000000U)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define I2C_NO_STARTSTOP (0x00000000U)
|
||||||
|
#define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP)
|
||||||
|
#define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
|
||||||
|
#define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
|
||||||
|
* @brief I2C Interrupt definition
|
||||||
|
* Elements values convention: 0xXXXXXXXX
|
||||||
|
* - XXXXXXXX : Interrupt control mask
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define I2C_IT_ERRI I2C_CR1_ERRIE
|
||||||
|
#define I2C_IT_TCI I2C_CR1_TCIE
|
||||||
|
#define I2C_IT_STOPI I2C_CR1_STOPIE
|
||||||
|
#define I2C_IT_NACKI I2C_CR1_NACKIE
|
||||||
|
#define I2C_IT_ADDRI I2C_CR1_ADDRIE
|
||||||
|
#define I2C_IT_RXI I2C_CR1_RXIE
|
||||||
|
#define I2C_IT_TXI I2C_CR1_TXIE
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_Flag_definition I2C Flag definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define I2C_FLAG_TXE I2C_ISR_TXE
|
||||||
|
#define I2C_FLAG_TXIS I2C_ISR_TXIS
|
||||||
|
#define I2C_FLAG_RXNE I2C_ISR_RXNE
|
||||||
|
#define I2C_FLAG_ADDR I2C_ISR_ADDR
|
||||||
|
#define I2C_FLAG_AF I2C_ISR_NACKF
|
||||||
|
#define I2C_FLAG_STOPF I2C_ISR_STOPF
|
||||||
|
#define I2C_FLAG_TC I2C_ISR_TC
|
||||||
|
#define I2C_FLAG_TCR I2C_ISR_TCR
|
||||||
|
#define I2C_FLAG_BERR I2C_ISR_BERR
|
||||||
|
#define I2C_FLAG_ARLO I2C_ISR_ARLO
|
||||||
|
#define I2C_FLAG_OVR I2C_ISR_OVR
|
||||||
|
#define I2C_FLAG_PECERR I2C_ISR_PECERR
|
||||||
|
#define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
|
||||||
|
#define I2C_FLAG_ALERT I2C_ISR_ALERT
|
||||||
|
#define I2C_FLAG_BUSY I2C_ISR_BUSY
|
||||||
|
#define I2C_FLAG_DIR I2C_ISR_DIR
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported macros -----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_Exported_Macros I2C Exported Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @brief Reset I2C handle state.
|
||||||
|
* @param __HANDLE__ specifies the I2C Handle.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||||
|
#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||||
|
(__HANDLE__)->State = HAL_I2C_STATE_RESET; \
|
||||||
|
(__HANDLE__)->MspInitCallback = NULL; \
|
||||||
|
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||||
|
} while(0)
|
||||||
|
#else
|
||||||
|
#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** @brief Enable the specified I2C interrupt.
|
||||||
|
* @param __HANDLE__ specifies the I2C Handle.
|
||||||
|
* @param __INTERRUPT__ specifies the interrupt source to enable.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg @ref I2C_IT_ERRI Errors interrupt enable
|
||||||
|
* @arg @ref I2C_IT_TCI Transfer complete interrupt enable
|
||||||
|
* @arg @ref I2C_IT_STOPI STOP detection interrupt enable
|
||||||
|
* @arg @ref I2C_IT_NACKI NACK received interrupt enable
|
||||||
|
* @arg @ref I2C_IT_ADDRI Address match interrupt enable
|
||||||
|
* @arg @ref I2C_IT_RXI RX interrupt enable
|
||||||
|
* @arg @ref I2C_IT_TXI TX interrupt enable
|
||||||
|
*
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
|
||||||
|
|
||||||
|
/** @brief Disable the specified I2C interrupt.
|
||||||
|
* @param __HANDLE__ specifies the I2C Handle.
|
||||||
|
* @param __INTERRUPT__ specifies the interrupt source to disable.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg @ref I2C_IT_ERRI Errors interrupt enable
|
||||||
|
* @arg @ref I2C_IT_TCI Transfer complete interrupt enable
|
||||||
|
* @arg @ref I2C_IT_STOPI STOP detection interrupt enable
|
||||||
|
* @arg @ref I2C_IT_NACKI NACK received interrupt enable
|
||||||
|
* @arg @ref I2C_IT_ADDRI Address match interrupt enable
|
||||||
|
* @arg @ref I2C_IT_RXI RX interrupt enable
|
||||||
|
* @arg @ref I2C_IT_TXI TX interrupt enable
|
||||||
|
*
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
|
||||||
|
|
||||||
|
/** @brief Check whether the specified I2C interrupt source is enabled or not.
|
||||||
|
* @param __HANDLE__ specifies the I2C Handle.
|
||||||
|
* @param __INTERRUPT__ specifies the I2C interrupt source to check.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg @ref I2C_IT_ERRI Errors interrupt enable
|
||||||
|
* @arg @ref I2C_IT_TCI Transfer complete interrupt enable
|
||||||
|
* @arg @ref I2C_IT_STOPI STOP detection interrupt enable
|
||||||
|
* @arg @ref I2C_IT_NACKI NACK received interrupt enable
|
||||||
|
* @arg @ref I2C_IT_ADDRI Address match interrupt enable
|
||||||
|
* @arg @ref I2C_IT_RXI RX interrupt enable
|
||||||
|
* @arg @ref I2C_IT_TXI TX interrupt enable
|
||||||
|
*
|
||||||
|
* @retval The new state of __INTERRUPT__ (SET or RESET).
|
||||||
|
*/
|
||||||
|
#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||||
|
|
||||||
|
/** @brief Check whether the specified I2C flag is set or not.
|
||||||
|
* @param __HANDLE__ specifies the I2C Handle.
|
||||||
|
* @param __FLAG__ specifies the flag to check.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg @ref I2C_FLAG_TXE Transmit data register empty
|
||||||
|
* @arg @ref I2C_FLAG_TXIS Transmit interrupt status
|
||||||
|
* @arg @ref I2C_FLAG_RXNE Receive data register not empty
|
||||||
|
* @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
|
||||||
|
* @arg @ref I2C_FLAG_AF Acknowledge failure received flag
|
||||||
|
* @arg @ref I2C_FLAG_STOPF STOP detection flag
|
||||||
|
* @arg @ref I2C_FLAG_TC Transfer complete (master mode)
|
||||||
|
* @arg @ref I2C_FLAG_TCR Transfer complete reload
|
||||||
|
* @arg @ref I2C_FLAG_BERR Bus error
|
||||||
|
* @arg @ref I2C_FLAG_ARLO Arbitration lost
|
||||||
|
* @arg @ref I2C_FLAG_OVR Overrun/Underrun
|
||||||
|
* @arg @ref I2C_FLAG_PECERR PEC error in reception
|
||||||
|
* @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
|
||||||
|
* @arg @ref I2C_FLAG_ALERT SMBus alert
|
||||||
|
* @arg @ref I2C_FLAG_BUSY Bus busy
|
||||||
|
* @arg @ref I2C_FLAG_DIR Transfer direction (slave mode)
|
||||||
|
*
|
||||||
|
* @retval The new state of __FLAG__ (SET or RESET).
|
||||||
|
*/
|
||||||
|
#define I2C_FLAG_MASK (0x0001FFFFU)
|
||||||
|
#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
|
||||||
|
|
||||||
|
/** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit.
|
||||||
|
* @param __HANDLE__ specifies the I2C Handle.
|
||||||
|
* @param __FLAG__ specifies the flag to clear.
|
||||||
|
* This parameter can be any combination of the following values:
|
||||||
|
* @arg @ref I2C_FLAG_TXE Transmit data register empty
|
||||||
|
* @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
|
||||||
|
* @arg @ref I2C_FLAG_AF Acknowledge failure received flag
|
||||||
|
* @arg @ref I2C_FLAG_STOPF STOP detection flag
|
||||||
|
* @arg @ref I2C_FLAG_BERR Bus error
|
||||||
|
* @arg @ref I2C_FLAG_ARLO Arbitration lost
|
||||||
|
* @arg @ref I2C_FLAG_OVR Overrun/Underrun
|
||||||
|
* @arg @ref I2C_FLAG_PECERR PEC error in reception
|
||||||
|
* @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
|
||||||
|
* @arg @ref I2C_FLAG_ALERT SMBus alert
|
||||||
|
*
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \
|
||||||
|
: ((__HANDLE__)->Instance->ICR = (__FLAG__)))
|
||||||
|
|
||||||
|
/** @brief Enable the specified I2C peripheral.
|
||||||
|
* @param __HANDLE__ specifies the I2C Handle.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
|
||||||
|
|
||||||
|
/** @brief Disable the specified I2C peripheral.
|
||||||
|
* @param __HANDLE__ specifies the I2C Handle.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
|
||||||
|
|
||||||
|
/** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode.
|
||||||
|
* @param __HANDLE__ specifies the I2C Handle.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Include I2C HAL Extended module */
|
||||||
|
#include "stm32g0xx_hal_i2c_ex.h"
|
||||||
|
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
/** @addtogroup I2C_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* Initialization and de-initialization functions******************************/
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
|
||||||
|
void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
|
||||||
|
void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
|
||||||
|
|
||||||
|
/* Callbacks Register/UnRegister functions ***********************************/
|
||||||
|
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||||
|
HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID);
|
||||||
|
|
||||||
|
HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c);
|
||||||
|
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* IO operation functions ****************************************************/
|
||||||
|
/******* Blocking mode: Polling */
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
|
||||||
|
|
||||||
|
/******* Non-Blocking mode: Interrupt */
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
||||||
|
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
|
||||||
|
|
||||||
|
/******* Non-Blocking mode: DMA */
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
||||||
|
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
|
||||||
|
void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
|
||||||
|
void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
|
||||||
|
void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||||
|
void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||||
|
void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||||
|
void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||||
|
void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
|
||||||
|
void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||||
|
void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||||
|
void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||||
|
void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
|
||||||
|
void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* Peripheral State, Mode and Error functions *********************************/
|
||||||
|
HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
|
||||||
|
HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
|
||||||
|
uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private constants ---------------------------------------------------------*/
|
||||||
|
/** @defgroup I2C_Private_Constants I2C Private Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
/** @defgroup I2C_Private_Macro I2C Private Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
|
||||||
|
((MODE) == I2C_ADDRESSINGMODE_10BIT))
|
||||||
|
|
||||||
|
#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
|
||||||
|
((ADDRESS) == I2C_DUALADDRESS_ENABLE))
|
||||||
|
|
||||||
|
#define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \
|
||||||
|
((MASK) == I2C_OA2_MASK01) || \
|
||||||
|
((MASK) == I2C_OA2_MASK02) || \
|
||||||
|
((MASK) == I2C_OA2_MASK03) || \
|
||||||
|
((MASK) == I2C_OA2_MASK04) || \
|
||||||
|
((MASK) == I2C_OA2_MASK05) || \
|
||||||
|
((MASK) == I2C_OA2_MASK06) || \
|
||||||
|
((MASK) == I2C_OA2_MASK07))
|
||||||
|
|
||||||
|
#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
|
||||||
|
((CALL) == I2C_GENERALCALL_ENABLE))
|
||||||
|
|
||||||
|
#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
|
||||||
|
((STRETCH) == I2C_NOSTRETCH_ENABLE))
|
||||||
|
|
||||||
|
#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
|
||||||
|
((SIZE) == I2C_MEMADD_SIZE_16BIT))
|
||||||
|
|
||||||
|
#define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \
|
||||||
|
((MODE) == I2C_AUTOEND_MODE) || \
|
||||||
|
((MODE) == I2C_SOFTEND_MODE))
|
||||||
|
|
||||||
|
#define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \
|
||||||
|
((REQUEST) == I2C_GENERATE_START_READ) || \
|
||||||
|
((REQUEST) == I2C_GENERATE_START_WRITE) || \
|
||||||
|
((REQUEST) == I2C_NO_STARTSTOP))
|
||||||
|
|
||||||
|
#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
|
||||||
|
((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
|
||||||
|
((REQUEST) == I2C_NEXT_FRAME) || \
|
||||||
|
((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
|
||||||
|
((REQUEST) == I2C_LAST_FRAME) || \
|
||||||
|
((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \
|
||||||
|
IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
|
||||||
|
|
||||||
|
#define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \
|
||||||
|
((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
|
||||||
|
|
||||||
|
#define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
|
||||||
|
|
||||||
|
#define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U))
|
||||||
|
#define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U))
|
||||||
|
#define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
|
||||||
|
#define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1))
|
||||||
|
#define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2))
|
||||||
|
|
||||||
|
#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
|
||||||
|
#define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
|
||||||
|
|
||||||
|
#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U)))
|
||||||
|
#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
|
||||||
|
|
||||||
|
#define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
|
||||||
|
(uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
|
||||||
|
|
||||||
|
#define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
|
||||||
|
#define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private Functions ---------------------------------------------------------*/
|
||||||
|
/** @defgroup I2C_Private_Functions I2C Private Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* Private functions are defined in stm32g0xx_hal_i2c.c file */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* STM32G0xx_HAL_I2C_H */
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
166
Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_i2c_ex.h
Normal file
166
Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_i2c_ex.h
Normal file
@ -0,0 +1,166 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32g0xx_hal_i2c_ex.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief Header file of I2C HAL Extended module.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© Copyright (c) 2018 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef STM32G0xx_HAL_I2C_EX_H
|
||||||
|
#define STM32G0xx_HAL_I2C_EX_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32g0xx_hal_def.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32G0xx_HAL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup I2CEx
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
|
||||||
|
/** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define I2C_ANALOGFILTER_ENABLE 0x00000000U
|
||||||
|
#define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define I2C_FMP_NOT_SUPPORTED 0xAAAA0000U /*!< Fast Mode Plus not supported */
|
||||||
|
#define I2C_FASTMODEPLUS_PA9 SYSCFG_CFGR1_I2C_PA9_FMP /*!< Enable Fast Mode Plus on PA9 */
|
||||||
|
#define I2C_FASTMODEPLUS_PA10 SYSCFG_CFGR1_I2C_PA10_FMP /*!< Enable Fast Mode Plus on PA10 */
|
||||||
|
#define I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */
|
||||||
|
#define I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */
|
||||||
|
#define I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */
|
||||||
|
#define I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */
|
||||||
|
#define I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */
|
||||||
|
#define I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */
|
||||||
|
#if defined(SYSCFG_CFGR1_I2C3_FMP)
|
||||||
|
#define I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR1_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */
|
||||||
|
#else
|
||||||
|
#define I2C_FASTMODEPLUS_I2C3 (uint32_t)(0x00000400U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C3 not supported */
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
|
||||||
|
/** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup I2CEx_Exported_Functions_Group1 Extended features functions
|
||||||
|
* @brief Extended features functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Peripheral Control functions ************************************************/
|
||||||
|
HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter);
|
||||||
|
HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter);
|
||||||
|
HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c);
|
||||||
|
HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c);
|
||||||
|
void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus);
|
||||||
|
void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus);
|
||||||
|
|
||||||
|
/* Private constants ---------------------------------------------------------*/
|
||||||
|
/** @defgroup I2CEx_Private_Constants I2C Extended Private Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
/** @defgroup I2CEx_Private_Macro I2C Extended Private Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \
|
||||||
|
((FILTER) == I2C_ANALOGFILTER_DISABLE))
|
||||||
|
|
||||||
|
#define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU)
|
||||||
|
|
||||||
|
#define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FMP_NOT_SUPPORTED) != I2C_FMP_NOT_SUPPORTED) && \
|
||||||
|
((((__CONFIG__) & (I2C_FASTMODEPLUS_PA9)) == I2C_FASTMODEPLUS_PA9) || \
|
||||||
|
(((__CONFIG__) & (I2C_FASTMODEPLUS_PA10)) == I2C_FASTMODEPLUS_PA10) || \
|
||||||
|
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \
|
||||||
|
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \
|
||||||
|
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \
|
||||||
|
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \
|
||||||
|
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \
|
||||||
|
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2) || \
|
||||||
|
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C3)) == I2C_FASTMODEPLUS_I2C3)))
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private Functions ---------------------------------------------------------*/
|
||||||
|
/** @defgroup I2CEx_Private_Functions I2C Extended Private Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* Private functions are defined in stm32g0xx_hal_i2c_ex.c file */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* STM32G0xx_HAL_I2C_EX_H */
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
6613
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.c
Normal file
6613
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.c
Normal file
File diff suppressed because it is too large
Load Diff
335
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c_ex.c
Normal file
335
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c_ex.c
Normal file
@ -0,0 +1,335 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32g0xx_hal_i2c_ex.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief I2C Extended HAL module driver.
|
||||||
|
* This file provides firmware functions to manage the following
|
||||||
|
* functionalities of I2C Extended peripheral:
|
||||||
|
* + Extended features functions
|
||||||
|
*
|
||||||
|
@verbatim
|
||||||
|
==============================================================================
|
||||||
|
##### I2C peripheral Extended features #####
|
||||||
|
==============================================================================
|
||||||
|
|
||||||
|
[..] Comparing to other previous devices, the I2C interface for STM32G0xx
|
||||||
|
devices contains the following additional features
|
||||||
|
|
||||||
|
(+) Possibility to disable or enable Analog Noise Filter
|
||||||
|
(+) Use of a configured Digital Noise Filter
|
||||||
|
(+) Disable or enable wakeup from Stop mode(s)
|
||||||
|
(+) Disable or enable Fast Mode Plus
|
||||||
|
|
||||||
|
##### How to use this driver #####
|
||||||
|
==============================================================================
|
||||||
|
[..] This driver provides functions to configure Noise Filter and Wake Up Feature
|
||||||
|
(#) Configure I2C Analog noise filter using the function HAL_I2CEx_ConfigAnalogFilter()
|
||||||
|
(#) Configure I2C Digital noise filter using the function HAL_I2CEx_ConfigDigitalFilter()
|
||||||
|
(#) Configure the enable or disable of I2C Wake Up Mode using the functions :
|
||||||
|
(++) HAL_I2CEx_EnableWakeUp()
|
||||||
|
(++) HAL_I2CEx_DisableWakeUp()
|
||||||
|
(#) Configure the enable or disable of fast mode plus driving capability using the functions :
|
||||||
|
(++) HAL_I2CEx_EnableFastModePlus()
|
||||||
|
(++) HAL_I2CEx_DisableFastModePlus()
|
||||||
|
@endverbatim
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© Copyright (c) 2018 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32g0xx_hal.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32G0xx_HAL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2CEx I2CEx
|
||||||
|
* @brief I2C Extended HAL module driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef HAL_I2C_MODULE_ENABLED
|
||||||
|
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
/* Private define ------------------------------------------------------------*/
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
/* Private functions ---------------------------------------------------------*/
|
||||||
|
|
||||||
|
/** @defgroup I2CEx_Exported_Functions I2C Extended Exported Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2CEx_Exported_Functions_Group1 Extended features functions
|
||||||
|
* @brief Extended features functions
|
||||||
|
*
|
||||||
|
@verbatim
|
||||||
|
===============================================================================
|
||||||
|
##### Extended features functions #####
|
||||||
|
===============================================================================
|
||||||
|
[..] This section provides functions allowing to:
|
||||||
|
(+) Configure Noise Filters
|
||||||
|
(+) Configure Wake Up Feature
|
||||||
|
(+) Configure Fast Mode Plus
|
||||||
|
|
||||||
|
@endverbatim
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configure I2C Analog noise filter.
|
||||||
|
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
||||||
|
* the configuration information for the specified I2Cx peripheral.
|
||||||
|
* @param AnalogFilter New state of the Analog filter.
|
||||||
|
* @retval HAL status
|
||||||
|
*/
|
||||||
|
HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter)
|
||||||
|
{
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
|
||||||
|
assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter));
|
||||||
|
|
||||||
|
if (hi2c->State == HAL_I2C_STATE_READY)
|
||||||
|
{
|
||||||
|
/* Process Locked */
|
||||||
|
__HAL_LOCK(hi2c);
|
||||||
|
|
||||||
|
hi2c->State = HAL_I2C_STATE_BUSY;
|
||||||
|
|
||||||
|
/* Disable the selected I2C peripheral */
|
||||||
|
__HAL_I2C_DISABLE(hi2c);
|
||||||
|
|
||||||
|
/* Reset I2Cx ANOFF bit */
|
||||||
|
hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF);
|
||||||
|
|
||||||
|
/* Set analog filter bit*/
|
||||||
|
hi2c->Instance->CR1 |= AnalogFilter;
|
||||||
|
|
||||||
|
__HAL_I2C_ENABLE(hi2c);
|
||||||
|
|
||||||
|
hi2c->State = HAL_I2C_STATE_READY;
|
||||||
|
|
||||||
|
/* Process Unlocked */
|
||||||
|
__HAL_UNLOCK(hi2c);
|
||||||
|
|
||||||
|
return HAL_OK;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
return HAL_BUSY;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configure I2C Digital noise filter.
|
||||||
|
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
||||||
|
* the configuration information for the specified I2Cx peripheral.
|
||||||
|
* @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F.
|
||||||
|
* @retval HAL status
|
||||||
|
*/
|
||||||
|
HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter)
|
||||||
|
{
|
||||||
|
uint32_t tmpreg;
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
|
||||||
|
assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter));
|
||||||
|
|
||||||
|
if (hi2c->State == HAL_I2C_STATE_READY)
|
||||||
|
{
|
||||||
|
/* Process Locked */
|
||||||
|
__HAL_LOCK(hi2c);
|
||||||
|
|
||||||
|
hi2c->State = HAL_I2C_STATE_BUSY;
|
||||||
|
|
||||||
|
/* Disable the selected I2C peripheral */
|
||||||
|
__HAL_I2C_DISABLE(hi2c);
|
||||||
|
|
||||||
|
/* Get the old register value */
|
||||||
|
tmpreg = hi2c->Instance->CR1;
|
||||||
|
|
||||||
|
/* Reset I2Cx DNF bits [11:8] */
|
||||||
|
tmpreg &= ~(I2C_CR1_DNF);
|
||||||
|
|
||||||
|
/* Set I2Cx DNF coefficient */
|
||||||
|
tmpreg |= DigitalFilter << 8U;
|
||||||
|
|
||||||
|
/* Store the new register value */
|
||||||
|
hi2c->Instance->CR1 = tmpreg;
|
||||||
|
|
||||||
|
__HAL_I2C_ENABLE(hi2c);
|
||||||
|
|
||||||
|
hi2c->State = HAL_I2C_STATE_READY;
|
||||||
|
|
||||||
|
/* Process Unlocked */
|
||||||
|
__HAL_UNLOCK(hi2c);
|
||||||
|
|
||||||
|
return HAL_OK;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
return HAL_BUSY;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enable I2C wakeup from Stop mode(s).
|
||||||
|
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
||||||
|
* the configuration information for the specified I2Cx peripheral.
|
||||||
|
* @retval HAL status
|
||||||
|
*/
|
||||||
|
HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c)
|
||||||
|
{
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance));
|
||||||
|
|
||||||
|
if (hi2c->State == HAL_I2C_STATE_READY)
|
||||||
|
{
|
||||||
|
/* Process Locked */
|
||||||
|
__HAL_LOCK(hi2c);
|
||||||
|
|
||||||
|
hi2c->State = HAL_I2C_STATE_BUSY;
|
||||||
|
|
||||||
|
/* Disable the selected I2C peripheral */
|
||||||
|
__HAL_I2C_DISABLE(hi2c);
|
||||||
|
|
||||||
|
/* Enable wakeup from stop mode */
|
||||||
|
hi2c->Instance->CR1 |= I2C_CR1_WUPEN;
|
||||||
|
|
||||||
|
__HAL_I2C_ENABLE(hi2c);
|
||||||
|
|
||||||
|
hi2c->State = HAL_I2C_STATE_READY;
|
||||||
|
|
||||||
|
/* Process Unlocked */
|
||||||
|
__HAL_UNLOCK(hi2c);
|
||||||
|
|
||||||
|
return HAL_OK;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
return HAL_BUSY;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Disable I2C wakeup from Stop mode(s).
|
||||||
|
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
||||||
|
* the configuration information for the specified I2Cx peripheral.
|
||||||
|
* @retval HAL status
|
||||||
|
*/
|
||||||
|
HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c)
|
||||||
|
{
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance));
|
||||||
|
|
||||||
|
if (hi2c->State == HAL_I2C_STATE_READY)
|
||||||
|
{
|
||||||
|
/* Process Locked */
|
||||||
|
__HAL_LOCK(hi2c);
|
||||||
|
|
||||||
|
hi2c->State = HAL_I2C_STATE_BUSY;
|
||||||
|
|
||||||
|
/* Disable the selected I2C peripheral */
|
||||||
|
__HAL_I2C_DISABLE(hi2c);
|
||||||
|
|
||||||
|
/* Enable wakeup from stop mode */
|
||||||
|
hi2c->Instance->CR1 &= ~(I2C_CR1_WUPEN);
|
||||||
|
|
||||||
|
__HAL_I2C_ENABLE(hi2c);
|
||||||
|
|
||||||
|
hi2c->State = HAL_I2C_STATE_READY;
|
||||||
|
|
||||||
|
/* Process Unlocked */
|
||||||
|
__HAL_UNLOCK(hi2c);
|
||||||
|
|
||||||
|
return HAL_OK;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
return HAL_BUSY;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enable the I2C fast mode plus driving capability.
|
||||||
|
* @param ConfigFastModePlus Selects the pin.
|
||||||
|
* This parameter can be one of the @ref I2CEx_FastModePlus values
|
||||||
|
* @note For I2C1, fast mode plus driving capability can be enabled on all selected
|
||||||
|
* I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
|
||||||
|
* on each one of the following pins PB6, PB7, PB8 and PB9.
|
||||||
|
* @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability
|
||||||
|
* can be enabled only by using I2C_FASTMODEPLUS_I2C1 parameter.
|
||||||
|
* @note For all I2C2 pins fast mode plus driving capability can be enabled
|
||||||
|
* only by using I2C_FASTMODEPLUS_I2C2 parameter.
|
||||||
|
* @note For all I2C3 pins fast mode plus driving capability can be enabled
|
||||||
|
* only by using I2C_FASTMODEPLUS_I2C3 parameter.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus)
|
||||||
|
{
|
||||||
|
/* Check the parameter */
|
||||||
|
assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus));
|
||||||
|
|
||||||
|
/* Enable SYSCFG clock */
|
||||||
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* Enable fast mode plus driving capability for selected pin */
|
||||||
|
SET_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Disable the I2C fast mode plus driving capability.
|
||||||
|
* @param ConfigFastModePlus Selects the pin.
|
||||||
|
* This parameter can be one of the @ref I2CEx_FastModePlus values
|
||||||
|
* @note For I2C1, fast mode plus driving capability can be disabled on all selected
|
||||||
|
* I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
|
||||||
|
* on each one of the following pins PB6, PB7, PB8 and PB9.
|
||||||
|
* @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability
|
||||||
|
* can be disabled only by using I2C_FASTMODEPLUS_I2C1 parameter.
|
||||||
|
* @note For all I2C2 pins fast mode plus driving capability can be disabled
|
||||||
|
* only by using I2C_FASTMODEPLUS_I2C2 parameter.
|
||||||
|
* @note For all I2C3 pins fast mode plus driving capability can be disabled
|
||||||
|
* only by using I2C_FASTMODEPLUS_I2C3 parameter.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus)
|
||||||
|
{
|
||||||
|
/* Check the parameter */
|
||||||
|
assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus));
|
||||||
|
|
||||||
|
/* Enable SYSCFG clock */
|
||||||
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* Disable fast mode plus driving capability for selected pin */
|
||||||
|
CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
43
Makefile
43
Makefile
@ -12,28 +12,21 @@ Core/Src/stm32g0xx_hal_msp.c \
|
|||||||
Core/Src/system_stm32g0xx.c \
|
Core/Src/system_stm32g0xx.c \
|
||||||
Core/Src/syscalls.c \
|
Core/Src/syscalls.c \
|
||||||
Core/Src/sysmem.c \
|
Core/Src/sysmem.c \
|
||||||
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c \
|
|
||||||
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.c \
|
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.c \
|
||||||
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.c \
|
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.c \
|
||||||
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.c \
|
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c \
|
||||||
|
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.c \
|
||||||
|
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c.c \
|
||||||
|
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_i2c_ex.c \
|
||||||
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.c \
|
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.c \
|
||||||
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.c \
|
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.c \
|
||||||
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_iwdg.c \
|
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c \
|
||||||
|
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.c \
|
||||||
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c \
|
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c \
|
||||||
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c \
|
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c
|
||||||
Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c
|
|
||||||
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.c \
|
|
||||||
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.c \
|
|
||||||
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.c \
|
|
||||||
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.c \
|
|
||||||
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.c \
|
|
||||||
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.c \
|
|
||||||
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.c \
|
|
||||||
|
|
||||||
# Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_exti.c
|
|
||||||
|
|
||||||
ASM_SOURCES = \
|
ASM_SOURCES = \
|
||||||
Core/Startup/startup_stm32g071rbtx.s
|
Core/Startup/startup_stm32g031y8yx.s
|
||||||
|
|
||||||
PREFIX = arm-none-eabi-
|
PREFIX = arm-none-eabi-
|
||||||
CC = $(PREFIX)gcc
|
CC = $(PREFIX)gcc
|
||||||
@ -41,21 +34,13 @@ AS = $(PREFIX)gcc -x assembler-with-cpp
|
|||||||
CP = $(PREFIX)objcopy
|
CP = $(PREFIX)objcopy
|
||||||
SZ = $(PREFIX)size
|
SZ = $(PREFIX)size
|
||||||
|
|
||||||
HEX = $(CP) -O ihex
|
|
||||||
BIN = $(CP) -O binary -S
|
|
||||||
|
|
||||||
CPU = -mcpu=cortex-m0plus
|
CPU = -mcpu=cortex-m0plus
|
||||||
MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)
|
MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)
|
||||||
|
|
||||||
AS_DEFS =
|
|
||||||
|
|
||||||
C_DEFS = \
|
C_DEFS = \
|
||||||
-DUSE_HAL_DRIVER \
|
-DUSE_HAL_DRIVER \
|
||||||
-DSTM32G071xx
|
-DSTM32G071xx
|
||||||
|
|
||||||
|
|
||||||
AS_INCLUDES =
|
|
||||||
|
|
||||||
C_INCLUDES = \
|
C_INCLUDES = \
|
||||||
-ICore/Inc \
|
-ICore/Inc \
|
||||||
-IDrivers/STM32G0xx_HAL_Driver/Inc \
|
-IDrivers/STM32G0xx_HAL_Driver/Inc \
|
||||||
@ -73,13 +58,13 @@ endif
|
|||||||
|
|
||||||
CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)"
|
CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)"
|
||||||
|
|
||||||
LDSCRIPT = STM32G071RBTX_FLASH.ld
|
LDSCRIPT = STM32G031Y8YX_Flash.ld
|
||||||
|
|
||||||
LIBS = -lc -lm -lnosys
|
LIBS = -lc -lm -lnosys
|
||||||
LIBDIR =
|
LIBDIR =
|
||||||
LDFLAGS = $(MCU) -specs=nano.specs -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections
|
LDFLAGS = $(MCU) -specs=nano.specs -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections
|
||||||
|
|
||||||
all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin
|
all: $(BUILD_DIR)/$(TARGET).elf
|
||||||
|
|
||||||
OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o)))
|
OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o)))
|
||||||
vpath %.c $(sort $(dir $(C_SOURCES)))
|
vpath %.c $(sort $(dir $(C_SOURCES)))
|
||||||
@ -97,16 +82,10 @@ $(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile
|
|||||||
$(CC) $(OBJECTS) $(LDFLAGS) -o $@
|
$(CC) $(OBJECTS) $(LDFLAGS) -o $@
|
||||||
$(SZ) $@
|
$(SZ) $@
|
||||||
|
|
||||||
$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
|
|
||||||
$(HEX) $< $@
|
|
||||||
|
|
||||||
$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
|
|
||||||
$(BIN) $< $@
|
|
||||||
|
|
||||||
$(BUILD_DIR):
|
$(BUILD_DIR):
|
||||||
mkdir $@
|
mkdir $@
|
||||||
|
|
||||||
clean:
|
clean:
|
||||||
-rm -fR $(BUILD_DIR)
|
-rm -rf $(BUILD_DIR)
|
||||||
|
|
||||||
-include $(wildcard $(BUILD_DIR)/*.d)
|
-include $(wildcard $(BUILD_DIR)/*.d)
|
||||||
|
@ -2,9 +2,9 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file LinkerScript.ld
|
* @file LinkerScript.ld
|
||||||
* @author Auto-generated by STM32CubeIDE
|
* @author Auto-generated by STM32CubeIDE
|
||||||
* Abstract : Linker script for NUCLEO-G071RB Board embedding STM32G071RBTx Device from stm32g0 series
|
* @brief Linker script for STM32G031Y8Yx Device from STM32G0 series
|
||||||
* 128Kbytes FLASH
|
* 64Kbytes FLASH
|
||||||
* 36Kbytes RAM
|
* 8Kbytes RAM
|
||||||
*
|
*
|
||||||
* Set heap size, stack size and stack location according
|
* Set heap size, stack size and stack location according
|
||||||
* to application requirements.
|
* to application requirements.
|
||||||
@ -36,8 +36,8 @@ _Min_Stack_Size = 0x400 ; /* required amount of stack */
|
|||||||
/* Memories definition */
|
/* Memories definition */
|
||||||
MEMORY
|
MEMORY
|
||||||
{
|
{
|
||||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 36K
|
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 8K
|
||||||
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K
|
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 64K
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Sections */
|
/* Sections */
|
Loading…
Reference in New Issue
Block a user